FIN1017K8X

FIN1017 3.3V LVDS, 1-Bit, High-Speed Differential Driver Features Description ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ This single driver is designed for high-speed interconnects utilizing Low Voltage Differential Signaling (LVDS) technology. The driver translates LVTTL signal levels to LVDS levels with a typical differential output swing of 350mV, which provides low EMI at ultra-low power dissipation even at high frequencies. This device is ideal for high-speed transfer of clock or data. Greater than 600Mbs Data Rate 3.3V Power Supply Operation 0.5ns Maximum Differential Pulse Skew 1.5ns Maximum Propagation Delay Low Power Dissipation The FIN1017 can be paired with its companion receiver, the FIN1018, or with any other LVDS receiver. Power-Off Protection Meets or Exceeds the TIA/EIA-644 LVDS Standard Flow-Through Pinout Simplifies PCB Layout 8-Lead SOIC and US8 Packages Save Space Ordering Information Operating Part Number Temperature Range Eco Status Package Packing Method FIN1017MX -40 to +85°C Green 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150inch Narrow Tape and Reel FIN1017K8X -40 to +85°C Green 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide Tape and Reel For Fairchild’s definition of Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html. © 2001 Fairchild Semiconductor Corporation FIN1017 • Rev. 1.0.2 www.fairchildsemi.com FIN1017 — 3.3V LVDS, 1-Bit, High-Speed Differential Driver April 2009 FIN1017 — 3.3V LVDS, 1-Bit, High-Speed Differential Driver Pin Configuration (1) Figure 1. SOIC Figure 2. US-8 (Top View) Note: 1. Ground pins 4 and 5 for optimum performance. Pin Definitions Pin# US-8 Pin# SOIC Name Description 7 2 DIN 2 7 DOUT+ 1 8 DOUT- 8 1 VCC 4, 5 4 GND / GNDS 3, 6 3, 5, 6 NC LVTTL Data Input Non-inverting Driver Output Inverting Driver Output Power Supply Ground No Connect Function Table Input Outputs DIN DOUT+ DOUT- LOW Logic Level LOW Logic Level HIGH Logic Level HIGH Logic Level HIGH Logic Level LOW Logic Level OPEN LOW Logic Level HIGH Logic Level © 2001 Fairchild Semiconductor Corporation FIN1017 • Rev. 1.0.2 www.fairchildsemi.com 2 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VCC Supply Voltage -0.5 +4.6 V DIN DC Input Voltage -0.5 +6.0 V DOUT DC Output Voltage -0.5 +4.7 V IOSD Driver Short-Circuit Current TSTG Storage Temperature Range Continuous +150 °C TJ Max Junction Temperature +150 °C TL Lead Temperature (Soldering, 10 Seconds) +260 °C ESD -65 A Human Body Model, JESD22-A114 ≥ 6500 Bus Pins DOUT+/DOUT- to GND ≥ 10500 V ≥ 350 Machine Model, JESD22-A115 XXX NOTE to Engineering – ESD values here do NOT match what’s on WWW (pulled from PeopleSoft). XXX Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter VCC Supply Voltage VIN Input Voltage TA Operating Temperature © 2001 Fairchild Semiconductor Corporation FIN1017 • Rev. 1.0.2 Min. Max. Unit 3.0 3.6 V 0 VCC V -40 +85 °C FIN1017 — 3.3V LVDS, 1-Bit, High-Speed Differential Driver Absolute Maximum Ratings www.fairchildsemi.com 3 Over-supply voltage and operating temperature ranges, unless otherwise specified. All typical values are at TA = 25°C and with VCC = 3.3V. Symbol VOD ΔVOD VOS ΔVOS IOFF Parameter Conditions Output Differential Voltage VOD Magnitude Change from Differential LOW-to-HIGH Offset Voltage RL = 100 Ω, See Figure 3 Min. Typ. Max. Units 250 350 450 mV 25 mV 1.375 V 25 mV 1.125 1.250 Offset Magnitude Change from Differential LOW-to-HIGH Power-Off Output Current VCC = 0V, VOUT = 0V or 3.6V ±20 mA VOUT = 0V -8 mA VOD = 0V ±8 IOS Short-Circuit Output Current VIH Input HIGH Voltage VIL Input LOW Voltage 0.8 V IIN Input Current VIN = 0V or VCC ±20 mA Power-Off Input Current VCC = 0V, VIN = 0V or 3.6V ±20 mA Input Clamp Voltage IIK = -18mA No Load, VIN = 0V or VCC 8 mA RL = 100Ω, VIN = 0V or VCC 10 mA II(OFF) VIK 2 VCC GND -1.5 V V ICC Power Supply Current CIN Input Capacitance 4 pF Output Capacitance 6 pF COUT FIN1017 — 3.3V LVDS, 1-Bit, High-Speed Differential Driver DC Electrical Characteristics AC Electrical Characteristics Over-supply voltage and operating temperature ranges, unless otherwise specified. All typical values are at TA = 25°C and with VCC = 3.3V. XXX there ARE no Typical values! XXX Symbol Parameter Test Conditions Min. Max. Units tPLHD Differential Propagation Delay, LOW-to-HIGH 0.5 1.5 ns tPHLD Differential Propagation Delay, HIGH-to-LOW 0.5 1.5 ns tTLHD Differential Output Rise Time (20% to 80%) 0.4 1.0 ns tTHLD Differential Output Fall Time (80% to 20%) tSK(P) Pulse Skew |tPLH - tPHL| tSK(PP) RL = 100Ω, CL = 10pF, see Figure 4 and Figure 5 (2) Part-to-Part Skew 0.4 1.0 ns 0.5 ns 1.0 ns Note: 2. tSK(PP) is the magnitude of the difference in propagation delay times between any specified terminals of two devices switching in the same direction (either LOW-to-HIGH or HIGH-to-LOW) when both devices operate with the same supply voltage, same temperature, and have identical test circuits. © 2001 Fairchild Semiconductor Corporation FIN1017 • Rev. 1.0.2 www.fairchildsemi.com 4 Figure 3. Differential Driver DC Test Circuit Figure 4. Differential Driver Propagation Delay and Transition Time Test Circuit FIN1017 — 3.3V LVDS, 1-Bit, High-Speed Differential Driver Test Diagrams Notes: Note A: All input pulses have frequency = 10MHz, tR or tF = 2ns. Note B: CL includes all probe and fixture capacitances. Figure 5. AC Waveforms © 2001 Fairchild Semiconductor Corporation FIN1017 • Rev. 1.0.2 www.fairchildsemi.com 5 Figure 6. Output High Voltage vs. Power Supply Voltage Figure 7. Output Low Voltage vs. Power Supply Voltage Figure 8. Output Short Circuit Current vs. Power Supply Voltage Figure 9. Differential Output Voltage vs. Power Supply Voltage Figure 10. Differential Output Voltage vs. Load Resistor Figure 11. Offset Voltage vs. Power Supply Voltage © 2001 Fairchild Semiconductor Corporation FIN1017 • Rev. 1.0.2 FIN1017 — 3.3V LVDS, 1-Bit, High-Speed Differential Driver Typical Performance Characteristics www.fairchildsemi.com 6 Figure 12. Power Supply Current vs. Frequency Figure 13. Power Supply Current vs. Power Supply Voltage Figure 14. Power Supply Current vs. Ambient Temperature Figure 15. Differential Propagation Delay vs. Power Supply Figure 16. Differential Propagation Delay vs. Ambient Temperature Figure 17. Differential Pulse Skew (tPLH - tPHL) vs. Power Supply Voltage © 2001 Fairchild Semiconductor Corporation FIN1017 • Rev. 1.0.2 FIN1017 — 3.3V LVDS, 1-Bit, High-Speed Differential Driver Typical Performance Characteristics www.fairchildsemi.com 7 Figure 18. Differential Pulse Skew (tPLH - tPHL) vs. Ambient Temperature Figure 19. Transition Time vs. Power Supply Voltage FIN1017 — 3.3V LVDS, 1-Bit, High-Speed Differential Driver Typical Performance Characteristics Figure 20. Transition Time vs. Ambient Temperature © 2001 Fairchild Semiconductor Corporation FIN1017 • Rev. 1.0.2 www.fairchildsemi.com 8 5.00 4.80 A 0.65 3.81 5 8 B 6.20 5.80 PIN ONE INDICATOR 1.75 4.00 3.80 1 5.60 4 1.27 (0.33) 0.25 M 1.27 C B A LAND PATTERN RECOMMENDATION SEE DETAIL A 0.25 0.10 1.75 MAX 0.25 0.19 C 0.10 0.51 0.33 0.50 x 45° 0.25 R0.10 FIN1017 — 3.3V LVDS, 1-Bit, High-Speed Differential Driver Physical Dimensions C OPTION A - BEVEL EDGE GAGE PLANE R0.10 OPTION B - NO BEVEL EDGE 0.36 NOTES: UNLESS OTHERWISE SPECIFIED 8° 0° 0.90 0.406 A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AA, ISSUE C, B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) LANDPATTERN STANDARD: SOIC127P600X175-8M. E) DRAWING FILENAME: M08AREV13 SEATING PLANE (1.04) DETAIL A SCALE: 2:1 Figure 21. 8-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150inch Narrow Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2001 Fairchild Semiconductor Corporation FIN1017 • Rev. 1.0.2 www.fairchildsemi.com 9 FIN1017 — 3.3V LVDS, 1-Bit, High-Speed Differential Driver Physical Dimensions -A- 1.80 5 0.70 -B- 2.3±0.1 3.1±.1 3.40 8 2.70 0.15 1.00 1.55 0.30 TYP 1 0.2 C B A ALL LEAD TIPS 4 PIN #1 IDENT. ALL LEAD TIPS 0.1 C 0.90 MAX 0.5 TYP DETAIL A 0.70±0.10 0.10-0.18 -C0.10 0.00 0.17-0.27 0.13 0.50TYP A B C 0.4 TYP GAGE PLANE 0.12 0°-8° A. CONFORMS TO JEDEC REGISTRATION MO-187 B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS. SEATING PLANE DETAIL A D. DIMENSIONS AND TOLERANCES PER ANSI Y14.5M, 1982. MAB08AREVC Figure 22. 8-Lead US8, JEDEC MO-187, Variation CA 3.1mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2001 Fairchild Semiconductor Corporation FIN1017 • Rev. 1.0.2 www.fairchildsemi.com 10 FIN1017 — 3.3V LVDS, 1-Bit, High-Speed Differential Driver © 2001 Fairchild Semiconductor Corporation FIN1017 • Rev. 1.0.2 www.fairchildsemi.com 11