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FL6632
Primary-Side-Regulated LED Driver with Power Factor
Correction
Features
Description
Cost-Effective Solution: No Input Bulk Capacitor or
Feedback Circuitry
Power Factor Correction
This highly integrated PWM controller provides several
features to enhance the performance of low-power
flyback converters. The proprietary topology enables
simplified circuit design for LED lighting applications.
Linear Frequency Control Improves Efficiency and
Simplifies Design
Open-LED Protection
Accurate Constant-Current (CC) Control,
Independent Online Voltage, Output Voltage,
and Magnetizing Inductance Variation
Short-LED Protection
Cycle-by-Cycle Current Limiting
Over-Temperature Protection with Auto Restart
Low Startup Current: 20 μA
Low Operating Current: 5 mA
VDD Under-Voltage Lockout (UVLO)
Gate Output Maximum Voltage Clamped at 18V
By using single-stage topology with primary-side
regulation, a LED lighting board can be implemented
with few external components and minimized cost. No
input bulk capacitor or feedback circuitry is required. To
implement good power factor and low THD, constant
on-time control is utilized with an external capacitor
connected to the COMI pin.
Precise constant-current control regulates accurate
output current versus changes in input voltage and
output voltage. The operating frequency is proportionally
adjusted by the output voltage to guarantee DCM
operation with higher efficiency and simpler design.
FL6632 provides open-LED, short-LED, and overtemperature protection features. The current limit level
is automatically reduced to minimize output current and
protect external components in a short-LED condition.
The FL6632 controller is available in an 8-pin SmallOutline Package (SOP).
SOP-8 Package
Application Voltage Range: 80 VAC ~ 308 VAC
Applications
LED Lighting System
Ordering Information
Part Number
Operating
Temperature Range
Package
Packing
Method
FL6632MX
-40°C to +125°C
8-Lead, Small Outline Integrated Circuit Package (SOIC)
Tape & Reel
© 2015 Fairchild Semiconductor Corporation
FL6632 • Rev. 1.0
www.fairchildsemi.com
FL6632 — Primary-Side-Regulated LED Driver with Power Factor Correction
May 2015
DC Output
AC Input
2
8 GND GATE
3 GND
CS
1
VDD 4
7 COMI
NC
VS 6
5
Figure 1.
Typical Application
Block Diagram
Shutdown
Max. Duty
Controller
GND 8
Gate Driver
S
VDD
4
+
LEB
OSC
3
Error
Amp.
R
DCM
Controller
VDD Good
OTP
VS OVP
5
VS OVP
3V
Figure 2.
© 2015 Fairchild Semiconductor Corporation
FL6632 • Rev. 1.0
6
VS
VREF
tDIS
Detector
TRUECURRENT®
Calculation
EAV
+
NC
COMI
EAI
Q
+
GND
S
7
Sawtooth
Generator
+
Internal
Bias
CS
VCS-CL
-
+
VDD
OVP
1
Current Limit
Control
+
VOVP
GATE
EAV
Q
R
VDD
Good
2
Sample & Hold
Functional Block Diagram
www.fairchildsemi.com
2
FL6632 — Primary-Side-Regulated LED Driver with Power Factor Correction
Application Diagram
4
3
F:
Z:
X:
Y:
TT:
T:
M:
4
3
ZXYTT
6632
TM
Fairchild Logo
Plant Code
1-Digit Year Code
1-Digit Week Code
2-Digit Die Run Code
Package Type (M=SOP)
Manufacture Flow Code
Figure 3.
Top Mark
Pin Configuration
CS
1
8
GND
GATE
2
7
COMI
GND
3
6
3
VS
VDD
4
5
4
NC
Figure 4.
Pin Configuration (Top View)
Pin Descriptions
Pin #
Name
Description
1
CS
2
GATE
PWM Signal Output. This pin uses the internal totem-pole output driver to drive the power
MOSFET.
3
GND
Ground
4
VDD
Power Supply. IC operating current and MOSFET driving current are supplied using this pin.
5
NC
No Connect
6
VS
Voltage Sense. This pin detects the output voltage information and discharge time for maximum
frequency control and constant current regulation. This pin is connected to an auxiliary winding
of the transformer via resistors of the divider.
7
COMI
Constant Current Loop Compensation. This pin is connected to a capacitor between the
COMI and GND pin for compensation current loop gain.
8
GND
Ground
Current Sense. This pin connects a current-sense resistor to detect the MOSFET current for
the output-current regulation in constant-current regulation.
© 2015 Fairchild Semiconductor Corporation
FL6632 • Rev. 1.0
www.fairchildsemi.com
3
FL6632 — Primary-Side-Regulated LED Driver with Power Factor Correction
Marking Information
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Min.
Max.
Unit
30
V
(1,2)
VVDD
DC Supply Voltage
VVS
VS Pin Voltage
-0.3
7
V
VCS
CS Pin Input Voltage
-0.3
7
V
VCOMI
COMI Pin Input Voltage
-0.3
7
V
VGATE
GATE Pin Input Voltage
-0.3
30
V
633
mW
150
°C
150
°C
260
°C
PD
Power Dissipation (TA＜50°C)
TJ
Maximum Junction Temperature
TSTG
TL
Storage Temperature Range
-55
Lead Temperature (Soldering 10s)
Notes:
1. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
2. All voltage values, except differential voltages, are given with respect to GND pin.
Thermal Impedance
TA=25°C, unless otherwise specified.
Symbol
Parameter
Value
Unit
θJA
Junction-to-Ambient Thermal Impedance
158
°C/W
θJC
Junction-to-Case Thermal Impedance
39
°C/W
Note:
3. Referenced the JEDEC recommended environment, JESD51-2, and test board, JESD51-3, 1S1P with minimum
land pattern.
ESD Capability
Symbol
ESD
Parameter
Value
Human Body Model, ANSI/ESDA/JEDEC JS-001-2012
4
Charged Device Model, JESD22-C101
2
Unit
kV
Note:
4. Meets JEDEC standards JESD22-A114 and JESD 22-C101.
© 2015 Fairchild Semiconductor Corporation
FL6632 • Rev. 1.0
www.fairchildsemi.com
4
FL6632 — Primary-Side-Regulated LED Driver with Power Factor Correction
Absolute Maximum Ratings
VDD=15 V, TJ=-40 to +125°C, unless otherwise specified. Currents are defined as positive into the device and
negative out of device.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
14.5
16.0
17.5
V
6.75
7.75
8.75
V
3
4
5
mA
2
20
μA
22.0
23.5
25.0
V
1.5
V
VDD SECTION
VDD-ON
Turn-On Threshold Voltage
VDD-OFF
Turn-Off Threshold Voltage
IDD-OP
Operating Current
At Maximum Frequency
CL=1 nF
IDD-ST
Startup Current
VDD=VDD-ON – 0.16 V
VOVP
VDD Over-Voltage-Protection Level
GATE SECTION
VOL
Output Voltage Low
VDD=20 V, IGATE= -1 mA
VOH
Output Voltage High
VDD=10 V, IGATE= +1 mA
Peak Sourcing Current
VDD=10 ~ 20 V
Isource
Isink
5
V
60
mA
Peak Sinking Current
VDD=10 ~ 20 V
tr
Rising Time
CL=1 nF
100
150
200
ns
tf
Falling Time
CL=1 nF
20
60
100
ns
12
15
18
V
VCLAMP
Output Clamp Voltage
180
mA
Oscillator SECTION
fMAX-CC
Maximum Frequency in CC
VDD=10 V, 20 V
60
65
70
kHz
fMIN-CC
Minimum Frequency in CC
VDD=10 V, 20 V
21.0
23.5
26.0
kHz
tON(MAX)
Maximum Turn-On Time
12
14
16
s
2.475
2.500
2.525
V
2.38
2.43
2.48
V
CURRENT-ERROR-AMPLIFIER SECTION
VRV
Reference Voltage
VCCR
EAI Voltage for CC Regulation
tLEB
Leading-Edge Blanking Time
tMIN
Minimum On Time in CC
tPD
Propagation Delay to GATE
tDIS-BNK
tDIS Blanking Time of VS
IVS-BNK
VS Current for VS Blanking
VCS=0.44 V
VCOMI=0 V
50
300
ns
600
ns
100
150
ns
1.5
s
-100
A
85
mho
Current-Error-Amplifier SECTION
Gm
Transconductance
ICOMI-SINK
COMI Sink Current
VEAI=3 V, VCOMI=5 V
25
38
A
38
A
|COMI Source Current|
VEAI=2 V, VCOMI=0 V
25
VCOMI-HGH
COMI High Voltage
VEAI=2 V
4.9
VCOMI-LOW
COMI Low Voltage
VEAI=3 V
ICOMI-SOURCE
© 2015 Fairchild Semiconductor Corporation
FL6632 • Rev. 1.0
V
0.1
V
www.fairchildsemi.com
5
FL6632 — Primary-Side-Regulated LED Driver with Power Factor Correction
Electrical Characteristics
VDD=15 V, TJ=-40 to +125°C, unless otherwise specified. Currents are defined as positive into the device and
negative out of device.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
VCS Threshold Voltage for OCP
0.63
0.70
0.77
V
VLowOCP
VCS Threshold Voltage for Low OCP
0.15
0.20
0.25
V
VLowOCP-EN
VS Threshold Voltage to Enable Low
OCP Level
0.4
V
VLowOCP-DIS
VS Threshold Voltage to Disable
Low OCP Level
0.6
V
VVS-OVP
VS Level for Output Over-Voltage
Protection
VOLTAGE-SENSE SECTION
VOCP
2.9
3.0
3.1
140
150
160
V
OVER-TEMPERATURE-PROTECTION SECTION
TOTP
TOTP-HYS
(5)
Threshold Temperature for OTP
Restart Junction Temperature
Hysteresis
10
o
C
o
C
Note:
5. The Ensured by design. Not tested in production.
© 2015 Fairchild Semiconductor Corporation
FL6632 • Rev. 1.0
www.fairchildsemi.com
6
FL6632 — Primary-Side-Regulated LED Driver with Power Factor Correction
Electrical Characteristics (Continued)
1.5
1.3
1.3
Normalized to 25 °C
Normalized to 25 °C
1.5
1.1
0.9
0.7
1.1
0.9
0.7
0.5
0.5
-40
-30
-15
0
25
50
75
85
100
-40
125
-30
-15
0
VDD-ON vs. Temperature
Figure 6.
1.5
1.5
1.3
1.3
Normalized to 25 °C
Normalized to 25 °C
Figure 5.
1.1
0.9
0.7
50
75
85
100
125
VDD-OFF vs. Temperature
1.1
0.9
0.7
0.5
0.5
-40
-30
-15
0
25
50
75
85
100
-40
125
-30
-15
0
Figure 7.
25
50
75
85
100
125
Temp [°C]
Temp [°C]
IDD-OP vs. Temperature
Figure 8.
1.5
1.5
1.3
1.3
Normalized to 25 °C
Normalized to 25 °C
25
Temp [°C]
Temp [°C]
1.1
0.9
0.7
VOVP vs. Temperature
1.1
0.9
0.7
0.5
0.5
-40
-30
-15
0
25
50
75
85
100
-40
125
-30
-15
Figure 9.
fMAX_CC vs. Temperature
© 2015 Fairchild Semiconductor Corporation
FL6632 • Rev. 1.0
0
25
50
75
85
100
125
Temp [°C]
Temp [°C]
Figure 10.
fMIN_CC vs. Temperature
www.fairchildsemi.com
7
FL6632 — Primary-Side-Regulated LED Driver with Power Factor Correction
Typical Performance Characteristics
1.5
1.3
1.3
Normalized to 25 °C
Normalized to 25 °C
1.5
1.1
0.9
0.7
0.5
1.1
0.9
0.7
0.5
-40
-30
-15
0
25
50
75
85
100
125
-40
-30
-15
0
Temp [°C]
50
75
85
100
125
Temp [°C]
VCCR vs. Temperature
Figure 12.
1.5
1.5
1.3
1.3
Normalized to 25 °C
Normalized to 25 °C
Figure 11.
25
1.1
0.9
0.7
0.5
VVVR vs. Temperature
1.1
0.9
0.7
0.5
-40
-30
-15
0
25
50
75
85
100
125
-40
-30
-15
Temp [°C]
Figure 13.
25
50
75
85
100
125
Temp [°C]
VOCP vs. Temperature
© 2015 Fairchild Semiconductor Corporation
FL6632 • Rev. 1.0
0
Figure 14.
VOCP_Low vs. Temperature
www.fairchildsemi.com
8
FL6632 — Primary-Side-Regulated LED Driver with Power Factor Correction
Typical Performance Characteristics (Continued)
FL6632 is AC-DC PWM controller for LED lighting
applications. TRUECURRENT™ techniques regulate
accurate LED current independent of input voltage,
output voltage, and magnetizing inductance variations.
The linear frequency control in the oscillator reduces
conduction loss and maintains DCM operation in the
wide range of output voltage, which implements high
power factor correction in a single-stage flyback
topology. A variety of protections, such as short/openLED protection, over-temperature protection, and cycleby-cycle current limitation stabilize system operation
and protect external components.
PFC and THD
In a conventional boost converter, Boundary Conduction
Mode (BCM) is generally used to keep input current inphase with input voltage for PF and THD. In
flyback/buck boost topology, constant turn-on time and
constant frequency in Discontinuous Conduction Mode
(DCM) can implement high PF and low THD, as shown
in Figure 16. Constant turn-on time is maintained by
the internal error amplifier and a large external
capacitor (typically over 1 µF) at the COMI pin.
Constant frequency and DCM operation are managed
by linear frequency control.
Startup
Powering at startup is slow due to the low feedback loop
bandwidth in PFC converter. To boost powering during
startup, an internal oscillator counts 12ms to define
Startup Mode. During Startup Mode, turn-on time is
determined by Current-Mode control with a 0.2 VCS
voltage limit and transconductance becomes 14 times
larger, as shown in Figure 15. After startup, turn-on time
is controlled by Voltage Mode using COMI voltage and
error amplifier transconductance is reduced to 85 mho.
IIN
IIN_AVG
VDD = VDD_ON
VIN
GATE
Constant Frequency
VCS
0.2 V
Figure 16.
Input Current and Switching
DCM Control
VCOMI
14gm gm
As mentioned above, DCM should be guaranteed for
high power factor in flyback topology. To maintain DCM
across a wide range of output voltage, the switching
frequency is linearly adjusted by the output voltage in
linear frequency control in the whole Vs range. Output
voltage is detected by the auxiliary winding and the
resistive divider connected to the VS pin, as shown in
Figure 17. When the output voltage decreases,
secondary diode conduction time is increased and the
DCM control lengthens the switching period, which
retains DCM operation over the wide output voltage
range, as shown in Figure 18. The frequency control
lowers the primary rms current with better power
efficiency in full-load condition.
Startup Mode: 12 ms
ILED
Time
Figure 15.
Startup Sequence
Constant-Current Regulation
The output current can be estimated using the peak
drain current and inductor current discharge time since
output current is same as the average of the diode
current in steady state. The peak value of the drain
current is determined by the CS pin and the inductor
discharge time (tdis) is sensed by tdis detector. By using
three points of information (peak drain current, inductor
discharging time, and operating switching period); the
TRUECURRENT™ calculation block estimates output
current. The output of the calculation is compared with
an internal precise reference to generate an error
voltage (VCOMI), which determines turn-on time in
Voltage-Mode control. With Fairchild’s innovative
TRUECURRENT™ technique, constant-current output
can be precisely controlled.
© 2015 Fairchild Semiconductor Corporation
FL6632 • Rev. 1.0
Gate
Driver
OSC
2
GATE
CC
Control
VOUT
tDIS
Detector
5
VS
DCM
Controller
S/H
Figure 17.
DCM and BCM Control
www.fairchildsemi.com
9
FL6632 — Primary-Side-Regulated LED Driver with Power Factor Correction
Functional Description
Secondary
Current
nV O
Lm
VO =
VO.NOM
VIN
t
t DIS
n
VO =
75% VO.NOM
3
V
4 O
Lm
VCS
0.2V
4
t
3
4
t DIS
3
n
VO =
60% VO.NOM
3
V
5
Lm
VDD
VDD_ON
O
5
t DIS
3
VDD_OFF
5
t
3
Figure 20.
Figure 18.
Primary and Secondary Current
Waveforms in Short-LED Condition
Open-LED Protection
BCM Control
FL6632 protects external components, such as diode
and capacitor, at secondary side in open-LED condition.
During switch-off, the VDD capacitor is charged up to the
auxiliary winding voltage, which is applied as the
reflected output voltage. Because the VDD voltage has
output voltage information, the internal voltage
comparator on the VDD pin can trigger output OverVoltage Protection (OVP), as shown in Figure 21. When
at least one LED is open-circuited, output load
impedance becomes very high and output capacitor is
quickly charged up to VOVP x NS / NA Then switching is
shut down and the VDD block goes into Hiccup Mode
until the open-LED condition is removed, as shown
in Figure 22.
The end of secondary diode conduction time could
possibly be behind the end of a switching period set by
DCM control. In this case, the next switching cycle starts
at the end of secondary diode conduction time since
FL6632 doesn’t allow CCM. Consequently, the
operation mode changes from DCM to Boundary
Conduction Mode (BCM).
Short-LED Protection
In case of a short-LED condition, the switching
MOSFET and secondary diode are stressed by the high
powering current. However, FL6632 changes the OCP
level in a short-LED condition. When VS voltage is lower
than 0.4 V, OCP level becomes 0.2 V from 0.7 V, as
shown in Figure 19, so powering is limited and external
components current stress is reduced.
Internal
Bias
VDD Good
+
-
VDD 4
LEB
1 CS
VOVP
-
+
VOCP
+
-
At VS < 0.4 V,
VOCP = 0.2 V
6 VS
S
At VS > 0.6 V,
VOCP = 0.7 V
Figure 19.
VDD Good
Internal OCP Block
© 2015 Fairchild Semiconductor Corporation
FL6632 • Rev. 1.0
Shutdown Gate Driver
R
Figure 21.
Figure 20 shows operational waveforms in short-LED
condition. Output voltage is quickly lowered to 0 V right
after a short-LED event. Then the reflected auxiliary
voltage is also 0 V, making VS less than 0.4 V. 0.2 V
OCP level limits primary-side current and VDD hiccups
up and down between UVLO hysteresis.
Q
Internal OVP Block
www.fairchildsemi.com
10
FL6632 — Primary-Side-Regulated LED Driver with Power Factor Correction
LED Short !
Primary
Current
The turn-on and turn-off thresholds are fixed internally at
16 V and 7.5 V, respectively. During startup, the VDD
capacitor must be charged to 16 V through the startup
resistor to enable the FL6632. The VDD capacitor
continues to supply VDD until power can be delivered
from the auxiliary winding of the main transformer.
VDD must not drop below 7.5 V during this startup
process. This UVLO hysteresis window ensures that the
VDD capacitor is adequate to supply VDD during startup.
VDD_OVP
VDD_ON
VDD_OFF
VOUT
VDD_OVP x Ns/Na
Over-Temperature Protection (OTP)
The FL6632 has a built-in temperature-sensing circuit to
shut down PWM output if the junction temperature
exceeds 150°C. While PWM output is shut down, the
VDD voltage gradually drops to the UVLO voltage. Some
of the internal circuits are shut down and VDD gradually
starts increasing again. When VDD reaches 16 V, all the
internal circuits start operating. If the junction
temperature is still higher than 140°C, the PWM
controller is shut down immediately.
GATE
Figure 22.
Waveforms in Open-LED Condition
© 2015 Fairchild Semiconductor Corporation
FL6632 • Rev. 1.0
www.fairchildsemi.com
11
FL6632 — Primary-Side-Regulated LED Driver with Power Factor Correction
Under-Voltage Lockout (UVLO)
LED Open !
VDD
PCB layout for a power converter is as important as
circuit design because PCB layout with high parasitic
inductance or resistance can lead to severe switching
noise with system instability. PCB should be designed to
minimize switching noise into control signals.
1.
2.
The signal ground and power ground should be
separated and connected only at one position
(GND pin) to avoid ground loop noise. The power
ground path from the bridge diode to the sensing
resistors should be short and wide.
Gate-driving current path (GATE – RGATE – MOSFET
– RCS – GND) must be as short as possible.
3.
Control pin components; such as CCOMI, CVS, and
RVS2; should be placed close to the assigned pin
and signal ground.
4.
High-voltage traces related to the drain of MOSFET
and RCD snubber should be kept far way from
control circuits to avoid unnecessary interference.
5.
If a heat sink is used for the MOSFET, connect this
heat sink to power ground.
6.
The auxiliary winding ground should be connected
closer to the GND pin than the control pin
components’ ground.
DC Output
AC Input
Power
ground
5
RCS
2
RGATE
4
FL6632
CS
GND
CCOMI
GATE COMI
CVS
1
GND
VS
VDD
NC
3
RVS2
CVDD
6
RVS1
Figure 23.
© 2015 Fairchild Semiconductor Corporation
FL6632 • Rev. 1.0
Signal
ground
Layout Example
www.fairchildsemi.com
12
FL6632 — Primary-Side-Regulated LED Driver with Power Factor Correction
PCB Layout Guidance
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are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
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