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FL663
Primary-Side-Regulation PWM Controller for
LED Illumination
Features
Description
Low Standby Power: < 30 mW
Green-Mode: Linearly-Decreasing PWM Frequency
with Cycle skipping.
Fixed PWM Frequency at 50 kHz and 33 kHz with
Proprietary Frequency Hopping to Solve EMI
Problems
Peak-Current-Mode Control in CV Mode
This third-generation Primary-Side-Regulation (PSR)
and highly integrated PWM controller provides features
to enhance the performance of LED illumination.
High-Voltage Startup
Few External Component Counts
®
Constant-Voltage (CV) and Constant-Current (CC)
Control without Secondary-Feedback Circuitry
Cycle-by-Cycle Current Limiting
The proprietary topology, TRUECURRENT , enables
precise CC regulation and simplified circuit for LED
illumination applications. The result is lower-cost and
smaller LED lighting compared to a conventional design
or a linear transformer.
To minimize standby power consumption, the
proprietary green-mode function provides off-time
modulation to linearly decrease PWM frequency with
cycle skipping under light-load conditions. Green mode
assists the power supply in meeting the power
conservation requirements.
By using the FL663,
implemented with few
minimized cost.
VDD Over-Voltage Protection (OVP)
VDD Under-Voltage Lockout (UVLO)
LED illumination can be
external components and
Adjustable Brownout Detector
Gate Output Maximum Voltage Clamped at 15 V
Thermal Shutdown (TSD) Protection
Available in the 8-Lead SOIC Package
Applications
Figure 1.
LED Illumination
8-Lead SOIC
Battery chargers for cellular phones, cordless
phones, PDA, digital cameras, power tools
Ordering Information
Part Number
Operating
Temperature Range
Top Mark
Package
Packing
Method
FL663MX
-40°C to +125°C
FL663
8-Lead, Small-Outline Package (SOIC-8)
Tape & Reel
© 2015 Fairchild Semiconductor Corporation
FL663 • Rev. 1.0
www.fairchildsemi.com
FL663 — Primary-Side-Regulation PWM Controller for LED Illumination
June 2015
CSN2
RSN2
T1
DBridge
Fuse
LEDs
DF
CSN
CO
RSN
CDL
DSN
VLINE
RStart
Q1
RGATE
RCS
RSense
8 HV
GATE 2
7 NC
CS 1
FL663
4
NC
DFA
VDD
6 GND
3
R1
VS 5
R2
CVS
CVDD
Figure 2.
Typical Application
Block Diagram
HV
8
VDD
Auto
Recovery
TSD
+
28V
S
Soft
Driver
2 GATE
Q
R
VDD
+
-
3
Max. Duty
VRESET
16V
/
7.5V
+
OSC
0.8V
1 CS
LEB
Peak
Detector
+
-
+
-
...
EAI
Pattern
Generator
+
Σ
X
TS
2.5V
TDIS
Slope
Compensation
VRESET
EAV
Protection:
Over-Voltage Protection (OVP)
Under-Voltage Lockout (UVLO)
Thermal Shutdown Protection (TSD)
+
-
2.5V
Sampling
& Holder
5 VS
6
GND
Figure 3.
© 2015 Fairchild Semiconductor Corporation
FL663 • Rev. 1.0
Internal Block Diagram
www.fairchildsemi.com
2
FL663 — Primary-Side-Regulation PWM Controller for LED Illumination
Application Diagram
F: Fairchild Logo
Z: Plant Code
X: 1-Digit Year Code
Y: 1-Digit Week Code
TT: 2-Digit Die Run Code
T: Package Type (M=SOP)
M: Manufacture Flow Code
ZXYTT
FL663
TM
Figure 4.
Top Mark
Pin Configuration
CS
HV
GATE
NC
VDD
GND
NC
VS
Figure 5.
Pin Configuration
Pin Definitions
Pin #
Name
Description
1
CS
Current Sense. This pin connects a current-sense resistor to detect the MOSFET current
for peak-current-mode control in CV Mode and provides the output-current regulation in
CC Mode.
2
GATE
PWM Signal Output. This pin uses the internal totem-pole output driver to drive the power
MOSFET. It is internally clamped below 15 V.
3
VDD
Power Supply. IC operating current and MOSFET driving current are supplied using this
pin. This pin is connected to an external VDD capacitor of typically 10 µF. The threshold
voltages for startup and turn-off are 16 V and 7.5 V, respectively. The operating current is
lower than 5 mA.
4
NC
No Connect. This pin is connected to GND or no connection. Does not connect any
voltage source.
5
VS
Voltage Sense. This pin detects the output voltage information and discharge time based
on voltage of auxiliary winding.
6
GND
7
NC
No Connect
8
HV
High Voltage. This pin connects to DC link capacitor for high-voltage startup. This pin is
connected to an external startup resistor of typically 100 k.
Ground
© 2015 Fairchild Semiconductor Corporation
FL663 • Rev. 1.0
www.fairchildsemi.com
3
FL663 — Primary-Side-Regulation PWM Controller for LED Illumination
Marking Information
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
VHV
Parameter
Min.
HV Pin Input Voltage
(1)
Max.
Unit
500
V
VVDD
DC Supply Voltage
30
V
VVS
VS Pin Input Voltage
-0.3
6.0
V
VCS
CS Pin Input Voltage
-0.3
6.0
V
PD
Power Dissipation (TA VO * 0.5, TA=25°C
Center Frequency
33
Protection
< VO * 0.5, TA=25°C
(4)
Frequency Frequency Hopping Range
VF-JUM-53
VF-JUM-35
fOSC-N-MIN
Minimum Frequency at No-Load
fOSC-CM-MIN
Minimum Frequency at CCM
VS-F-SKIPH
VS-F-SKIPL
△COMV_SKIP
TSKIP-CV
50 kHz 33 kHz, VS
Frequency Jumping Point
33 kHz 50 kHz, VS
±1.3
(3)
1.05
1.25
1.55
V
1.28
1.50
1.75
V
260
385
500
Hz
7
12
17
kHz
COMV Level for High Cycle Skipping
Period Change(3)
COMV level for Low Cycle Skipping
period Change(3)
Cycle Skipping Period COMV Hysteresis
Voltage
(3)
Cycle Skipping Period
(3)
fDV
Frequency Variation vs. VDD Deviation
fDT
Frequency Variation vs. Temperature
Deviation
kHz
1.14
V
0.80
V
0.34
V
VS-F- SKIPH
