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FL73282
Half-Bridge Gate Driver
Features
Description
Floating Channel for Bootstrap Operation to +900 V
Common-Mode dv/dt Noise Canceling Circuit
VCC & VBS Supply Range from 10 V to 20 V
The FL73282, a monolithic half bridge gate-drive IC, can
drive MOSFETs and IGBTs that operate up to +900 V.
Fairchild’s high-voltage process and common mode
noise canceling technique provides stable operation of
the high-side driver under high-dVS/dt noise
circumstances. An advanced level-shift circuit allows
high-side gate driver operation up to VS=-9.8 V (typical)
for VBS=15 V. The UVLO circuits for both channels
prevent malfunction when VCC or VBS is lower than the
specified threshold voltage. Output drivers typically
source/sink 350 mA / 650 mA, respectively, which is
suitable for all kinds of half- and full-bridge inverters.
Typically 350 mA / 650 mA Sourcing/Sinking
Current Driving Capability for Both Channels
Extended Allowable Negative VS Swing to -9.8 V for
Signal Propagation at VCC=VBS=15 V
UVLO Functions for Both Channels
Matched Propagation Delay Below 50 ns
Built-in 170 ns Dead-Time
Output in Phase with Input Signal
Figure 1. SOP 8
Applications
Fluorescent Lamp Ballast
HID Ballast
SMPS
Motor Driver
General Purpose Half Bridge Topology
Ordering Information
Part Number
Operating Temperature Range
Package
Packing
Method
-40°C to +125°C
8-Lead, Small Outline Integrated
Circuit, (SOIC)
Tape & Reel
(1)
FL73282MX
Note:
1. These devices passed wave-soldering test by JESD22A-111.
© 2015 Fairchild Semiconductor Corporation
FL73282 • Rev.1.0
www.fairchildsemi.com
FL73282 — Half-Bridge Gate Driver
September 2015
FL73282 — Half-Bridge Gate Driver
Typical Application Diagram
Up to 900V
15V
RBOOT
1
DBOOT
VCC
VB 8
Q1
HIN
2
HIN
LIN
3
LIN
HO
R1
7
CBOOT
R2
VS 6
Q2
C1
4 COM
LO 5
R3
Load
R4
Figure 2. Application Circuit for Half Bridge Topology
Internal Block Diagram
8
VB
7
HO
6
VS
1
VCC
5
LO
4
COM
UVLO
2
DRIVER
PULSE
GENERATOR
HIN
SCHMITT TRIGGER
INPUT
R
NOISE
CANCELLER
R
S
Q
HS(ON/OFF)
UVLO
3
SHOOT THROUGH
PREVENTION
LS(ON/OFF)
DELAY
{DEAD-TIME=170ns}
DRIVER
LIN
Figure 3. Functional Block Diagram
© 2015 Fairchild Semiconductor Corporation
FL73282 • Rev.1.0
www.fairchildsemi.com
VCC
1
HIN
2
8
VB
7
HO
3
6
VS
COM 4
5
LO
FL73282
LIN
Figure 4. Pin Assignments (Top View)
FL73282 — Half-Bridge Gate Driver
Pin Configuration
Pin Definitions
Pin
Name
I/O
1
VCC
I
Low-Side Supply Voltage
2
HIN
I
Logic Input for High-Side Gate Driver Output
3
LIN
I
Logic Input for Low-Side Gate Driver Output
4
COM
5
LO
O
Low-Side Driver Output
6
VS
I
High-Voltage Floating Supply Return
7
HO
O
High-Side Driver Output
8
VB
I
High-Side Floating Supply
© 2015 Fairchild Semiconductor Corporation
FL73282 • Rev.1.0
Description
Logic Ground and Low-Side Driver Return
www.fairchildsemi.com
3
Stresses exceeding the Absolute Maximum Ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Parameter
Min.
Max.
Unit
VS
High-Side Floating Offset Voltage
VB-24
VB+0.3
V
VB
High-Side Floating Supply Voltage
-0.3
924.0
V
VCC
Low-Side and Logic-Fixed Supply Voltage
-0.3
24
V
VHO
High-Side Floating Output Voltage VHO
VS-0.3
VB+0.3
V
VLO
Low-Side Floating Output Voltage VLO
-0.3
VCC+0.3
V
VIN
Logic Input Voltage (HIN, LIN)
-0.3
VCC+0.3
V
VCC-24
VCC+0.3
V
±50
V/ns
COM
Logic Ground
dVS/dt
Allowable Offset Voltage Slew Rate
(3)(4)(5)
PD
0.625
W
θJA
Power Dissipation
Thermal Resistance
200
°C/W
TJ
Junction Temperature
150
°C
TSTG
Storage Temperature
150
°C
-55
FL73282 — Half-Bridge Gate Driver
Absolute Maximum Ratings
Notes:
2. Mounted on 76.2 x 114.3 x 1.6 mm PCB (FR-4 glass epoxy material).
3. Refer to the following standards:
JESD51-2: Integral circuit’s thermal test method environmental conditions, natural convection;
JESD51-3: Low effective thermal conductivity test board for leaded surface-mount packages.
4. Do not exceed maximum power dissipation (PD) under any circumstances.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameter
Min.
Max.
Unit
VB
High-Side Floating Supply Voltage
VS+10
VS+20
V
VS
High-Side Floating Supply Offset Voltage
6-VCC
900
V
VHO
High-Side (HO) Output Voltage
VS
VB
V
VLO
Low-Side (LO) Output Voltage
COM
VCC
V
VIN
Logic Input Voltage (HIN, LIN)
COM
VCC
V
VCC
Low-Side Supply Voltage
10
20
V
TA
Ambient Temperature
-40
+125
°C
© 2015 Fairchild Semiconductor Corporation
FL73282 • Rev.1.0
www.fairchildsemi.com
4
VBIAS(VCC, VBS) = 15.0 V, TA = 25°C, unless otherwise specified. The VIN and IIN parameters are referenced to COM.
The VO and IO parameters are referenced to VS and COM and are applicable to the respective outputs HO and LO.
Symbol
Parameter
Condition
Min. Typ. Max. Unit
Power Supply Section
IQCC
Quiescent VCC Supply Current
VIN=0 V or 5 V
80
180
A
IQBS
Quiescent VBS Supply Current
VIN=0 V or 5 V
50
120
A
IPCC
Operating VCC Supply Current
fIN=20 kHz, rms value
550
A
IPBS
Operating VBS Supply Current
fIN=20 kHz, rms value
600
A
ILK
Offset Supply Leakage Current
VB=VS=900 V
10
A
Bootstrapped Supply Section
VCCUV+
VBSUV+
VCC & VBS Supply Under-Voltage Positive
going Threshold
8.2
9.2
10.0
V
VCCUVVBSUV-
VCC & VBS Supply Under-Voltage Negative
going Threshold
7.6
8.7
9.6
V
VCCUVH
VBSUVH
VCC Supply Under-Voltage Lockout
Hysteresis
0.5
FL73282 — Half-Bridge Gate Driver
Static Electrical Characteristics
V
Input Section
VIH
Logic "1" Input Voltage
2.5
VIL
Logic "0" Input Voltage
IIN+
Logic "1" Input Bias Current
VIN=5 V
IIN-
Logic "0" Input Bias Current
VIN=0 V
RIN
Logic Input Pull-Down Resistance
100
V
0.8
V
20
50
A
1.0
2.0
A
250
K
Gate Driver Output Section
VOH
High-Level Output Voltage, VBIAS-VO
IO=0 A
85
mV
VOL
Low-Level Output Voltage, VO
IO=0 A
85
mV
IO+
Output HIGH Short-Circuit Pulsed Current VO=0 V,VIN=5 V with PW≤10 μs
IO-
Output LOW Short-Circuit Pulsed Current
VS
Allowable Negative VS Pin Voltage for HIN
Signal Propagation to HO
© 2015 Fairchild Semiconductor Corporation
FL73282 • Rev.1.0
VO=15 V,VIN=0 V with PW≤10 μs
250
350
mA
500
650
mA
-9.8
-7.0
V
www.fairchildsemi.com
5
VBIAS(VCC, VBS) = 15.0 V, VS = COM, CL = 1000 pF and TA= 25°C, unless otherwise specified..
Symbol
tON
tOFF
Parameter
Turn-On Propagation Delay
Conditions
VS=0 V
(5)
Min. Typ. Max. Unit
80
150
220
ns
80
150
220
ns
Turn-Off Propagation Delay
VS=0 V or 900 V
tR
Turn-On Rise Time
VLIN=VHIN=5 V
60
140
ns
tF
Turn-Off Fall Time
VLIN=VHIN=0 V
30
80
ns
170
270
ns
DT
Dead Time
70
MT
Delay Matching, HS & LS Turn-on/off
50
ns
tPW
Minimum Input Pulse Width that changes
(5)(6)
the Output
220
ns
FL73282 — Half-Bridge Gate Driver
Dynamic Electrical Characteristics
Notes:
5. These parameters are guaranteed by design.
6. The minimum input pulse width time included dead time
© 2015 Fairchild Semiconductor Corporation
FL73282 • Rev.1.0
www.fairchildsemi.com
6
Vcc=VBS
COM=0V
CL=1nF
TA=25℃
160
140
Low-Side
120
High-Side
100
80
10
12
14
18
16
300
Turn-On Propagation Delay [nsec]
Turn-On Propagation Delay [nsec]
180
275
250
Vcc=VBS=15V
COM=0V
CL=1nF
225
200
175
Low-Side
150
High-Side
125
100
75
50
-40
20
0
-20
Turn-On Propagation Delay vs. Supply
Voltage
Turn-Off Propagation Delay [nsec]
200
Vcc=VBS
COM=0V
CL=1nF
TA=25℃
180
160
Low-Side
140
High-Side
120
100
10
12
14
18
16
Figure 6.
300
Turn-Off Propagation Delay [nsec]
Figure 5.
275
250
70
Low-Side
60
50
High-Side
40
30
20
175
150
Low-Side
125
100
High-Side
75
80
14
16
18
70
0
-20
20
Turn-On Rising Time vs. Supply Voltage
© 2015 Fairchild Semiconductor Corporation
FL73282 • Rev.1.0
40
60
80
100
120
Turn-Off Propagation Delay
vs. Temperature
60
50
Low-Side
High-Side
40
30
20
10
-20
0
20
40
60
80
100
120
Temperature [℃]
Supply Voltage [V]
Figure 9.
20
Vcc=VBS=15V
COM=0V
CL=1nF
0
-40
0
12
120
200
Figure 8.
10
10
100
Temperature [℃]
Turn-On Rising Time [nsec]
Turn-On Rising Time [nsec]
80
80
Vcc=VBS=15V
COM=0V
CL=1nF
50
-40
20
Vcc=VBS=15V
COM=0V
CL=1nF
TA=25℃
90
60
225
Turn-Off Propagation Delay vs. Supply
Voltage
100
40
Turn-On Propagation Delay
vs. Temperature
Supply Voltage [V]
Figure 7.
20
Temperature [℃]
Supply Voltage [V]
FL73282 — Half-Bridge Gate Driver
Typical Characteristics
Figure 10.
Turn-On Rising Time vs. Temperature
www.fairchildsemi.com
7
80
Vcc=VBS
COM=0V
CL=1nF
TA=25℃
60
50
40
Low-Side
30
70
Turn-Off Falling Time [nsec]
Turn-Off Falling Time [nsec]
80
70
High-Side
20
10
60
50
40
12
14
16
18
Low-Side
30
High-Side
20
10
0
10
Vcc=VBS=15V
COM=0V
CL=1nF
0
-40
20
-20
0
Supply Voltage [V]
Figure 11.
700
Turn-Off Falling Time vs. Supply Voltage
Figure 12.
500
Low-Side
450
High-Side
400
350
300
250
14
16
460
440
420
18
High-Side
380
360
340
320
-40
20
-20
0
Output Sourcing Current vs. Supply
Voltage
Figure 14.
High-Side
800
700
Low-Side
600
500
400
300
10
12
60
80
14
16
120
18
20
Figure 15. Output Sinking Current
vs. Supply Voltage
Vcc=VBS=15V
COM=0V
LO=Vcc, HO=VB
920
860
High-Side
800
Low-Side
740
680
620
560
500
-40
Supply Voltage [V]
© 2015 Fairchild Semiconductor Corporation
FL73282 • Rev.1.0
100
Output Sourcing Current vs. Temperature
980
Vcc=VBS
COM=0V
LO=Vcc, HO=VB
TA=25℃
900
40
20
Temperature [℃]
Output Sinking Current [mA]
Output Sinking Current [mA]
1100
1000
Low-Side
400
Supply Voltage [V]
Figure 13.
120
Vcc=VBS=15V
COM=0V
LO=HO=0V
480
200
12
100
Turn-Off Falling vs. Temperature
520
550
10
80
500
Output Sourcing Current [mA]
Output Sourcing Current [mA]
600
60
Temperature [℃]
Vcc=VBS
COM=0V
LO=HO=0V
TA=25℃
650
40
20
FL73282 — Half-Bridge Gate Driver
Typical Characteristics (Continued)
-20
0
20
40
60
80
100
120
Temperature [℃]
Figure 16.
Output Sinking Current vs. Temperature
www.fairchildsemi.com
8
-8
Vcc=VBS
COM=0V
TA=25℃
-4
Allowable Negative Vs Voltage for
Signal Propagation to High-Side [V]
Allowable Negative Vs Voltage for
Signal Propagation to High-Side [V]
-2
-6
-8
-10
-12
-14
-16
-18
10
12
14
16
18
Vcc=VBS=15V
COM=0V
-9
-10
-11
-12
-13
-14
-15
20
-40
-20
0
Supply Voltage [V]
80
100
95
120
Vcc=VBS=15V
COM=0V
HIN=LIN=0V
85
80
60
75
IQCC [uA]
IQCC [uA]
80
90
70
50
40
70
65
30
60
20
55
10
50
0
10
12
14
16
18
45
-40
20
-20
0
Supply Voltage [V]
Figure 19.
100
80
20
40
60
80
100
120
Temperature [℃]
IQCC vs. Supply Voltage
Figure 20.
IQCC vs. Temperature
70
VBS=15V
COM=0V
HIN=LIN=0V
TA=25℃
90
Vcc=VBS=15V
COM=0V
HIN=LIN=0V
65
60
70
55
60
50
IQBS [uA]
IQBS [uA]
60
Figure 18. Allowable Negative VS Voltage for Signal
Propagation to High Side vs. Temperature
VBS=15V
COM=0V
HIN=LIN=0V
TA=25℃
90
40
Temperature [℃]
Figure 17. Allowable Negative VS Voltage for Signal
Propagation to High Side vs. Supply Voltage
100
20
FL73282 — Half-Bridge Gate Driver
Typical Characteristics (Continued)
50
40
45
40
30
35
20
30
10
25
0
10
12
14
16
18
20
-40
20
-20
0
Supply Voltage [V]
Figure 21.
40
60
80
100
120
Temperature [℃]
IQBS vs. Supply Voltage
© 2015 Fairchild Semiconductor Corporation
FL73282 • Rev.1.0
20
Figure 22.
IQBS vs. Temperature
www.fairchildsemi.com
9
0.7
0.5
60
50
VOH [mV]
0.6
VOH [V]
70
Vcc=VBS
COM=0V
HIN=LIN=5V
IL=20mA
TA=25℃
0.4
Low-Side
0.3
High-Side
0.2
40
30
20
10
0.1
0.0
Vcc=VBS=15V
COM=0V
HIN=LIN=5V
IL=0A
High-Side
Low-Side
0
-10
10
14
12
18
16
-40
20
0
-20
Figure 23.
High-Level Output Voltage
vs. Supply Voltage
0.26
Figure 24.
70
Vcc=VBS
COM=0V
HIN=LIN=0V
IL=20mA
TA=25℃
0.24
0.22
0.20
60
50
40
80
60
100
120
High-Level Output Voltage
vs. Temperature
Vcc=VBS=15V
COM=0V
HIN=LIN=0V
IL=0A
40
0.18
VOL [mV]
VOL [V]
20
Temperature [℃]
Supply Voltage [V]
FL73282 — Half-Bridge Gate Driver
Typical Characteristics (Continued)
0.16
Low-Side
0.14
30
20
High-Side
0.12
10
0.10
High-Side
0
0.08
0.06
Low-Side
-10
10
14
12
18
16
20
-40
-20
0
Supply Voltage [V]
Figure 26.
80
80
60
100
120
Low-Level Output Voltage
vs. Temperature
40
Vcc=VBS
COM=0V
IN=VCC or IN=0V
TA=25℃
90
40
Temperature [℃]
Figure 25. Low-Level Output Voltage
vs. Supply Voltage
100
20
HIN=LIN=5V
30
60
IN+ [uA]
IN+/IN- [uA]
70
IN+
50
40
LIN
20
HIN
30
10
20
10
IN-
0
0
0
5
10
15
20
-40
-20
Supply Voltage [V]
Figure 27.
Input Bias Current vs. Supply Voltage
© 2015 Fairchild Semiconductor Corporation
FL73282 • Rev.1.0
0
20
40
60
80
100
120
Temperature [℃]
Figure 28.
Input Bias Current vs. Temperature
www.fairchildsemi.com
10
9.8
9.8
9.6
9.6
9.4
9.4
VSBUV+/VSBCUV- [V]
VCCUV+/VOCCUV- [V]
10.0
VOCCUV+
9.2
9.0
8.8
VOCCUV-
8.6
VSBUV+
9.2
9.0
8.8
VSBUV-
8.6
8.4
8.2
8.4
8.0
8.2
7.8
8.0
-40
0
-20
40
20
60
80
100
-40
120
-20
0
20
Figure 29.
60
80
VCC UVLO Threshold Voltage
vs. Temperature
Figure 30.
Input Logic Threshold Voltage [V]
VB to-COM=925V
40
30
20
10
0
-40
-20
0
20
40
60
80
100
120
VIH (HIN)
2.0
VIH (LIN)
1.8
1.6
1.4
VIL (HIN)
1.2
VIL (LIN)
1.0
0.8
-40
-20
0
20
40
60
80
100
120
Temperature [℃]
VB to COM Leakage Current
vs. Temperature
© 2015 Fairchild Semiconductor Corporation
FL73282 • Rev.1.0
120
Vcc=VBS=15V
COM=0V
2.2
Temperature [℃]
Figure 31.
100
VBS UVLO Threshold Voltage
vs. Temperature
2.4
50
ILK [uA]
40
Temperature [℃]
Temperature [℃]
FL73282 — Half-Bridge Gate Driver
Typical Characteristics (Continued)
Figure 32.
Input Logic Threshold Voltage
vs. Temperature
www.fairchildsemi.com
11
15V
VB 8
1 VCC
100nF
VB
10µF
10µF
100nF
15V
10µF
(0 V to 900 V)
VS 6
4 COM
VS
1nF
HIN
2
HIN
HO 7
HO
LIN
3 LIN
LO 5
LO
1nF
Figure 33.
Switching Time Test Circuit
FL73282 — Half-Bridge Gate Driver
Switching Time Definitions
HIN
LIN
Shoot Through
Prevent
HO
Shoot Through
Prevent
LO
DT
DT
DT
DT
Figure 34. Input / Output Timing Diagram
HIN
50%
50%
More than dead-time
LIN
50%
More than dead-time
50%
50%
tOFF
tOFF
90%
90%
tON
HO
tF
10%
10%
tOFF
tR
90%
90%
tON
LO
10%
Figure 35.
© 2015 Fairchild Semiconductor Corporation
FL73282 • Rev.1.0
Switching Time Definition
www.fairchildsemi.com
12
HIN
50%
LIN
50%
tOFF
DTLO-HO
90%
HO
10%
DTHO-LO
tR
90%
90%
LO
tOFF
10%
Figure 36.
© 2015 Fairchild Semiconductor Corporation
FL73282 • Rev.1.0
MDT= DTHO-LO - DTLO-HO
Internal Dead Time Definition
tF
10%
FL73282 — Half-Bridge Gate Driver
Switching Time Definitions (Continued)
www.fairchildsemi.com
13
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