FMS6363ACSX

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This literature is subject to all applicable copyright laws and is not for resale in any manner. FMS6363A Three-Channel 7th-Order High-Definition VoltagePlus™ Video Filter Driver Features Description   Three 7th-Order 32MHz (HD) Filters      Drives Dual AC-or DC-Coupled Video Loads (75Ω) The FMS6363A VoltagePlus™ video filter is intended to replace passive LC filters and drivers with a costeffective integrated device. The three 7th-order filters provide improved frequency response performance over the FMS6363 and other 3-channel HD VFD devices.   Robust 9kV ESD Protection Drives Single AC-or DC-Coupled Video Loads (150Ω) Transparent Input Clamping Single Supply: 3.3V – 5V AC-or DC-Coupled Inputs and Outputs DC-Coupled Output Eliminates AC-Coupling Capacitor Lead-Free SOIC-8 Package The FMS6363A may be directly driven by a DC-coupled DAC output or an AC-coupled signal. Internal diode clamps and bias circuitry may be used if AC coupled inputs are required (see Applications section for details). The outputs can drive AC-or DC-coupled single (150Ω) or dual (75Ω) video loads. DC coupling the outputs removes the need for large output coupling capacitors. The input DC levels are offset approximately +280mV at the output (see Applications section for details). Applications Related Resources       AN-6024 – FMS6xxx Product Series Understanding Analog Video Signal Clamps, Bias, DC Restore, and AC or DC coupling Methods Cable Set-Top Boxes Satellite Set-Top Boxes DVD Players AN-6041 – PCB Layout Considerations for Video Filter/Drivers HDTV Personal Video Recorders (PVR) Video On Demand (VOD) Ordering Information Part Number Operating Temperature Range Package Packing Method Quantity FMS6363ACSX -40°C to +85°C 8-Lead SOIC Reel 2500 © 2008 Fairchild Semiconductor Corporation FMS6363A • Rev. 2.0.2 www.fairchildsemi.com FMS6363A — Three-Channel 7th-Order High-Definition VoltagePlus™ Video Filter Driver August 2011 IN1 Clamp 6d B OUT1 IN2 Bias 6d B OUT2 IN3 Bias 6d B OUT3 Figure 1. th 7 -Order 30MHz Filter Pin Configuration IN1 1 8 OUT1 IN2 2 7 OUT2 IN3 3 6 OUT3 VCC 4 5 GND Figure 2. Pin Configuration Pin Definitions Pin# Name Type Description 1 IN1 Input Video Input Channel 1 2 IN2 Input Video Input Channel 2 3 IN3 Input Video Input Channel 2 4 VCC Input Positive Power Supply 5 GND Input Device Ground Connection 6 OUT3 Output Filtered Output Channel 3 7 OUT2 Output Filtered Output Channel 2 8 OUT1 Output Filtered Output Channel 1 © 2008 Fairchild Semiconductor Corporation FMS6363A • Rev. 2.0.2 2 FMS6363A —Three-Channel 7th-Order High-Definition VoltagePlus™ Video Filter Driver Block Diagram www.fairchildsemi.com Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VS DC Supply Voltage -0.3 6.0 V VIO Analog and Digital I/O -0.3 VCC+0.3 V 50 mA Min Unit VOUT Maximum Output Current, Do Not Exceed ESD Information Symbol ESD Parameter Human Body Model, JESD22-A114 9 Charged Device Model, JESD22-C101 2 kV Reliability Information Symbol TJ TSTG Parameter Min. Typ. Junction Temperature Storage Temperature Range TL Lead Temperature (Soldering, 10s) JA Thermal Resistance, JEDEC Standard, Multilayer Test Boards, Still Air -65 Max. Unit +150 °C +150 °C +300 °C 115 °C/W Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Min. TA Operating Temperature Range -40 VCC Supply Voltage Range 3.14 © 2008 Fairchild Semiconductor Corporation FMS6363A • Rev. 2.0.2 Typ. Max. Unit +85 °C 3.30 5.25 V FMS6363A —Three-Channel 7th-Order High-Definition VoltagePlus™ Video Filter Driver Absolute Maximum Ratings www.fairchildsemi.com 3 Unless otherwise noted TA=25°C, VCC=3.3V, RS=37.5Ω; all inputs are AC-coupled with 0.1µF; all output AC-coupled with 220µF into 150Ω load. Symbol Parameter Conditions Min. Typ. Max. 3.14 Units Supply VS Supply Voltage Range VS Range 3.30 5.25 V VS=+3.3V, No Load 22 35 mA VS=+5V, No Load 34 40 mA ICC Quiescent Supply Current(1) VIN Video Input Voltage Range Referenced to GND if DC Coupled 1.4 VPP Power Supply Rejection Ratio DC (All Channels) -60 dB PSRR AC Electrical Characteristics Unless otherwise noted, TA=25°C, VCC=3.3V, RS=37.5Ω; all inputs are AC-coupled with 0.1µF; all outputs AC-coupled with 220µF into 150Ω load. Symbol AV Parameter Channel Gain BW0.5dB ±0.5dB Bandwidth BW-1.0dB -1.0 dB Bandwidth BW3.0dB -3.0 dB Bandwidth Conditions Active Video Input Range = 1VPP RSOURCE=75Ω, RL=150Ω Min. Typ. Max. 5.8 6.0 6.2 MHz 26 30 MHz 30 34 MHz RSOURCE=75Ω, f=37.325MHz 6.5 Att44.25M RSOURCE=75Ω, f=44.25MHz 14.5 Normalized Stopband Attenuation RSOURCE=75Ω, f=74.25MHz 40 44 Att78M RSOURCE=75Ω, f=78MHz 46 THD1 f=10 MHz; VOUT=1.4VPP -49 f=15 MHz; VOUT=1.4VPP -48 f=22 MHz; VOUT=1.4VPP -45 THD2 THD3 Output Distortion (All Channels) dB 28 Att37.125M Att74.25M Units dB dBC Xtalk Crosstalk (Channel-to-Channel) f=1.00 MHz; VOUT=1.4VPP -65 dB SNR Peak Signal to RMS Noise Unweighted: 30MHz Lowpass, 100kHz to 30MHz 65 dB Propagation Delay Delay from Input to Output; 100KHz to 28MHz 12 ns tpd © 2008 Fairchild Semiconductor Corporation FMS6363A • Rev. 2.0.2 FMS6363A —Three-Channel 7th-Order High-Definition VoltagePlus™ Video Filter Driver DC Electrical Characteristics www.fairchildsemi.com 4 Figure 3. © 2008 Fairchild Semiconductor Corporation FMS6363A • Rev. 2.0.2 Typical Application FMS6363A —Three-Channel 7th-Order High-Definition VoltagePlus™ Video Filter Driver Typical Application www.fairchildsemi.com 5 75Ω Application Circuits The FMS6363A VoltagePlus™ video filter provides 6dB gain from input to output. In addition, the input is slightly offset to optimize the output driver performance. The offset is held to the minimum required value to decrease the standing DC current into the load. Typical voltage levels are shown in Figure 4: LOAD2 (optional) 75Ω 0.65 V YIN Driver 1.0 -> 1.02V YOUT LOAD1 75Ω Video Cables 75Ω Figure 5. Input Clamp Circuit 0.65 -> 0.67V I/O Configurations 0.3 -> 0.32V 0.0 -> 0.02V For a DC-coupled DAC drive with DC-coupled outputs, use this configuration: V IN 2.28V 1.58V 0.88V 0.28V Video Cables V OUT Driven by: DC-Coupled DAC Outputs AC-Coupled and Clamped Y, CV, R, G, B 0V - 1.4V DVD or STB SoC DAC Output LCVF Clamp Inactive 75W There is a 280mV offset from the DC input level to the DC output level. V OUT = 2 * V IN + 280mV. Figure 6. DC-Coupled Inputs and Outputs 0.85V Alternatively, if the DAC’s average DC output level causes the signal to exceed the range of 0V to 1.4V, it can be AC coupled as follows: 0.5V 0.15V V IN 1.98V 0V - 1.4V DVD or STB SoC DAC Output Driven by: AC-Coupled and Biased U, V, Pb, Pr, C 1.28V 0.58V V OUT 0.1μ LCVF Clamp Active 75Ω Figure 4. Typical Voltage Levels The FMS6363A provides an internal diode clamp to support AC coupled input signals. If the input signal does not go below ground, the input clamp does not operate. This allows DAC outputs to directly drive the FMS6363A without an AC coupling capacitor. When the input is AC coupled, the diode clamp sets the sync tip (or lowest voltage) just below ground. The worst-case sync tip compression due to the clamp can not exceed 7mV. The input level set by the clamp, combined with the internal DC offset, keeps the output within its acceptable range. Figure 7. AC-Coupled Inputs, DC-Coupled Outputs When the FMS6363A is driven by an unknown external source or a SCART switch with its own clamping circuitry, the inputs should be AC-coupled like this: 0V - 1.4V External video source must be AC coupled For symmetric signals like Chroma, U, V, Pb, and Pr; the average DC bias is fairly constant and the inputs can be AC-coupled. DAC outputs can also drive these same signals without the AC coupling capacitor. A conceptual illustration of the input clamp circuit is shown in Figure 5. © 2008 Fairchild Semiconductor Corporation FMS6363A • Rev. 2.0.2 FMS6363A —Three-Channel 7th-Order High-Definition VoltagePlus™ Video Filter Driver Application Information 0.1μ LCVF Clamp Active 75Ω 75Ω Figure 8. SCART with DC-Coupled Outputs www.fairchildsemi.com 6 External video source must be AC coupled Power Dissipation The FMS6363A output drive configuration must be considered when calculating overall power dissipation. Care must be taken not to exceed the maximum die junction temperature. The following example can be used to calculate the power dissipation and internal temperature rise: 0V 0.1µ LCVF Clamp Active 220µ 75 75 Figure 9. Biased SCART with DC-Coupled Outputs The same circuits can be used with AC-coupled outputs if desired. 0.1μ (1) where: Pd = PCH1 + PCH2 + PCH3 (2) PCHx = VCC • ICH - (VO2/RL) (3) where: VO = 2VIN + 0.280V (4) ICH = (ICC/3) + (VO/RL) (5) VIN = RMS value of input signal 0V - 1.4V DVD or STB SoC DAC Output TJ = TA + Pd • JA LCVF Clamp Active ICC = 22mA 220μ 75Ω VCC = 3.3V RL = channel load resistance Board layout can also affect thermal characteristics. Refer to the Layout Considerations section for details. The FMS6363A is specified to operate with output currents typically less than 50mA, more than sufficient for a dual (75Ω) video load. Internal amplifiers are current limited to a maximum of 100mA and should withstand brief-duration short-circuit conditions. This capability is not guaranteed. Figure 10. DC-Coupled Inputs, AC-Coupled Outputs 0V - 1.4V 0.1μ DVD or STB SoC DAC Output LCVF Clamp Active 220μ 75Ω Figure 11. AC-Coupled Inputs and Outputs External video source must be AC coupled 0V 0.1µ LCVF Clamp Active 75 220µ FMS6363A —Three-Channel 7th-Order High-Definition VoltagePlus™ Video Filter Driver The same method can be used for biased signals. The Pb and Pr channels are baised to set the DC level to 500mV. 75 Figure 12. Biased SCART with AC-Coupled Outputs Note: 1. The video tilt or line time distortion is dominated by the AC-coupling capacitor. The value may need to be increased beyond 220μF to obtain satisfactory operation in some applications. © 2008 Fairchild Semiconductor Corporation FMS6363A • Rev. 2.0.2 www.fairchildsemi.com 7 The selection of the coupling capacitor is a function of the subsequent circuit input impedance and the leakage current of the input being driven. To obtain the highest quality output video signal, the series termination resistor must be placed as close to the device output pin as possible. This greatly reduces the parasitic capacitance and inductance effect on the output driver. Distance from the device pin to the series termination resistor should be no greater than 2.54mm (0.1in). General layout and supply bypassing play a major role in high-frequency performance and thermal characteristics. Fairchild offers a evaluation board to guide layout and aid device evaluation. The evaluation board is a four-layer board with full power and ground planes. Following this layout configuration provides optimum performance and thermal characteristics for the device. For the best results, follow the steps and recommended routing rules listed below. Recommended Routing / Layout Rules   Do not run analog and digital signals in parallel.  Traces should run on top of the ground plane at all times.    No trace should run over ground/power splits.  Include 10μF and 0.1μF ceramic power supply bypass capacitors.  Place the 0.1μF capacitor within 2.54mm (0.1in) of the device power pin.  Place the 10μF capacitor within 19.05mm (0.75in) of the device power pin.  For multi-layer boards, use a large ground plane to help dissipate heat.  For two-layer boards, use a ground plane that extends beyond the device body at least 12.7mm (0.5in) on all sides. Include a metal paddle under the device on the top layer.  Use separate analog and digital power planes to supply power. Avoid routing at 90° angles. Figure 13. Minimize clock and video data trace length differences. Thermal Considerations Since the interior of most systems, such as set-top boxes, TVs, and DVD players, are at +70ºC; consideration must be given to providing an adequate heat sink for the device package for maximum heat dissipation. When designing a system board, determine how much power each device dissipates. Ensure that devices of high power are not placed in the same location, such as directly above (top plane) or below (bottom plane), each other on the PCB. PCB Thermal Layout Considerations Minimize all trace lengths to reduce series inductance. Output Considerations The FMS6363A outputs are DC offset from the input by 150mV; therefore, VOUT = 2•VIN DC+150mV. This offset is required to obtain optimal performance from the output driver and is held at the minimum value to decrease the standing DC current into the load. Since the FMS6363A has a 2x (6dB) gain, the output is typically connected via a 75Ω-series back-matching resistor followed by the 75Ω video cable. Due to the inherent divide-by-two of this configuration, the blanking level at the load of the video signal is always less than 1V. When AC-coupling the output, ensure that the coupling capacitor of choice passes the lowest frequency content in the video signal and that line time distortion (video tilt) is kept as low as possible. © 2008 Fairchild Semiconductor Corporation FMS6363A • Rev. 2.0.2 Termination Resistor  Understand the system power requirements and environmental conditions.   Maximize thermal performance of the PCB. Consider using 70μm of copper for high-power designs.  Make the PCB as thin as possible by reducing FR4 thickness.  Use vias in the power pad to tie adjacent layers together.  Remember that baseline temperature is a function of board area, not copper thickness.  Use modeling techniques to provide a first-order approximation. FMS6363A —Three-Channel 7th-Order High-Definition VoltagePlus™ Video Filter Driver Layout Considerations www.fairchildsemi.com 8 5.00 4.80 A 0.65 3.81 5 8 B 1.75 6.20 5.80 PIN ONE INDICATOR 4.00 3.80 1 5.60 4 1.27 (0.33) 1.27 0.25 C B A LAND PATTERN RECOMMENDATION SEE DETAIL A 0.25 0.10 1.75 MAX 0.25 0.19 C 0.51 0.33 0.10 C OPTION A - BEVEL EDGE 0.50 x 45° 0.25 R0.10 GAGE PLANE R0.10 OPTION B - NO BEVEL EDGE 0.36 NOTES: UNLESS OTHERWISE SPECIFIED 8° 0° 0.90 0.40 A) THIS PACKAGE CONFORMS TO JEDEC MS-012, VARIATION AA, ISSUE C, B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS. D) LANDPATTERN STANDARD: SOIC127P600X175-8M. E) DRAWING FILENAME: M08AREV13 SEATING PLANE (1.04) DETAIL A FMS6363A —Three-Channel 7th-Order High-Definition VoltagePlus™ Video Filter Driver Physical Dimensions SCALE: 2:1 Figure 14. 8-Lead Small Outline Integrated Circuit (SOIC) Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2008 Fairchild Semiconductor Corporation FMS6363A • Rev. 2.0.2 www.fairchildsemi.com 9 FMS6363A —Three-Channel 7th-Order High-Definition VoltagePlus™ Video Filter Driver © 2008 Fairchild Semiconductor Corporation FMS6363A • Rev. 2.0.2 www.fairchildsemi.com 10 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. 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