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FMS6406
Precision S-Video Filter with Summed Composite
Output, Sound Trap, and Group Delay Compensation
Features
Description
■ 7.6MHz 5th-order Y,C filters with composite summer
The FMS6406 is a dual Y/C 5th-order Butterworth lowpass
video filter optimized for minimum overshoot and flat
group delay. The device also contains a summing circuit
to generate filtered composite video, an audio trap and
group delay compensation circuit. The audio trap removes
video information in the spectral location of the subsequent
RF audio carrier. The group delay circuit predistorts the
signal to compensate for the inherent receiver IF filter’s
group delay distortion.
■ 14dB notch at 4.425MHz to 4.6MHz for sound trap
■
■
■
■
■
■
■
■
■
■
■
capable of handling stereo
50dB stopband attenuation at 27MHz on Y, C,
and CV outputs
Better than 0.5dB flatness to 4.2MHz on Y, C,
and CV outputs
Equalizer and notch filter for driving RF modulator with
group delay of -180ns
No external frequency selection components or clocks
< 5ns group delay on Y, C, and CV outputs
AC coupled inputs
AC or DC coupled outputs
Capable of PAL frequency for Y, C, CV
Continuous Time Low Pass Filters
3.75MHz to 4.2MHz
-0.5
0
0.5
dB
Atten1
Notch Attenuation 11
EQ_NOTCH at 4.425MHz
14
dB
Atten2
Notch Attenuation 2
1
EQ_NOTCH at 4.5MHz
20
dB
Atten3
Notch Attenuation 31
EQ_NOTCH at 4.6MHz
14
dB
tPASS
Passband Group Delay, EQ_NOTCH
f = 400kHz to f = 3MHz
-35
2
1
EQ_NOTCH Channel
EQ_NOTCH Channel
2
1
35
ns
Notes:
1. 100% tested at 25°C.
2. Guaranteed by characterization.
3. Tested down to 400kHz, but guaranteed by design to 200kHz.
4. Sustained short circuit protection limited to 10 seconds.
© 2006 Fairchild Semiconductor Corporation
FMS6406 Rev. 4.0.4
www.fairchildsemi.com
FMS6406 Precision S-Video Filter with Summed Composite Output, Sound Trap, and Group Delay Compensation
Electrical Characteristics
Tc = 25°C, Vi = 1Vpp, VCC = 5V, all inputs AC-coupled with 0.1μF, all outputs are AC-coupled with 220μF into
150Ω, referenced to 400kHz; unless otherwise noted.
10
140
120
12
0
Delay (ns)
Gain (dB)
-20
-30
-40
-50
Mkr Frequency
Ref 400kHz
1
2
3
Gain
6dB
6.53MHz
3
-1dB BW
7.87MHz
27MHz
-60
400kHz
5
10
15
1 = 8.2MHz (111.35ns)
20
25
0
400kHz
30
10
Delay (ns)
Mkr Frequency
Ref 400kHz
1
2
3
Gain
6dB
6.68MHz
3
-1dB BW
7.87MHz
27MHz
-60
400kHz
5
10
15
80
60
40
-3dB BW
-44.41dB
20
1 = 8.2MHz (111.16ns)
fSB = Gain(ref) – Gain(3) = 50.41dB
20
25
0
400kHz
30
5
10
Frequency (MHz)
20
25
30
Figure 4. Group Delay vs. Frequency COUT
10
140
0
120
12
1
100
Delay (ns)
-10
Gain (dB)
15
Frequency (MHz)
Figure 3. Frequency Response COUT
-20
Mkr Frequency
Gain
Ref 400kHz
6dB
1
2
3
6.53MHz
3
-1dB BW
7.72MHz
27MHz
-60
400kHz
5
10
15
60
20
1 = 8.2MHz (112.84ns)
20
25
0
400kHz
30
Frequency (MHz)
5
10
15
20
25
30
Frequency (MHz)
Figure 5. Frequency Response CVOUT
© 2006 Fairchild Semiconductor Corporation
80
40
-3dB BW
-43.49dB
fSB = Gain(ref) – Gain(3) = 49.49dB
FMS6406 Rev. 4.0.4
30
1
100
-20
-50
25
120
12
-10
-40
20
140
0
-30
15
Figure 2. Group Delay vs. Frequency YOUT
10
Gain (dB)
5
Frequency (MHz)
Figure 1. Frequency Response YOUT
-50
60
20
Frequency (MHz)
-40
80
40
-3dB BW
-44.66dB
fSB = Gain(ref) – Gain(3) = 50.66dB
-30
1
100
-10
Figure 6. Group Delay vs. Frequency CVOUT
www.fairchildsemi.com
FMS6406 Precision S-Video Filter with Summed Composite Output, Sound Trap, and Group Delay Compensation
Typical Performance Characteristics
1500
10
5
0
-5
-10
-15
1
-20
-25
-30
-35
-40
-45
-50
1 = 4.425MHz (-16.00dB)
-55
400kHz
5
10
15
1000
1
500
Delay (ns)
Gain (dB)
Tc = 25°C, Vi = 1Vpp, VCC = 5V, HD/N_SD = 0, RSOURCE = 37.5Ω, all inputs AC-coupled with 0.1μF, all outputs
are AC-coupled with 220μF into 150Ω, referenced to 400kHz; unless otherwise noted.
0
-500
-1000
-1500
-2000
20
25
1 = 4.425MHz (198.47ns)
-2500
400kHz
30
5
10
Frequency (MHz)
Figure 7. Modulator vs. Frequency Response
0.2
NTSC
0.1
0
-0.1
30
NTSC
0.1
0
-0.2
Min = -0.19
Max = 0.16
ppMax = 0.34
-0.3
1st
2nd
Min = -0.17
Max = 0.07
ppMax = 0.25
-0.3
3rd
4th
5th
6th
1st
Figure 9. Differential Gain, MODOUT
2nd
3rd
4th
5th
6th
Figure 10. Differential Phase, MODOUT
-60
200
-65
150
-70
100
Delay (ns)
Noise (dB)
25
-0.1
-0.2
-75
-80
-85
Group Delay @ 3.58MHz = -178ns
50
0
-50
-90
-100
-95
-150
-200
-100
0
1
2
3
4
5
0
Frequency (MHz)
© 2006 Fairchild Semiconductor Corporation
1.0
2.0
3.0
4.0
4.6
Frequency (MHz)
Figure 11. Noise vs. Freq. Modulator Channel
FMS6406 Rev. 4.0.4
20
Figure 8. Delay Modulator Output
Differential Phase (deg)
Differential Gain (%)
0.2
15
Frequency (MHz)
Figure 12. Group Delay vs. Frequency
www.fairchildsemi.com
FMS6406 Precision S-Video Filter with Summed Composite Output, Sound Trap, and Group Delay Compensation
Typical Performance Characteristics
Tc = 25°C, Vi = 1Vpp, VCC = 5V, HD/N_SD = 0, RSOURCE = 37.5Ω, all inputs AC-coupled with 0.1μF, all outputs
are AC-coupled with 220μF into 150Ω, referenced to 400kHz; unless otherwise noted.
1.5
Differential Gain (%)
0.8
Min = -0.00
Max = 1.17
ppMax = 1.16
NTSC
Differential Phase (deg)
2.0
1.0
0.5
0
-0.5
2nd
3rd
4th
5th
0.25
NTSC
Differential Phase (deg)
Differential Gain (%)
0.4
0.2
0
Min = -0.00
Max = 0.88
ppMax = 0.87
1st
2nd
3rd
4th
0.10
0.05
0
Min = -0.04
Max = 0.21
ppMax = 0.25
-0.10
4th
5th
6th
1st
1.5
2nd
3rd
4th
5th
6th
Figure 16. Differential Phase, COUT
0.5
Min = -0.00
Max = 1.42
ppMax = 1.40
NTSC
6th
NTSC
-0.05
3rd
5th
0.15
Differential Phase (deg)
Differential Gain (%)
2nd
0.20
Figure 15. Differential Gain, COUT
1.0
0.5
0
-0.5
0.4
0.3
NTSC
Min = -0.00
Max = 0.46
ppMax = 0.46
0.2
0.1
0
-0.1
1st
2nd
3rd
4th
5th
6th
1st
Figure 17. Differential Gain, CVOUT
© 2006 Fairchild Semiconductor Corporation
FMS6406 Rev. 4.0.4
0
Figure 14. Differential Phase, VOUT
0.8
2.0
0.2
1st
1.0
-0.4
0.4
6th
Figure 13. Differential Gain, VOUT
-0.2
0.6
-0.2
1st
1.2
Min = -0.01
Max = 0.59
ppMax = 0.60
NTSC
2nd
3rd
4th
5th
6th
Figure 18. Differential Phase, CVOUT
www.fairchildsemi.com
FMS6406 Precision S-Video Filter with Summed Composite Output, Sound Trap, and Group Delay Compensation
Typical Performance Characteristics
-60
-50
-65
-55
-70
-60
-65
-75
Noise (dB)
Noise (dB)
Tc = 25°C, Vi = 1Vpp, VCC = 5V, HD/N_SD = 0, RSOURCE = 37.5Ω, all inputs AC-coupled with 0.1μF, all outputs
are AC-coupled with 220μF into 150Ω, referenced to 400kHz; unless otherwise noted.
-80
-85
-90
-95
-90
-100
-95
-100
-105
-110
-105
0
1.0
2.0
3.0
Frequency (MHz)
4.0
5.0
0
1.0
2.0
3.0
4.0
5.0
Frequency (MHz)
Figure 19. Noise vs. Frequency YOUT
Noise (dB)
-70
-75
-80
-85
Figure 20. Noise vs. Frequency COUT
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
-105
-110
0
1.0
2.0
3.0
4.0
5.0
Frequency (MHz)
Figure 21. Noise vs. Frequency CVOUT
© 2006 Fairchild Semiconductor Corporation
FMS6406 Rev. 4.0.4
www.fairchildsemi.com
FMS6406 Precision S-Video Filter with Summed Composite Output, Sound Trap, and Group Delay Compensation
Typical Performance Characteristics
FMS6406 Precision S-Video Filter with Summed Composite Output, Sound Trap, and Group Delay Compensation
Typical Application Diagrams
4.5MHz FM Sound
FMS6406
Notch and
Group
Delay
YIN
1
2
+
Video
Modulator
8
5th-Order
Filter
+
YOUT
6
To TV
+
CIN
4
5
5th-Order
Filter
7
To Channel 3 or 4
CVOUT to VCR
3
5V
COUT
Figure 22. AC-Coupled Application Diagram
4.5MHz FM Sound
FMS6406
Notch and
Group
Delay
YIN
1
2
+
Video
Modulator
8
5th-Order
Filter
+
YOUT
6
To TV
+
CIN
4
5
5th-Order
Filter
7
To Channel 3 or 4
CVOUT to VCR
3
5V
COUT
Figure 23. DC-Coupled Application Diagram
© 2006 Fairchild Semiconductor Corporation
FMS6406 Rev. 4.0.4
www.fairchildsemi.com
Chrominance (C) I/O
Introduction
The chrominance input can be driven in the same manner
as the luminance input but is typically only a 0.7Vpp signal.
This product is a two channel monolithic continuous time
video filter designed for reconstructing the luminance and
chrominance signals from an S-Video D/A source.
Composite video output is generated by summing the Y
and C outputs. The chip is designed to have AC coupled
inputs and will work equally well with either AC or DC
coupled outputs.
The reconstruction filters provide a 5th-order Butterworth
response with group delay equalization. This provides a
maximally flat response in terms of delay and amplitude.
Each of the four outputs is capable of driving 2Vpp into a
75Ω load.
The composite video output driver is same as the other
outputs. When driving a dual load either output will still
function if the other output connection is inadvertently
shorted providing these loads are AC-coupled.
This output is designed to drive a 600Ω load to 2Vpp,
which will meet its primary intention of driving a modulator
load.
Layout Considerations
General layout and supply bypassing play major roles in
high-frequency performance and thermal characteristics.
The FMS6406DEMO is a 4-layer board with a full power
and ground plane. Following this layout configuration will
provide the optimum performance and thermal characteristics. For optimum results, follow the steps below as a
basis for high frequency layout:
In most applications the input coupling capacitors are
0.1μF. The Y and C inputs typically sink 1μA of current
during active video, which normally tilts a horizontal line
by 2mV at the Y output. During sync, the clamp restores
this leakage current by sourcing an average of 20μA over
the clamp interval. Any change in the coupling capacitor
values will affect the amount of tilt per line. Any reduction
in tilt will come with an increase in settling time.
■ Include 1µF and 0.1µF ceramic bypass capacitors
■ Place the 1µF capacitor within 0.75 inches of the
power pin
Luminance (Y) I/O
■ Place the 0.1µF capacitor within 0.1 inches of the
power pin
The typical luma input is driven by either a low impedance
source of 1Vpp or the output of a 75Ω terminated line
driven by the output of a current DAC. In either case, the
input must be capacitively coupled to allow the syncdetect and DC restore circuitry to operate properly.
■ For multi-layer boards, use a large ground plane to
help dissipate heat
■ For 2-layer boards, use a ground plane that extends
beyond the device by at least 0.5”
All outputs are capable of driving 2Vpp, AC or DC-coupled,
into either a single or dual video load. A single video load
consists of a series 75Ω impedance matching resistor
connected to a terminated 75Ω line, this presents a total
of 150Ω of loading to the part. A dual load would be two of
these in parallel which would present a total of 75Ω to the
part. The gain of the Y, C and CV signals is 6dB with 1Vpp
input levels. Even when two loads are present the driver
will produce a full 2Vpp signal at its output pin.
FMS6406 Rev. 4.0.4
Composite Video (CV) Output
Equalizer/Notch (EQ_NOTCH) Output
All channels are clamped during the sync interval to set the
appropriate minimum output DC level. With this operation
the effective input time constant is greatly reduced, which
allows for the use of small low cost coupling capacitors.
The net effect is that the input will settle to 10mV in 5ms
for any DC shifts present in the input video signal.
© 2006 Fairchild Semiconductor Corporation
Since the chrominance signal doesn’t contain any DC
content, the output signal can be AC coupled using as
small as a 0.1μF capacitor if DC-coupling is not desired.
■ Minimize all trace lengths to reduce series inductances
10
www.fairchildsemi.com
FMS6406 Precision S-Video Filter with Summed Composite Output, Sound Trap, and Group Delay Compensation
Functional Description
FMS6406 Precision S-Video Filter with Summed Composite Output, Sound Trap, and Group Delay Compensation
Mechanical Dimensions
8-Lead Outline Package (SOIC)
© 2006 Fairchild Semiconductor Corporation
FMS6406 Rev. 4.0.4
11
www.fairchildsemi.com
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which, (a) are intended for surgical implant into the body,
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when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In
Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
P re l i m i n a r y
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
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This datasheet contains final specifications. Fairchild
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any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I19
www.fairchildsemi.com
12
©2006 Fairchild Semiconductor Corporation
FMS6406 Precision S-Video Filter with Summed Composite Output, Sound Trap, and Group Delay Compensation
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