LVTTL/LVCMOS COMPATIBLE LOW INPUT
CURRENT HIGH GAIN SPLIT DARLINGTON
OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
FOD070L
FOD073L
FOD270L
DESCRIPTION
The FOD070L, FOD270L and FOD073L optocouplers consist of an AlGaAs
LED optically coupled to a high gain split darlington photodetector. These
devices are specified to operate at a 3.3V supply voltage.
8
The split darlington configuration separating the input photodiode and the first
stage gain from the output transistor permits lower output saturation voltage
and higher speed operation than possible with conventional darlington
phototransistor optocoupler. In the dual channel device FOD073L, an integrated emitter – base resistor provides superior stability over temperature.
The combination of a very low input current of 0.5 mA and a high current
transfer ratio of 2000% makes this family particularly useful for input interface
to MOS, CMOS, LSTTL and EIA RS232C, while output compatibility is
ensured to LVCMOS as well as high fan-out LVTTL requirements.
1
8
8
1
1
An internal noise shield provides exceptional common mode rejection of
10 kV/µs.
FEATURES
• Low power consumption
• Low input current - 0.5 mA
• Available in single channel 8-pin DIP (FOD270L), 8-pin SOIC (FOD070L)
and dual channel 8-pin SOIC
• High CTR-2000%
• High CMR-10 kV/µs
• Guaranteed performance over temperature 0°C to 70°C
• U.L. recognized (File # E90700)
• LVTTL/LVCMOS Compatible output
8 VCC
N/C 1
8 VCC
+ 1
V
F1
7 VB
+ 2
_ 2
7 V01
VF
_
6 VO
3
_
6 V02
3
V
F2
5 GND
N/C 4
FOD070L / FOD270L
5 GND
+ 4
FOD073L
APPLICATIONS
•
•
•
•
•
•
Digital logic ground isolation – LVTTL/LVCMOS
Telephone ring detector
EIA-RS-232C line receiver
High common mode noise line receiver
µP bus isolation
Current loop receiver
TRUTH TABLE
LED
VO
ON
LOW
OFF
HIGH
© 2004 Fairchild Semiconductor Corporation
Page 1 of 17
8/10/04
LVTTL/LVCMOS COMPATIBLE LOW INPUT
CURRENT HIGH GAIN SPLIT DARLINGTON
OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
FOD070L
FOD073L
FOD270L
ABSOLUTE MAXIMUM RATINGS (No derating required up to 85°C)
Parameter
Symbol
Value
Units
Storage Temperature
TSTG
-40 to +125
°C
Operating Temperature
TOPR
-40 to +85
°C
Lead Solder Temperature (Wave solder only. See reflow profile for surface
mount devices)
TSOL
260 for 10 sec
°C
EMITTER
DC/Average Forward Input Current
Each Channel
IF (avg)
20
mA
Peak Forward Input Current (50% duty cycle, 1 ms P.W.)
Each Channel
IF (pk)
40
mA
Peak Transient Input Current - (≤1 µs P.W., 300 pps)
Each Channel
IF (trans)
1.0
A
Reverse Input Voltage
Each Channel
VR
5
V
Input Power Dissipation
Each Channel
PD
35
mW
DETECTOR
Average Output Current
Each Channel
IO (avg)
60
mA
Emitter-Base Reverse Voltage (FOD070L, FOD270L)
Each Channel
VEB
0.5
V
Supply Voltage, Output Voltage
Each Channel
VCC, VO
-0.5 to 7
V
Output power dissipation
Each Channel
PD
100
mW
ELECTRICAL CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified)
INDIVIDUAL COMPONENT CHARACTERISTICS
Parameter
Test Conditions
EMITTER
Input Forward Voltage
Logic Low Supply
Current
Logic High Supply
Current
Device
VF
All
BVR
All
IOH
FOD070L
FOD270L
TA =25°C
Each Channel (IF = 1.6 mA)
(TA =25°C, IR = 10 µA)
Input Reverse Breakdown
Voltage
DETECTOR
Logic high output current
Symbol
Each Channel
(IF = 0 mA, VO = VCC = 3.3 V)
IF1 = IF2 = 0mA
VO1 = VO2 = Open, VCC = 3.3 V
ICCH
1.35
1.7
1.75
5.0
Unit
V
V
FOD070L
FOD270L
0.5
1.5
FOD073L
0.8
3
FOD070L
FOD270L
0.01
1
FOD073L
0.01
2
IF = 1.6 mA, VO = Open, VCC = 3.3V
IF = 0 mA, VO = Open, VCC = 3.3V
Max
25
FOD073L
IF1 = IF2 = 1.6mA
VO1 = VO2 = Open, VCC = 3.3 V
Typ**
0.05
Each Channel
ICCL
Min
µA
mA
µA
**All typicals at TA = 25°C
© 2004 Fairchild Semiconductor Corporation
Page 2 of 17
8/10/04
LVTTL/LVCMOS COMPATIBLE LOW INPUT
CURRENT HIGH GAIN SPLIT DARLINGTON
OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
FOD070L
FOD073L
FOD270L
TRANSFER CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified)
Parameter
COUPLED
Current transfer ratio
(Notes 1,2)
Logic low output voltage
output voltage
(Note 2)
Test Conditions Symbol
(IF = 0.5 mA, VO = 0.4 V, VCC = 3.3V)
CTR
(IF = 1.6 mA, IO = 8 mA, VCC = 3.3V)
(IF = 5 mA, IO = 15 mA, VCC = 3.3V)
VOL
Device
Min
ALL
400
Typ**
Max
Unit
7000
%
ALL
0.07
0.3
ALL
0.07
0.4
V
**All typicals at TA = 25°C
SWITCHING CHARACTERISTICS (TA = 0 to 70°C unless otherwise specified., VCC = 3.3 V)
Parameter
Test Conditions
Symbol
Device
(RL = 4.7 kΩ, IF = 0.5 mA)
(Note 2) (Fig. 17)
TPHL
FOD070L
FOD270L
3
FOD073L
5
(RL = 4.7 kΩ, IF = 0.5 mA)
(Note 2) (Fig. 17)
TPLH
FOD070L
FOD270L
50
FOD073L
25
Common mode transient
immunity at logic high
(IF = 0 mA, |VCM| = 10 VP-P)
TA = 25°C (RL = 2.2 kΩ) (Note 3) (Fig. 18)
|CMH|
ALL
1,000
10,000
V/µs
Common mode transient
immunity at logic low
(IF = 1.6 mA, |VCM| = 10 VP-P,
RL = 2.2 kΩ)
TA = 25°C (Note 3) (Fig. 18)
|CML|
ALL
1,000
10,000
V/µs
Propagation delay
time to logic low
Propagation delay
time to logic high
Min
Typ**
Max
Unit
30
µs
90
µs
** All typicals at TA = 25°C
© 2004 Fairchild Semiconductor Corporation
Page 3 of 17
8/10/04
LVTTL/LVCMOS COMPATIBLE LOW INPUT
CURRENT HIGH GAIN SPLIT DARLINGTON
OPTOCOUPLERS
SINGLE CHANNEL:
DUAL CHANNEL:
FOD070L
FOD073L
FOD270L
ISOLATION CHARACTERISTICS (TA = 0 to 70°C Unless otherwise specified)
Characteristics
Test Conditions Symbol
(Relative humidity = 45%)
(TA = 25°C, t = 5 s)
(VI-O = 3000 VDC)
(Note 4)
Input-output
insulation leakage current
Min
Typ**
Max
Unit
1.0
µA
II-O
ALL
(RH ≤ 50%, TA = 25°C)
(Note 4) ( t = 1 min.)
VISO
FOD070L
FOD073L
2500
FOD270L
5000
(Note 4) (VI-O = 500 VDC)
RI-O
ALL
1012
Ω
(Note 4,5) (f = 1 MHz)
CI-O
ALL
0.7
pF
(RH ≤ 45%, VI-I = 500 VDC (Note 6)
II-I
FOD073L
(VI-I = 500 VDC) (Note 6)
RI-I
FOD073L
1011
Ω
(f = 1 MHz) (Note 6)
CI-I
FOD073L
0.03
pF
Withstand insulation
test voltage
Resistance (input to output)
Capacitance (input to output)
Input-Input
Insulation leakage current
Device
Input-Input Resistance
Input-Input Capacitance
VRMS
0.005
µA
** All typicals at TA = 25°C
NOTES
1. Current Transfer Ratio is defined as a ratio of output collector current, IO, to the forward LED input current, IF, times 100%.
2. Pin 7 open. (FOD070L and FOD270L only)
3. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVCM/dt on the leading edge of the
common mode pulse signal, VCM, to assure that the output will remain in a logic high state (i.e., VO>2.0 V). Common mode
transient immunity in logic low level is the maximum tolerable (negative) dVCM/dt on the trailing edge of the common mode
pulse signal, VCM, to assure that the output will remain in a logic low state (i.e., VO
