Features
Description
The FPF2281 features a low -RON internal FET and an
operating range of 2.5 V DC to 25 V DC (absolute
maximum of 29 V DC). An internal clamp is capable of
shunting surge voltages >100 V, protecting dow nstream
components and enhancing system robustness. The
FPF2281 features over-voltage protection that pow ers
dow n the internal FET if the input voltage exceeds the
OVP threshold. The OVP threshold is adjustable w ith
optional external resistors. Over-temperature protection
also pow ers dow n the device at 130°C (typical).
Exceptionally low off-state current ( 100 V
Over-Voltage Protection (OVP)
Over-Temperature Protection (OTP)
ESD Protection
- Human Body Model (HBM): > 3.5 kV
- Charged Device Model (CDM): > 2 kV
- IEC 61000-4-2 Air Discharge: > 15 kV
- IEC 61000-4-2 Contact Discharge: > 8 kV
Applications
The FPF2281 is available in a fully “green” compliant
1.3 mm × 1.8 mm Wafer-Level Chip-Scale Package
(WLCSP) w ith backside laminate.
Portable Media Players
Related Resources
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Mobile Handsets and Tablets
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Ordering Information
Part Number
Operating
Top Mark
Temperature Range
FPF2281BUCX-F130
-40°C – 85°C
HE
Package
Packing
Method
12-Ball, 0.4 mm Pitch WLCSP
Tape & Reel
Vpu
IN
OUT
CIN
COUT
R1
Rpu
Gate Driver, Charge
Pump, Bandgap,
Oscillator
OVLO
OVP
LOGIC
#ACOK
R2
OTP
GND
Figure 1.
© 2013 Semiconductor Components Industries, LLC.
November-2017,Rev. 2
Functional Block Diagram
Publication Order Number:
FPF2281/D
FPF2281 — Over-Voltage Protection Load Switch
FPF2281
Over-Voltage Protection Load Switch
FPF2281 — Over-Voltage Protection Load Switch
Pin Configuration
1
2
3
4
4
3
2
1
A
#EN
OUT
OUT
GND
GND
OUT
OUT
#EN
A
B
#ACOK
OUT
IN
GND
GND
IN
OUT
#ACOK
B
C
OVLO
IN
IN
GND
GND
IN
IN
OVLO
C
Figure 2.
Pin Configuration (Top View )
Figure 3.
Pin Configuration (Bottom View )
Pin Definitions
Name
Bump
Type
Description
IN
B3, C2, C3
Input/Supply
OUT
A2, A3, B2
Output
Sw itch Output to Load
#ACOK
B1
Output
Pow er Good
#EN
A1
Input
Device Enable (Active LOW)
OVLO
C1
Input
Over-Voltage Lockout Adjustment Pin
GND
A4, B4, C4
Supply
Sw itch Input and Device Supply
1
V IN < V IN_min or V IN ≥ V OVLO
0
Voltage Stable
Device Ground
Over-Voltage Lockout (OVLO) Calculation
OVLO can be set externally and override default
OVP. By connecting an external resistor-driver to the
OVLO pin. Equation (1) can produce the desired trip
voltage and resistor values.
𝑉𝐼𝑁 _𝑂𝐿𝑉𝑂 = 𝑉𝑂𝑉𝐿𝑂 _𝑇𝐻 × [1 + 𝑅1/𝑅2]
Recommended minimum R1 = 1 MΩ.
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2
(1)
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
Min.
Max.
Unit
V_IN to GND & V_IN to V_OUT = GND or Float
-0.3
29.0
V
V OUT
V_OUT to GND
-0.3
V IN + 0.3
V
V OVLO
OVLO to GND
-0.3
25.0
V
6
V
4.5
A
V IN
Parameter
V #EN_ACOK Maximum DC Voltage Allow ed on #EN or ACOK Pin
IIN
Sw itch I/O Current (Continuous)
Peak Sw itch I/O Current (10 ms)
tPD
Total Pow er Dissipation at TA = 25ºC
TSTG
Storage Temperature Range
-65
TJ
Maximum Junction Temperature
TL
Lead Temperature (Soldering, 10 Seconds)
ΘJA
(1)
Thermal Resistance, Junction-to-Ambient
2
(1-in. Pad of 2-oz. Copper)
Air Gap
15.0
Contact
8.0
Human Body Model, ANSI / ESDA / JEDEC JS-001-2012
All Pins
3.5
Charged Device Model, JEDEC JESD22-C101
All Pins
2.0
IEC 61000-4-5, Surge Protection
V IN
100
IEC 61000-4-2 System ESD
ESD
Surge
9
A
1.48
W
+150
°C
+150
°C
+260
°C
84.1
°C/W
kV
V
Note:
1. Measured using 2S2P JEDEC std. PCB.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. ON Semiconductor
does not recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
Parameter
Min.
Max.
Unit
V IN
Supply Voltage
2.5
25.0
V
TA
Operating Temperature
-40
+85
ºC
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FPF2281 — Over-Voltage Protection Load Switch
Absolute Maximum Ratings
TA = -40ºC to 85ºC unless otherw ise indicated. Typical values are V IN = 5.0 V, IIN ≤ 3 A, CIN = 0.1 μF and TA = 25ºC.
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Unit
V IN_CLAMP
Input Clamping Voltage
IIN = 10 mA
35
IQ
Input Quiescent Current
V IN = 5 V, #EN = 0 V
58
100
μA
OVLO Supply Current
V OVLO = 3 V, V IN = 5 V,
V OUT = 0 V
52
100
μA
14.0
14.4
V
IIN_Q
V IN Rising
13.6
V IN Falling
13.0
OVLO Set Threshold
V IN = 2.5 V to V OVLO
1.12
Adjustable OVLO Threshold
Range
V IN = 2.5 V to V OVLO
4
V IN_OVLO
Internal Over-Voltage Trip Level
V OVLO_TH
V OVLO_RNG
RON
1.24
0.30
0.28
V
VIN Rising, TA= -40 to 85⁰C
2.25
2.4
V
VIN Falling, TA= -40 to 85⁰C
1.95
2.1
V
30
39
mΩ
1000
µF
100
nA
Under-Voltage Trip Level
Resistance from V IN to V OUT
V IN = 5 V, IOUT = 1 A, TA = 25ºC
( )
OUT Load Capacitance 2
V IN = 5 V
IOLVO
OVLO Input Leakage Current
V OVLO = V OVLO_TH
TSDN_HYS
1.20
V
COUT
TSDN
V
25
V OVLO_SELECT External OVLO Select Threshold
V UVLO
V
-100
( )
Thermal Shutdow n 2
( )
Thermal Shutdow n Hysteresis 2
130
°C
20
°C
Digital Signals
V OL
#ACOK Output Low Voltage
ISINK = 1 mA
VIH_#EN
Enable HIGH Voltage
V IN = 2.5 V to V OVLO
VIL_#EN
Enable LOW Voltage
V IN = 2.5 V to V OVLO
IACOK_LEAK
#ACOK Leakage Current
V ACOK = 3 V, #ACOK Deasserted
#EN_Leak
#EN Leakage Current
V IN = 5.0 V, V OUT = Float
0.4
1.2
V
V
0.5
V
-0.5
0.5
µA
-1.0
1.0
µA
Tim ing Characteristics
tDEB
Debounce Time
Time from 2.5 V < V IN < V IN_OVLO
to V OUT = 0.1 × V IN
15
ms
tSTART
Soft-Start Time
Time from V IN = V IN_min to 0.2 ×
#ACOK, V IO = 1.8 V w ith 10 kΩ
Pull-up Resistor
30
ms
tON
Sw itch Turn-On Time
RL = 100 Ω, CL = 22 µF, V OUT
from 0.1 × V IN to 0.9 × V IN,
2
ms
tOFF
Sw itch Turn-Off Time
RL = 100 Ω, CL = 0 µF,
V IN > V OVLO to V OUT = 0.8 × V IN
125
ns
(2)
Note:
2. Guaranteed by characterization and design.
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FPF2281 — Over-Voltage Protection Load Switch
Electrical Characteristics
VIN
tDEB
tOFF
Measure @
80% #EN
VOUT = 0.8*VIN
VOUT
tON
Measure
@ 10/90%
#EN
#ACOK
tSTART
Measure VIN >2.5V to
0.2*#ACOK
#ACOK: VIO = 1.8V w/
10KΩ Pull Up
Figure 4.
Tim ing for Pow er Up and Norm al Operation
tSTART
VOVLO
tSART
tOFF
Measure @
OVLO_Rising
VOUT = 0.8*VIN
VIN
VOUT
#ACOK
Figure 5.
Tim ing for OVLO Trip
Product-Specific Dimensions
The table below provides information regarding the WLCSP package on the follow ing page.
D
E
X
Y
1288 μm ±30 μm
1828 μm ±30 μm
314 μm ±18 μm
244 μm ±18 μm
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FPF2281 — Over-Voltage Protection Load Switch
Timing Diagrams
FPF2281 — Over-Voltage Protection Load Switch
Physical Dimensions
Figure 6.
12-Ball, 3×4 Array, 0.4 m m Pitch, Wafer-Level Chip-Scale Package (WLCSP)
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FPF2281 — Over-Voltage Protection Load Switch
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