FPF3380UCX

28 V / 5 A Rated OVP with Low On-resistance and Integrated TVS FPF3380UCX Description www.onsemi.com FPF3380UCX is an OVP with integrated ultra−low on−resistance single channel switch. The device contains an N−MOSFET that can operate over an input voltage range of 2.8 V to 23 V and can support a maximum continuous current of 5 A. When the input voltage exceeds the over−voltage threshold, the internal FET is turned off immediately to prevent damage to the protected downstream components. The device has integrated ±110 V surge protection TVS base on IEC61000−4−5 standards. FPF3380 is available in a small 12−bumps WLCSP package and operate over the free−air temperature range of −40°C to +85°C. WLCSP−12 CASE 567WP MARKING DIAGRAM Features • • • • • • • • • Over−voltage Protection Up to +28 V Integrated TVS: ±110 V for IEC61000−4−5 Internal Low RDS(on) NMOS Transistors: Typical 15 mW Programmable Over−voltage Lockout (OVLO) ♦ Externally Adjustable via OVLO Pin Active−low Enable Pin (OVLO) for Device Super−fast OVLO Response Time: Typical 40 ns Over Temperature Protection (Thermal Shutdown) Robust ESD Performance ♦ ±4 kV Human Body Model (HBM) ♦ ±2 kV Charged Device Model (CDM) System Level ESD (IEC61000−4−2) ♦ ±10 kV Contact Discharge ♦ ±15 kV Air Gap Discharge 3LZZ YWA 3L ZZ Y W A = Specific Device Code = Assembly Lot Code = Year = Work Week = Assembly Location PIN ASSIGNMENT ENB OUT OUT GND ACOKB OUT IN GND OVLO IN IN GND Typical Applications • Mobile Phones • PDAs • GPS (Top View) ORDERING INFORMATION See detailed ordering and shipping information on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2019 September, 2020 − Rev. 2 1 Publication Order Number: FPF3380UCX/D FPF3380UCX VBUS Travel Adapter HV Battery Charger OUT IN 1uF 1uF FPF3380 R1 Legacy USB / USB Type C connector OVLO R2 GND Figure 1. Application Schematic – Adjustable Option IN OUT Discharge Driver Gate Drive 1.2V Control OVLO ACOKB 0.3V GND ENB Figure 2. Simplified Block Diagram PIN FUNCTION DESCRIPTION Pin # Name Description B3, C2, C3 IN A2, A3, B2 OUT Power Output: Switch Output to Load A1 ENB Enable Input: Active Low. 0: Switch enabled. 1: Switch disabled. 1MW Pull−down resistor integrated. Power Input: Switch Input and Device Supply B1 ACOKB C1 OVLO Power Good Acknowledge Output: Open−drain output to indicate Power Good condition OVLO Input: Over Voltage Lockout Adjustment Input A4, B4, C4 GND Ground ORDERING INFORMATION Device FPF3380UCX Marking Package Shipping† 3L WLCSP−12L 4000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 2 FPF3380UCX Table 1. MAXIMUM RATINGS Rating Symbol Value Unit Input Voltage Range (Note 1) Vin −0.3 to +28 V Output Voltage Range Vout −0.3 to (Vin + 0.3) V Adjustable Input Range VOVLO −0.3 to +24 V Internal FET continuous current IOUT 0 to 6.25 A Internal FET peak current (pulse width no longer than 100 ms) IPEAK 7 A TJ(max) 150 °C TSTG −65 to 150 °C ESD Capability, Human Body Model (Note 2) ESDHBM 4 kV ESD Capability, Charged Device Model (Note 2) ESDCDM 2 IEC 61000−4−2 SYSTEM Level ESD Contact 10 Air Gap 15 TSLD 260 Maximum Junction Temperature Storage Temperature Range Lead Temperature Soldering Reflow (SMD Styles Only), Pb−Free Versions (Note 3) °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe Operating parameters. 2. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per AEC−Q100−002 (EIA/JESD22−A114) ESD Charged Device Model tested per AEC−Q100−011 (EIA/JESD22−C101) Latch−up Current Maximum Rating: ≤150 mA per JEDEC standard: JESD78 3. For information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Table 2. THERMAL CHARACTERISTICS Rating Symbol Value Unit RθJA 84.1 °C/W Thermal Characteristics, WLCSP−12 (Note 4) Thermal Resistance, Junction−to−Air (Note 5) 4. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe Operating parameters. 5. Values based on 2S2P JEDEC std. PCB. Table 3. RECOMMENDED OPERATING RANGES Rating Symbol Min Max Unit Vin 2.8 23 V VOVLO 0 5.5 V Output Current (Note 6) Iout 0 5 A IN Capacitor Cin 0.1 mF OUT Capacitor Cout 0.1 mF TA −40 Supply Voltage on VIN I/O pins Ambient Temperature 85 °C Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. 6. Life time, under maximum current, > 5 years base on Temperature < 85°C and no longer than 12 hours per day. www.onsemi.com 3 FPF3380UCX Table 4. ELECTRICAL CHARACTERISTICS VIN = 2.8 to 23 V, CIN = 0.1 mF, COUT = 0.1 mF, TA = −40 to 85°C; For typical values VIN = 5.0 V, IIN v 3 A, CIN = 0.1 mF, TA = 25°C, for min/max values TA = −40°C to 85°C; unless otherwise noted. Parameter Test Conditions Symbol Min Typ Max Unit LEAKAGE AND QUIESCENT CURRENTS Input Quiescent Current on IN VIN = 5V, VOVLO = 0.6V, VENB = 0V IQ 90 VIN = 23V, VOVLO = 0.6V, VENB = 0V mA 150 Supply Current during Over Voltage VIN = 23V, VOVLO = 1.8V, VOUT = VENB = 0V IIN_Q OVLO Input Leakage Current VOVLO = VOVLO_TH IOVLO 150 −100 mA 100 nA OVER VOLTAGE AND UNDER VOLTAGE LOCKOUT, I/O Input Clamping Voltage VIN_CLAMP IIN = 10mA V 32 IIN = 30A (Note 7) 37 Under−Voltage Rising Trip Level for VIN VIN rising, TA = −40 to 85°C VIN_UV_R Under−Voltage Falling Trip Level for VIN VIN falling, TA = −40 to 85°C VIN_UV_F Default Over−Voltage Trip Level VIN rising, VOVLO = GND VIN_OVLO 5.95 6.15 6.35 V OVLO set threshold VOVLO = 1.1V to 1.3V, the voltage of OVLO pin to trigger Over Voltage condition VOVLO_TH 1.165 1.20 1.235 V OVLO threshold hysteresis 2.4 2.55 2.45 VHYS_OVLO High Low VIH_OVLO VIL_OVLO 0.3 ENB Input Threshold Voltage Voltage Increasing, Logic High Voltage Decreasing, Logic Low High Low VIH_ENB VIL_ENB 0.9 Output Low Voltage of ACOKB IACOKB = 1mA, Logic Low Asserted ACOKB Leakage Current VI/O = 3.3V, ACOKB De−asserted, VENB = 0V V V 3 OVLO Input Threshold Voltage Voltage Increasing, Logic High Voltage Decreasing, Logic Low % V 0.15 V 0.3 VOL IACOKB 2.7 −0.5 0.4 V 0.5 uA 20 mW RESISTANCE On−resistance of Power FET VIN = 5V, IOUT = 200mA, TA = 25°C rON 15 VIN = 5V to 23V, IOUT = 0.1A to 5A (Note 10) 25 Pull−down resistor on ENB Discharge on IN 1 MW 800 W tSW_DEB 15 ms VIN = 5V, VENB = 1.8V TIMING De−bounce Time of Power FET turned on Time from 2.5V < VIN < VIN_OVLO to VOUT = 0.1 × VIN Soft−Start Time of Power FET turned on Time from 2.5V < VIN < VIN_OVLO to VAOCKB = 0.2 × VI/O with VI/O = 1.8V and RPU = 10kW tSS 30 ms Switch Turn−On rising Time (Note 10) VIN = 5V, RL = 100 W, CL = 22 mF, VOUT from 0.1 × VIN to 0.9 × VIN tR 2 ms Switch Turn−Off Time (Note 10) RL = 10 W, CL = 0 mF, time from VIN > VOVLO to VOUT = 0.9 × VIN (Note 11) tOVP 40 ns time from VENB > VIH_ENB to VOUT = 0.9 × VIN tOFF 2 ms THERMAL SHUTDOWN Thermal Shutdown Temperature (Note 10) TSD − 130 − °C Thermal Shutdown Hysteresis (Note 10) TSH − 20 − °C Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 7. The spec is only for surge event. Guaranteed by design and characterization. 8. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TJ = TA = 25 C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 9. Refer to the APPLICATION INFORMATION section. 10. Values based on design and/or characterization. 11. Depends on the capacitance on OVLO pin. www.onsemi.com 4 FPF3380UCX FUNCTION DESCRIPTION General Over Voltage Lockout FPF3380 is an OVP power switch to protect next stage system which is optimized to lower voltage working condition. The device includes ultra−low on−resistance power FET (15 mW) and internal TVS for surge event protection base on IEC61000−4−5. The super−fast OVP response time is only 40 ns for default OVP condition. The power FET will be turned off whenever IN voltage higher than VIN_OVLO. The value of VIN_OVLO can be set by external resistor ladder or just be default value VIN_OVLO. When VOVLO is smaller than VIL_OVLO, VOVLO will be decided by default value. When VOVLO is larger than VIH_OVLO, the power switch will be turned off once VOVLO > VOVLO_TH. The external resistor ladder can be decided according to the following equation: Power MOSFET The FPF3380 integrates an N−type MOSFET with 15 mW resistance. The power FET can work under 2.8V ~ 23 V and up to 5 A DC current capability. V IN_OVLO + V OVLO_TH ǒ1 ) R1ńR2Ǔ (eq. 1) where R1 and R2 are the resistors in Figure 1. Power Supply Power OK indicator The FPF3380 is supplied by IN. IN will be firstly supplied by OUT when the device is working under USB On−The−Go (OTG) condition. FPF3380 has an Open−Drain output ACOKB. By implement connection to external supply through a resistor, ACOKB can indicate the status on IN (or VBUS). When VIN is between VIN_UV_R and VIN_OVLO more than 30 ms, ACOKB will be pulled down to ground. If the input voltage is out of this range, ACOKB will present as a floating node and the voltage will be pulled high by external power supply. Enable Control FPF3380 has an active low enable pin ENB. When ENB pin is connected to a high level, the internal FET will be turned off. When ENB pin is connected to low level, the FET will be turned on as long as VIN is not higher than Over−Voltage threshold. Thermal Shutdown When the device is in the switch mode, to protect the device from over temperature, the power switch will be turned off when the junction temperature exceeds TSD. The switch will be turned on again when temperature drop below TSD − TSH. Under Voltage Lockout FPF3380 power switch will be turned off when the voltage on IN is lower than the UVLO threshold VIN_UV_F. Whenever VIN voltage ramps up to higher than VIN_UV_R, the power FET will be turned on automatically after tDEB de−bounce time if there is no OV or OT condition. APPLICATIONS INFORMATION Input Decoupling (Cin) the FPF3380 has good thermal conductivity through the PCB, the junction temperature will be relatively low with high power applications. The maximum dissipation the FPF3380 can handle is given by: A ceramic or tantalum at least 0.1 mF capacitor is recommended and should be connected close to the FPF338x package. Higher capacitance and lower ESR will improve the overall line and load transient response. P D(MAX) + Output Decoupling (Cout) The FPF338x is a stable component and does not require a minimum Equivalent Series Resistance (ESR) for the output capacitor. The minimum output decoupling value is 0.1 mF and can be augmented to fulfill stringent load transient requirements. ƪTJ(MAX) * TAƫ R qJA (eq. 2) Since TJ is not recommended to exceed 125°C, then the FPF338x soldered on 645 mm2, 1 oz copper area, and the ambient temperature (TA) is 25°C. The power dissipated by the FPF3380 can be calculated from the following equations: Thermal Considerations P D [ V in @ ǒI Q@I outǓ ) I out 2 @ r ON As power in the FPF3380 increases, it might become necessary to provide some thermal relief. The maximum power dissipation supported by the device is dependent upon board design and layout. Mounting pad configuration on the PCB, the board material, and the ambient temperature affect the rate of junction temperature rise for the part. When (eq. 3) Hints Vin and Vout printed circuit board traces should be as wide as possible. Place external components, especially the input capacitor and TVS, as close as possible to the FPF3380, and make traces as short as possible. www.onsemi.com 5 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS WLCSP12 1.828x1.288x0.574 CASE 567WP ISSUE O DATE 25 JUN 2018 DOCUMENT NUMBER: DESCRIPTION: 98AON93136G Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. WLCSP12 1.828x1.288x0.574 PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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