FQD12P10TM_F085
tm
100V P-Channel MOSFET
General Description
Features
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as audio amplifier,
high efficiency switching DC/DC converters, and DC motor
control.
•
•
•
•
•
•
•
•
-9.4A, -100V, RDS(on) = 0.29Ω @VGS = -10 V
Low gate charge ( typical 21 nC)
Low Crss ( typical 65 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
Qualified to AEC Q101
RoHS Compliant
D
D
G
G
S
D-PAK
Absolute Maximum Ratings
Symbol
VDSS
ID
S
TC = 25°C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (TC = 25°C)
Drain Current
- Continuous (TC = 100°C)
IDM
Drain Current
VGSS
Gate-Source Voltage
- Pulsed
(Note 1)
Ratings
-100
Units
V
-9.4
A
-6.0
A
-37.6
A
± 30
V
mJ
EAS
Single Pulsed Avalanche Energy
(Note 2)
370
IAR
Avalanche Current
(Note 1)
-9.4
A
EAR
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TA = 25°C) *
(Note 1)
5.0
-6.0
2.5
mJ
V/ns
W
50
0.4
-55 to +150
W
W/°C
°C
300
°C
dv/dt
PD
(Note 3)
Power Dissipation (TC = 25°C)
TJ, TSTG
TL
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8! from case for 5 seconds
Thermal Characteristics
Symbol
RθJC
Parameter
Thermal Resistance, Junction-to-Case
Typ
--
Max
2.5
Units
°C/W
RθJA
RθJA
Thermal Resistance, Junction-to-Ambient *
--
50
°C/W
Thermal Resistance, Junction-to-Ambient
--
110
°C/W
* When mounted on the minimum pad size recommended (PCB Mount)
©2010 Fairchild Semiconductor Corporation
FQD12P10TM_F085 Rev. A
1
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FQD12P10TM_F085 P-Channel MOSFET
February 2010
Symbol
TC = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max
Units
-100
--
--
V
--
-0.1
--
V/°C
VDS = -100 V, VGS = 0 V
--
--
-1
µA
VDS = -80 V, TC = 125°C
--
--
-10
µA
Gate-Body Leakage Current, Forward
VGS = -30 V, VDS = 0 V
--
--
-100
nA
Gate-Body Leakage Current, Reverse
VGS = 30 V, VDS = 0 V
--
--
100
nA
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = -250 µA
∆BVDSS
/
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = -250 µA, Referenced to 25°C
IDSS
IGSSF
IGSSR
Zero Gate Voltage Drain Current
On Characteristics
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = -250 µA
-2.0
--
-4.0
V
RDS(on)
Static Drain-Source
On-Resistance
VGS = -10 V, ID = -4.7 A
--
0.24
0.29
Ω
gFS
Forward Transconductance
VDS = -40 V, ID = -4.7 A
--
6.3
--
S
--
620
800
pF
--
220
290
pF
--
65
85
pF
(Note 4)
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = -25 V, VGS = 0 V,
f = 1.0 MHz
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = -50 V, ID = -11.5 A,
RG = 25 Ω
(Note 4, 5)
VDS = -80 V, ID = -11.5 A,
VGS = -10 V
(Note 4, 5)
--
15
40
ns
--
160
330
ns
--
35
80
ns
--
60
130
ns
--
21
27
nC
--
4.6
--
nC
--
11.5
--
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
--
--
-9.4
A
ISM
--
--
-37.6
A
VSD
Maximum Pulsed Drain-Source Diode Forward Current
VGS = 0 V, IS = -9.4 A
Drain-Source Diode Forward Voltage
--
--
-4.0
V
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = -11.5 A,
dIF / dt = 100 A/µs
(Note 4)
--
110
--
ns
--
0.47
--
µC
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 6.3mH, IAS = -9.4A, VDD = -25V, RG = 25 Ω, Starting TJ = 25°C
3. ISD " -11.5A, di/dt " 300A/µs, VDD " BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width " 300µs, Duty cycle " 2%
5. Essentially independent of operating temperature
FQD12P10TM_F085 Rev. A
2
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FQD12P10TM_F085 P-Channel MOSFET
Electrical Characteristics
VGS
-15.0 V
-10.0 V
-8.0 V
-7.0 V
-6.5 V
-5.5 V
-5.0 V
Bottom : -4.5 V
Top :
-I D, Drain Current [A]
0
10
1
10
-I D , Drain Current [A]
1
10
-1
10
150!
0
25!
10
-55!
" Notes :
1. VDS = -40V
2. 250# s Pulse Test
" Notes :
1. 250# s Pulse Test
2. TC = 25!
-2
10
-1
-1
0
10
10
1
10
2
10
4
6
8
10
-VGS , Gate-Source Voltage [V]
-VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
0.8
1
0.6
10
-I DR , Reverse Drain Current [A]
RDS(on) [ Ω ],
Drain-Source On-Resistance
VGS = - 10V
VGS = - 20V
0.4
0.2
" Note : TJ = 25!
0.0
0
10
150!
25!
" Notes :
1. VGS = 0V
2. 250# s Pulse Test
-1
0
10
20
30
10
40
0.0
0.5
-ID , Drain Current [A]
1.0
1.5
2.0
2.5
3.0
-VSD , Source-Drain Voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
12
1600
1400
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
Coss
VDS = -50V
-V GS , Gate-Source Voltage [V]
1000
" Notes :
1. VGS = 0 V
2. f = 1 MHz
800
Crss
600
400
200
0
-1
10
VDS = -80V
8
6
4
2
" Note : ID = -11.5 A
0
0
10
0
1
10
4
8
12
16
20
24
QG, Total Gate Charge [nC]
-VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
FQD12P10TM_F085 Rev. A
VDS = -20V
10
Ciss
1200
Capacitance [pF]
FQD12P10TM_F085 P-Channel MOSFET
Typical Characteristics
Figure 6. Gate Charge Characteristics
3
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(Continued)
3.0
1.2
RDS(ON) , (Normalized)
Drain-Source On-Resistance
-BV DSS , (Normalized)
Drain-Source Breakdown Voltage
2.5
1.1
1.0
" Notes :
1. VGS = 0 V
2. ID = -250 # A
0.9
0.8
-100
-50
0
50
100
150
2.0
1.5
1.0
" Notes :
1. VGS = -10 V
2. ID = -4.7 A
0.5
0.0
-100
200
-50
0
o
50
100
150
200
o
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
10
Operation in This Area
is Limited by R DS(on)
2
10
FQD12P10TM_F085 P-Channel MOSFET
Typical Characteristics
8
-I D, Drain Current [A]
-I D, Drain Current [A]
100 µs
1 ms
1
10
10 ms
DC
0
10
" Notes :
6
4
2
o
1. TC = 25 C
o
2. TJ = 150 C
3. Single Pulse
-1
10
0
1
10
0
25
2
10
10
50
(t), T h e rm a l R e s p o n s e
Figure 9. Maximum Safe Operating Area
100
125
150
Figure 10. Maximum Drain Current
vs. Case Temperature
D = 0 .5
10
0
" N o te s :
1 . Z $ J C (t) = 2 .5 ! /W M a x .
2 . D u ty F a c to r, D = t 1 /t 2
3 . T J M - T C = P D M * Z $ J C (t)
0 .2
0 .1
0 .0 5
10
-1
PDM
0 .0 2
0 .0 1
Z
$ JC
75
TC, Case Temperature [!]
-VDS, Drain-Source Voltage [V]
10
-5
t1
s in g le p u ls e
10
-4
10
t2
-3
10
-2
10
-1
10
0
10
1
t 1 , S q u a r e W a v e P u ls e D u r a tio n [s e c ]
Figure 11. Transient Thermal Response Curve
FQD12P10TM_F085 Rev. A
4
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FQD12P10TM_F085 P-Channel MOSFET
Gate Charge Test Circuit & Waveform
VGS
Same Type
as DUT
50K%
Qg
200nF
12V
-10V
300nF
VDS
VGS
Qgs
Qgd
DUT
-3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS
RL
t on
td(on)
VDD
VGS
VGS
RG
t off
tr
td(off)
tf
10%
DUT
-10V
VDS
90%
Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- L IAS2 -------------------2
BVDSS - VDD
L
VDS
tp
ID
RG
VDD
DUT
-10V
VDS (t)
ID (t)
IAS
BVDSS
tp
FQD12P10TM_F085 Rev. A
VDD
Time
5
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+
VDS
DUT
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
I SD
( DUT )
Compliment of DUT
(N-Channel)
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
FQD12P10TM_F085 P-Channel MOSFET
Peak Diode Recovery dv/dt Test Circuit & Waveforms
10V
Body Diode Reverse Current
IRM
di/dt
IFM , Body Diode Forward Current
VDS
( DUT )
VSD
Body Diode
Forward Voltage Drop
VDD
Body Diode Recovery dv/dt
FQD12P10TM_F085 Rev. A
6
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D-PAK
MIN0.55
0.91 ±0.10
9.50 ±0.30
0.50 ±0.10
0.76 ±0.10
0.50 ±0.10
1.02 ±0.20
2.30TYP
[2.30±0.20]
(1.00)
(3.05)
(2XR0.25)
(0.10)
2.70 ±0.20
6.10 ±0.20
9.50 ±0.30
6.60 ±0.20
(5.34)
(5.04)
(1.50)
(0.90)
2.30 ±0.20
(0.70)
2.30TYP
[2.30±0.20]
(0.50)
2.30 ±0.10
0.89 ±0.10
MAX0.96
(4.34)
2.70 ±0.20
0.80 ±0.20
0.60 ±0.20
(0.50)
6.10 ±0.20
5.34 ±0.30
0.70 ±0.20
6.60 ±0.20
FQD12P10TM_F085 P-Channel MOSFET
Package Dimensions
0.76 ±0.10
Dimensions in Millimeters
FQD12P10TM_F085 Rev. A
7
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tm
tm
FQD12P10TM_F085 P-Channel MOSFET
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Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
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make changes at any time without notice to improve the design.
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Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I47
FQD12P10TM_F085 Rev. A
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