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to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA
Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended
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FQD18N20V2
N-Channel QFET® MOSFET
200 V, 15 A, 140 mΩ
Description
Features
This N-Channel enhancement mode power MOSFET is
produced using Fairchild Semiconductor’s proprietary planar
stripe and DMOS technology. This advanced MOSFET
technology has been especially tailored to reduce on-state
resistance, and to provide superior switching performance
and high avalanche energy strength. These devices are
suitable for switched mode power supplies, active power
factor correction (PFC), and electronic lamp ballasts.
• 15 A, 200 V, RDS(on) = 140 mΩ (Max.) @ VGS = 10 V,
ID = 7.5 A
• Low Gate Charge (Typ. 20 nC)
• Low Crss (Typ. 25 pF)
• 100% Avalanche Tested
D
D
G
S
G
D-PAK
S
Absolute Maximum Ratings
Symbol
VDSS
ID
TC = 25°C unless otherwise noted.
Parameter
Drain-Source Voltage
- Continuous (TC = 25°C)
Drain Current
FQD18N20V2TM
200
Unit
V
15
A
- Continuous (TC = 100°C)
IDM
Drain Current
VGSS
Gate-Source Voltage
EAS
IAR
EAR
dv/dt
PD
(Note 1)
A
60
A
± 30
V
Single Pulsed Avalanche Energy
(Note 2)
340
mJ
Avalanche Current
(Note 1)
15
A
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TA = 25°C) *
(Note 1)
8.3
6.5
2.5
mJ
V/ns
W
83
0.67
-55 to +150
W
W/°C
°C
300
°C
(Note 3)
Power Dissipation (TC = 25°C)
TJ, TSTG
TL
- Pulsed
9.75
- Derate above 25°C
Operating and Storage Temperature Range
Maximum Lead Lemperature for Loldering,
1/8" from Case for 5 Seconds.
Thermal Characteristics
Symbol
RJC
RJA
Parameter
FQD18N20V2TM
Thermal Resistance, Junction to Case, Max.
1.5
Thermal Resistance, Junction to Ambient (Minimum Pad of 2-oz Copper), Max.
110
2
Thermal Resistance, Junction to Ambient (*1 in Pad of 2-oz Copper), Max.
©2009 Fairchild Semiconductor Corporation
FQD18N20V2 Rev. 1.6
1
Unit
oC/W
50
www.fairchildsemi.com
FQD18N20V2 — N-Channel QFET® MOSFET
April 2016
Part Number
Top Mark
DV218N20
FQD18N20V2TM
Electrical Characteristics
Symbol
Package
DPAK
Packing Method
Tape and Reel
Reel Size
330 mm
Tape Width
16 mm
Quantity
2500 units
TC = 25°C unless otherwise noted.
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
200
--
--
V
--
V/°C
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = 250 µA
∆BVDSS
/ ∆TJ
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, Referenced to 25°C
--
0.25
IDSS
Zero Gate Voltage Drain Current
VDS = 200 V, VGS = 0 V
--
--
1
µA
VDS = 160 V, TC = 125°C
--
--
10
µA
IGSSF
Gate-Body Leakage Current, Forward
VGS = 30 V, VDS = 0 V
--
--
100
nA
IGSSR
Gate-Body Leakage Current, Reverse
VGS = -30 V, VDS = 0 V
--
--
-100
nA
3.0
--
5.0
V
On Characteristics
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
RDS(on)
Static Drain-Source
On-Resistance
VGS = 10 V, ID = 7.5 A
--
0.12
0.14
Ω
gFS
Forward Transconductance
VDS = 40 V, ID = 7.5 A
--
11
--
S
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
--
830
1080
pF
--
200
260
pF
--
25
33
pF
--
70
--
pF
--
135
--
pF
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Coss
Output Capacitance
Coss eff.
Effective Output Capacitance
VDS = 160 V, VGS = 0 V,
f = 1.0 MHz
VDS = 0V to 160 V, VGS = 0 V
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
RG
Gate Resistance
VDD = 100 V, ID = 18 A,
RG = 25 Ω
(Note 4)
VDS = 160 V, ID = 18 A,
VGS = 10 V
(Note 4)
f= 1MHz
--
16
40
ns
--
133
275
ns
--
38
85
ns
--
62
135
ns
--
20
26
nC
--
5.6
--
nC
--
10
--
nC
0.5
--
2.5
Ω
A
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
--
--
15
ISM
--
--
60
A
VSD
Maximum Pulsed Drain-Source Diode Forward Current
VGS = 0 V, IS = 15 A
Drain-Source Diode Forward Voltage
--
--
1.5
V
trr
Reverse Recovery Time
158
--
ns
Reverse Recovery Charge
VGS = 0 V, IS = 18 A,
dIF / dt = 100 A/µs
--
Qrr
--
1.0
--
µC
Notes:
1. Repetitive rating : pulse-width limited by maximum junction temperature.
2. L = 1.58 mH, IAS = 18 A, VDD = 50 V, RG = 25 Ω, starting TJ = 25°C.
3. ISD ≤ 18 A, di/dt ≤ 200 A/µs, VDD ≤ BVDSS, starting TJ = 25°C.
4. Essentially independent of operating temperature.
©2009 Fairchild Semiconductor Corporation
FQD18N20V2 Rev. 1.6
2
www.fairchildsemi.com
FQD18N20V2 — N-Channel QFET® MOSFET
Package Marking and Ordering Information
VGS
Top :
15.0 V
10.0 V
ID, Drain Current [A]
10
8.0 V
1
7.0 V
1
ID , Drain Current [A]
6.5 V
6.0 V
Bottom :
10
5.5 V
0
※ Notes :
10
-1
150℃
10
25℃
-55℃
0
10
1. 250μ s Pulse Test
※ Notes :
1. VDS = 40V
2. 250μ s Pulse Test
2. TC = 25℃
10
-1
10
0
10
1
-1
10
VDS, Drain-Source Voltage [V]
4
5
Figure 1. On-Region Characteristics
6
7
8
9
VGS , Gate-Source Voltage [V]
10
Figure 2. Transfer Characteristics
0.4
VGS = 10V
IDR , Reverse Drain Current [A]
R DS(ON) [Ω ],
Drain-Source On-Resistance
0.5
1
10
VGS = 20V
0.3
0.2
0
10
0.1
150℃
25℃
※ Notes :
1. VGS = 0V
2. 250μ s Pulse Test
※ Note : TJ = 25℃
0.0
0
10
20
30
40
50
60
-1
10
ID, Drain Current [A]
0.2
0.6
0.8
1.0
1.2
1.4
1.6
VSD , Source-Drain Voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
12
2500
Ciss = C gs + Cgd (Cds = shorted)
VDS = 40V
Coss = Cds + Cgd
10
VGS , Gate-Source Voltage [V]
Crss = C gd
2000
Capacitance [pF]
0.4
※ Notes :
1500
1. VGS = 0 V
2. f = 1 MHz
Ciss
1000
Coss
500
Crss
0
-1
10
VDS = 100V
VDS = 160V
8
6
4
2
※ Note : ID = 18A
10
0
10
1
0
VDS, Drain-Source Voltage [V]
5
10
15
20
25
QG, Total Gate Charge [nC]
Figure 5. Capacitance Characteristics
©2009 Fairchild Semiconductor Corporation
FQD18N20V2 Rev. 1.6
0
Figure 6. Gate Charge Characteristics
3
www.fairchildsemi.com
FQD18N20V2 — N-Channel QFET® MOSFET
Typical Characteristics
(Continued)
3.0
2.5
R DS(ON) , (Normalized)
1.1
1.0
※ Notes :
0.9
1. VGS = 0 V
2. ID = 250 μ A
0.8
-100
-50
0
50
100
150
Drain-Source On-Resistance
BV DSS , (Normalized)
Drain-Source Breakdown Voltage
1.2
2.0
1.5
1.0
※ Notes :
0.5
1. VGS = 10 V
2. ID = 7.5 A
0.0
-100
200
-50
0
o
TJ, Junction Temperature [ C]
20
is Limited by R DS(on)
2
15
ID, Drain Current [A]
ID , Drain Current [A]
200
Figure 8. On-Resistance Variation
vs. Temperature
100 us
1 ms
1
10 ms
DC
10
150
TJ, Junction Temperature [ C]
Operation in This Area
10
100
o
Figure 7. Breakdown Voltage Variation
vs. Temperature
10
50
0
※ Notes :
o
1. TC = 25 C
10
5
o
2. TJ = 150 C
3. Single Pulse
0
25
-1
10
0
1
10
10
10
2
50
75
ZJC(t), Thermal Response [oC/W]
D = 0 .5
0 .2
N o te s :
※
-1
1. Z
JC
(t) = 1 .5 ℃ /W M a x .
2 . D u ty F a c to r, D = t1 /t2
0 .0 2
0 .0 1
3. T
-5
JM
- T
C
= P
* Z
D M
θ
JC
(t)
PDM
t1
-2
10
θ
0 .0 5
s in g le p u ls e
10
150
0
0 .1
10
125
Figure 10. Maximum Drain Current
vs. Case Temperature
Figure 9. Maximum Safe Operating Area
10
100
TC, Case Temperature [℃]
VDS, Drain-Source Voltage [V]
10
-4
10
-3
10
-2
10
-1
t2
10
0
10
1
t1 , S q u a r e W a v e P u ls e D u r a t io n [s e c ]
Figure 11. Transient Thermal Response Curve
©2009 Fairchild Semiconductor Corporation
FQD18N20V2 Rev. 1.6
4
www.fairchildsemi.com
FQD18N20V2 — N-Channel QFET® MOSFET
Typical Characteristics
FQD18N20V2 — N-Channel QFET® MOSFET
200nF
12V
VGS
Same Type
as DUT
50KΩ
Qg
10V
300nF
VDS
VGS
Qgs
Qgd
DUT
IG = const.
3mA
Charge
Figure 12. Gate Charge Test Circuit & Waveform
VDS
RG
RL
VDS
90%
VDD
VGS
VGS
DUT
V
10V
GS
10%
td(on)
tr
td(off)
t on
t off
tf
Figure 13. Resistive Switching Test Circuit & Waveforms
VDS
BVDSS
1
EAS = ---- L IAS2 -------------------2
BVDSS - VDD
L
BVDSS
IAS
ID
RG
V
10V
GS
GS
VDD
ID (t)
VDS (t)
VDD
DUT
tp
Time
tp
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
©2009 Fairchild Semiconductor Corporation
FQD18N20V2 Rev. 1.6
5
www.fairchildsemi.com
+
VDS
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
I SD
( DUT )
Same Type
as DUT
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
VSD
VDD
Body Diode
Forward Voltage Drop
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
©2009 Fairchild Semiconductor Corporation
FQD18N20V2 Rev. 1.6
6
www.fairchildsemi.com
FQD18N20V2 — N-Channel QFET® MOSFET
DUT
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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