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Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s
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FQD1N60C / FQU1N60C
N-Channel QFET® MOSFET
600 V, 1.0 A, 11.5 Ω
Features
Description
• 1 A, 600 V, RDS(on) = 11.5 Ω (Max.) @ VGS = 10 V,
ID = 0.5 A
This N-Channel enhancement mode power MOSFET is
produced using ON Semiconductor’s proprietary planar stripe
and DMOS technology. This advanced MOSFET technology has
been especially tailored to reduce on-state resistance, and to
provide superior switching performance and high avalanche
energy strength. These devices are suitable for switched mode
power supplies, active power factor correction (PFC), and
electronic lamp ballasts.
• Low Gate Charge (Typ. 4.8 nC)
• Low Crss (Typ. 3.5 pF)
• 100% Avalanche Tested
• RoHS Compliant
D
D
G
S
I-PAK
D-PAK
G
D
G
S
S
Absolute Maximum Ratings
Symbol
VDSS
ID
TC = 25°C unless otherwise noted.
Parameter
Drain-Source Voltage
- Continuous (TC = 25°C)
Drain Current
FQD1N60CTM / FQU1N60CTU
600
Unit
V
1
A
0.6
A
- Continuous (TC = 100°C)
IDM
Drain Current
VGSS
Gate-Source Voltage
- Pulsed
(Note 1)
4
A
± 30
V
mJ
EAS
Single Pulsed Avalanche Energy
(Note 2)
33
IAR
Avalanche Current
(Note 1)
1
A
EAR
(Note 1)
dv/dt
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TA = 25°C)*
2.8
4.5
2.5
mJ
V/ns
W
PD
Power Dissipation (TC = 25°C)
28
0.22
-55 to +150
W
W/°C
°C
300
°C
TJ, TSTG
TL
(Note 3)
- Derate Above 25°C
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering,
1/8’’ from Case for 5 Seconds
Thermal Characteristics
Symbol
RθJC
RθJA
Parameter
Thermal Resistance, Junction-to-Case, Max.
Thermal Resistance, Junction-to-Ambient (Minimum Pad of 2-oz Copper), Max.
Thermal Resistance, Junction-to-Ambient (*1 in2 Pad of 2-oz Copper), Max.
Semiconductor Components Industries, LLC, 2017
May, 2017, Rev.1.5
FQD1N60CTM /
FQU1N60CTU
4.53
110
Unit
°C/W
50
Publication Order Number:
FQD1N60C / FQU1N60C
1
FQD1N60C / FQU1N60C — N-Channel QFET® MOSFET
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Part Number
FQD1N60CTM
Top Mark
FQD1N60C
Package
D-PAK
Packing Method
Tape and Reel
Reel Size
330 mm
Tape Width
16mm
Quantity
2500 units
FQU1N60CTU
FQU1N60C
I-PAK
Tube
N/A
N/A
70 units
Electrical Characteristics
Symbol
TC = 25°C unless otherwise noted.
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
600
--
--
V
--
0.6
--
V/°C
VDS = 600 V, VGS = 0 V
--
--
1
μA
VDS = 480 V, TC = 125°C
--
--
10
μA
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = 250 μA
ΔBVDSS
/
ΔTJ
Breakdown Voltage Temperature
Coefficient
ID = 250 μA, Referenced to 25°C
IDSS
Zero Gate Voltage Drain Current
IGSSF
Gate-Body Leakage Current, Forward
VGS = 30 V, VDS = 0 V
--
--
100
nA
IGSSR
Gate-Body Leakage Current, Reverse
VGS = -30 V, VDS = 0 V
--
--
-100
nA
VDS = VGS, ID = 250 μA
2.0
--
4.0
V
VGS = 10 V, ID = 0.5 A
--
9.3
11.5
Ω
VDS = 40 V, ID = 0.5 A
--
0.75
--
S
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
--
130
170
pF
On Characteristics
VGS(th)
RDS(on)
gFS
Gate Threshold Voltage
Static Drain-Source
On-Resistance
Forward Transconductance
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
--
19
25
pF
--
3.5
4.5
pF
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = 300 V, ID = 1.1 A,
RG = 25 Ω
(Note 4)
VDS = 480 V, ID = 1.1 A,
VGS = 10 V
(Note 4)
--
7
24
ns
--
21
52
ns
--
13
36
ns
--
27
64
ns
--
4.8
6.2
nC
--
0.7
--
nC
--
2.7
--
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
--
--
1
A
ISM
--
--
4
A
VSD
Maximum Pulsed Drain-Source Diode Forward Current
VGS = 0 V, IS = 0.5 A
Drain-Source Diode Forward Voltage
--
--
1.4
V
trr
Reverse Recovery Time
--
190
--
ns
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 1.1 A,
dIF / dt = 100 A/μs
--
0.53
--
μC
Notes:
1. Repetitive Rating : pulse-width limited by maximum junction temperature.
2. L = 59 mH, IAS = 1.1 A, VDD = 50 V, RG = 25 Ω, starting TJ = 25°C.
3. ISD ≤ 1.1 A, di/dt ≤ 200 A/μs, VDD ≤ BVDSS, starting TJ = 25°C.
4. Essentially independent of operating temperature.
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2
FQD1N60C / FQU1N60C — N-Channel QFET® MOSFET
Package Marking and Ordering Information
VGS
15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V
5.5 V
5.0 V
Bottom : 4.5 V
0
ID, Drain Current [A]
10
ID, Drain Current [A]
Top :
-1
10
0
10
o
150 C
o
-55 C
o
25 C
∝ Notes :
1. 250レs Pulse Test
2. TC = 25∩
∝ Notes :
1. VDS = 40V
2. 250レs Pulse Test
-1
-2
10
10
-1
0
10
2
1
10
10
4
6
8
10
VGS, Gate-Source Voltage [V]
VDS, Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
I DR, Reverse Drain Current [A]
RDS(ON) [ヘ ],
Drain-Source On-Resistance
30
25
VGS = 10V
20
15
VGS = 20V
10
5
∝ Note : TJ = 25∩
0
0.0
0.5
1.0
1.5
2.0
2.5
150∩
∝ Notes :
25∩
1. VGS = 0V
2. 250レs Pulse Test
-1
10
0.2
0.4
0.6
0.8
1.0
1.2
1.4
ID, Drain Current [A]
VSD, Source-Drain voltage [V]
Figure 3. On-Resistance Variation vs
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation with Source Current
and Temperature
250
12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
VDS = 120V
10
VGS, Gate-Source Voltage [V]
200
Capacitance [pF]
0
10
Ciss
150
Coss
100
∝ Notes ;
1. VGS = 0 V
2. f = 1 MHz
Crss
50
VDS = 300V
8
VDS = 480V
6
4
2
∝ Note : ID = 1A
0
-1
10
0
0
10
1
10
0
1
2
3
4
5
6
QG, Total Gate Charge [nC]
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
Figure 6. Gate Charge Characteristics
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3
FQD1N60C / FQU1N60C — N-Channel QFET® MOSFET
Typical Characteristics
(Continued)
3.0
RDS(ON), (Normalized)
Drain-Source On-Resistance
BVDSS, (Normalized)
Drain-Source Breakdown Voltage
1.2
1.1
1.0
∝ Notes :
1. VGS = 0 V
2. ID = 250 レA
0.9
0.8
-100
-50
0
50
100
150
2.5
2.0
1.5
1.0
∝ Notes :
1. VGS = 10 V
2. ID = 0.5 A
0.5
0.0
-100
200
-50
0
50
100
150
200
o
o
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation
vs Temperature
Figure 8. On-Resistance Variation
vs Temperature
1.2
Operation in This Area
is Limited by R DS(on)
1
10
1.0
ID, Drain Current [A]
ID, Drain Current [A]
100 μs
1 ms
0
10
10 ms
100 ms
DC
-1
10
∝ Notes :
o
1. TC = 25 C
o
2. TJ = 150 C
3. Single Pulse
0
1
10
2
10
0.6
0.4
0.2
-2
10
0.8
0.0
25
3
10
10
50
75
100
125
TC, Case Temperature [∩ ]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current
vs Case Temperature
ZθJC(t), Thermal Response [oC/W]
ZヨJC(t), Thermal Response
VDS, Drain-Source Voltage [V]
D = 0 .5
10
0
∝ N o te s :
1 . Z ヨ J C (t) = 4 .5 3 ∩ /W M a x .
2 . D u ty F a c to r, D = t 1 /t 2
3 . T J M - T C = P D M * Z ヨ J C (t)
0 .2
0 .1
PDM
0 .0 5
t1
0 .0 2
10
t2
0 .0 1
-1
s in g le p u ls e
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
t 1 , S q u a re W a v e P u ls e D u ra tio n [s e c ]
Figure 11. Transient Thermal Response Curve
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4
10
1
150
FQD1N60C / FQU1N60C — N-Channel QFET® MOSFET
Typical Characteristics
FQD1N60C / FQU1N60C — N-Channel QFET® MOSFET
Figure 12. Gate Charge Test Circuit & Waveform
VGS
Same Type
as DUT
50KΩ
200nF
12V
Qg
10V
300nF
VDS
VGS
Qgs
Qgd
DUT
IG = const.
3mA
Charge
Figure 13. Resistive Switching Test Circuit & Waveforms
VDS
RG
RL
VDS
90%
VDD
VGS
VGS
DUT
V
10V
GS
10%
td(on)
tr
td(off)
t on
tf
t off
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- L IAS2 -------------------2
BVDSS - VDD
L
VDS
BVDSS
IAS
ID
RG
V
10V
GS
GS
VDD
ID (t)
VDS (t)
VDD
DUT
tp
tp
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5
Time
DUT
+
VDS
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
I SD
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
VSD
Body Diode
Forward Voltage Drop
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6
VDD
FQD1N60C / FQU1N60C — N-Channel QFET® MOSFET
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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