TM
FQP13N50/FQPF13N50
500V N-Channel MOSFET
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supply, power
factor correction, electronic lamp ballast based on half
bridge.
•
•
•
•
•
•
12.5A, 500V, RDS(on) = 0.43Ω @VGS = 10 V
Low gate charge ( typical 45 nC)
Low Crss ( typical 25 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
D
!
●
◀
G!
G DS
TO-220
TO-220F
GD S
FQP Series
▲
●
●
FQPF Series
!
S
Absolute Maximum Ratings
Symbol
VDSS
ID
TC = 25°C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (TC = 25°C)
Drain Current
FQP13N50
FQPF13N50
Units
V
12.5
12.5 *
A
7.9
7.9 *
A
50
50 *
A
500
- Continuous (TC = 100°C)
IDM
Drain Current
VGSS
Gate-Source Voltage
± 30
V
EAS
Single Pulsed Avalanche Energy
(Note 2)
810
mJ
IAR
Avalanche Current
(Note 1)
12.5
A
EAR
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TC = 25°C)
(Note 1)
17
4.5
-55 to +150
mJ
V/ns
W
W/°C
°C
300
°C
dv/dt
PD
TJ, TSTG
TL
- Pulsed
(Note 1)
(Note 3)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
170
1.35
56
0.45
* Drain current limited by maximum junction temperature.
Thermal Characteristics
Symbol
RθJC
Parameter
Thermal Resistance, Junction-to-Case
RθCS
Thermal Resistance, Case-to-Sink
©2002 Fairchild Semiconductor Corporation
FQP13N50
0.74
FQPF13N50
2.23
Units
°C/W
0.5
--
°C/W
Rev. B, September 2002
FQP13N50/FQPF13N50
QFET
Symbol
TC = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max
Units
500
--
--
V
--
0.48
--
V/°C
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = 250 µA
∆BVDSS
/ ∆TJ
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, Referenced to 25°C
IDSS
IGSSF
IGSSR
VDS = 500 V, VGS = 0 V
--
--
1
µA
VDS = 400 V, TC = 125°C
--
--
10
µA
Gate-Body Leakage Current, Forward
VGS = 30 V, VDS = 0 V
--
--
100
nA
Gate-Body Leakage Current, Reverse
VGS = -30 V, VDS = 0 V
--
--
-100
nA
3.0
--
5.0
V
--
0.33
0.43
Ω
--
10
--
S
--
1800
2300
pF
--
245
320
pF
--
25
35
pF
Zero Gate Voltage Drain Current
On Characteristics
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
RDS(on)
Static Drain-Source
On-Resistance
VGS = 10 V, ID = 6.25 A
gFS
Forward Transconductance
VDS = 50 V, ID = 6.25 A
(Note 4)
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = 250 V, ID = 13.4 A,
RG = 25 Ω
(Note 4, 5)
VDS = 400 V, ID = 13.4 A,
VGS = 10 V
(Note 4, 5)
--
40
90
ns
--
140
290
ns
--
100
210
ns
--
85
180
ns
--
45
60
nC
--
11
--
nC
--
22
--
nC
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
--
--
12.5
A
ISM
--
--
50
A
--
--
1.4
V
--
290
--
ns
--
2.6
--
µC
VSD
Maximum Pulsed Drain-Source Diode Forward Current
VGS = 0 V, IS = 12.5 A
Drain-Source Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 13.4 A,
dIF / dt = 100 A/µs
(Note 4)
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 9.3mH, IAS = 12.5A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ 13.4A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
©2002 Fairchild Semiconductor Corporation
Rev. B, September 2002
FQP13N50/FQPF13N50
Electrical Characteristics
FQP13N50/FQPF13N50
Typical Characteristics
VGS
15 V
10 V
8.0 V
7.0 V
6.5 V
6.0 V
Bottom : 5.5 V
Top :
ID , Drain Current [A]
1
10
ID , Drain Current [A]
1
10
0
10
150℃
25℃
0
10
-55℃
※ Notes :
1. VDS = 50V
2. 250μ s Pulse Test
※ Notes :
1. 250μ s Pulse Test
2. TC = 25℃
-1
-1
0
10
10
1
10
2
10
4
6
8
10
VGS , Gate-Source Voltage [V]
VDS , Drain-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
1.4
IDR , Reverse Drain Current [A]
RDS(ON) [Ω ],
Drain-Source On-Resistance
1.2
VGS = 10V
1.0
VGS = 20V
0.8
0.6
0.4
1
10
0
10
150℃
25℃
※ Notes :
1. VGS = 0V
2. 250μ s Pulse Test
0.2
※ Note : TJ = 25℃
0.0
-1
0
10
20
30
50
10
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
ID, Drain Current [A]
VSD , Source-Drain Voltage [V]
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
3500
12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
3000
VDS = 100V
Ciss
Coss
2000
1500
1000
※ Notes :
1. VGS = 0 V
2. f = 1 MHz
Crss
500
VGS, Gate-Source Voltage [V]
10
2500
Capacitance [pF]
40
VDS = 250V
VDS = 400V
8
6
4
2
※ Note : ID = 13.4 A
0
0
-1
10
0
10
1
10
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
©2002 Fairchild Semiconductor Corporation
0
5
10
15
20
25
30
35
40
45
50
QG, Total Gate Charge [nC]
Figure 6. Gate Charge Characteristics
Rev. B, September 2002
FQP13N50/FQPF13N50
Typical Characteristics
(Continued)
3.0
1.2
RDS(ON) , (Normalized)
Drain-Source On-Resistance
BV DSS , (Normalized)
Drain-Source Breakdown Voltage
2.5
1.1
1.0
※ Notes :
1. VGS = 0 V
2. ID = 250 μ A
0.9
0.8
-100
-50
0
50
100
150
2.0
1.5
1.0
※ Notes :
1. VGS = 10 V
2. ID = 6.7 A
0.5
0.0
-100
200
0
50
100
150
200
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
Operation in This Area
is Limited by R DS(on)
2
10
Operation in This Area
is Limited by R DS(on)
2
10
1
1 ms
1
10 µs
100 µs
1 ms
10 ms
100 ms
10 µs
ID, Drain Current [A]
100 µs
ID, Drain Current [A]
-50
o
o
10
10 ms
DC
0
10
※ Notes :
10
DC
0
10
-1
※ Notes :
10
o
o
1. TC = 25 C
1. TC = 25 C
o
o
2. TJ = 150 C
3. Single Pulse
2. TJ = 150 C
3. Single Pulse
-1
10
-2
0
1
10
2
10
3
10
10
10
0
10
1
10
2
10
3
10
VDS, Drain-Source Voltage [V]
VDS, Drain-Source Voltage [V]
Figure 9-1. Maximum Safe Operating Area
for FQP13N50
Figure 9-2. Maximum Safe Operating Area
for FQPF13N50
15
ID, Drain Current [A]
12
9
6
3
0
25
50
75
100
125
150
TC, Case Temperature [℃]
Figure 10. Maximum Drain Current
vs. Case Temperature
©2002 Fairchild Semiconductor Corporation
Rev. B, September 2002
(Continued)
0
10
D = 0 .5
0 .2
10
※ N o te s :
1 . Z θ J C ( t) = 0 .7 4 ℃ / W M a x .
2 . D u ty F a c to r , D = t 1 /t 2
3 . T J M - T C = P D M * Z θ J C ( t)
-1
0 .1
0 .0 5
PDM
0 .0 2
JC
( t) , T h e r m a l R e s p o n s e
FQP13N50/FQPF13N50
Typical Characteristics
0 .0 1
t1
Z
θ
s i n g le p u ls e
10
t2
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
10
D = 0 .5
0
0 .2
※ N o te s :
1 . Z θ J C ( t) = 2 .2 3 ℃ /W M a x .
2 . D u ty F a c to r , D = t 1 /t 2
3 . T J M - T C = P D M * Z θ J C ( t)
0 .1
10
0 .0 5
-1
0 .0 2
PDM
0 .0 1
θ JC
( t) , T h e r m a l R e s p o n s e
Figure 11-1. Transient Thermal Response Curve
for FQP13N50
t1
Z
t2
10
s i n g l e p u ls e
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ]
Figure 11. Transient Thermal Response Curve
for FQPF13N50
©2002 Fairchild Semiconductor Corporation
Rev. B, September 2002
FQP13N50/FQPF13N50
Gate Charge Test Circuit & Waveform
VGS
Same Type
as DUT
50KΩ
Qg
200nF
12V
10V
300nF
VDS
VGS
Qgs
Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS
RL
VDS
90%
VDD
VGS
RG
VGS
DUT
10V
10%
td(on)
tr
td(off)
t on
tf
t off
Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- L IAS2 -------------------2
BVDSS - VDD
L
VDS
BVDSS
IAS
ID
RG
VDD
DUT
10V
tp
©2002 Fairchild Semiconductor Corporation
ID (t)
VDS (t)
VDD
tp
Time
Rev. B, September 2002
FQP13N50/FQPF13N50
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
I SD
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
VSD
VDD
Body Diode
Forward Voltage Drop
©2002 Fairchild Semiconductor Corporation
Rev. B, September 2002
TO-220
4.50 ±0.20
2.80 ±0.10
(3.00)
+0.10
1.30 –0.05
18.95MAX.
(3.70)
ø3.60 ±0.10
15.90 ±0.20
1.30 ±0.10
(8.70)
(1.46)
9.20 ±0.20
(1.70)
9.90 ±0.20
1.52 ±0.10
0.80 ±0.10
2.54TYP
[2.54 ±0.20]
10.08 ±0.30
(1.00)
13.08 ±0.20
)
(45°
1.27 ±0.10
+0.10
0.50 –0.05
2.40 ±0.20
2.54TYP
[2.54 ±0.20]
10.00 ±0.20
Dimensions in Millimeters
©2002 Fairchild Semiconductor Corporation
Rev. B, September 2002
FQP13N50/FQPF13N50
Package Dimensions
(Continued)
3.30 ±0.10
TO-220F
10.16 ±0.20
2.54 ±0.20
ø3.18 ±0.10
(7.00)
(1.00x45°)
15.87 ±0.20
15.80 ±0.20
6.68 ±0.20
(0.70)
0.80 ±0.10
)
0°
(3
9.75 ±0.30
MAX1.47
#1
+0.10
0.50 –0.05
2.54TYP
[2.54 ±0.20]
2.76 ±0.20
2.54TYP
[2.54 ±0.20]
9.40 ±0.20
4.70 ±0.20
0.35 ±0.10
Dimensions in Millimeters
©2002 Fairchild Semiconductor Corporation
Rev. B, September 2002
FQP13N50/FQPF13N50
Package Dimensions
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx
FACT
ActiveArray
FACT Quiet Series
Bottomless
FASTâ
CoolFET
FASTr
CROSSVOLT FRFET
DOME
GlobalOptoisolator
EcoSPARK
GTO
E2CMOSTM
HiSeC
EnSignaTM
I2C
Across the board. Around the world.
The Power Franchise
Programmable Active Droop
ImpliedDisconnect PACMAN
POP
ISOPLANAR
Power247
LittleFET
PowerTrenchâ
MicroFET
QFET
MicroPak
QS
MICROWIRE
QT Optoelectronics
MSX
Quiet Series
MSXPro
RapidConfigure
OCX
RapidConnect
OCXPro
SILENT SWITCHERâ
OPTOLOGICâ
SMART START
OPTOPLANAR
SPM
Stealth
SuperSOT-3
SuperSOT-6
SuperSOT-8
SyncFET
TinyLogicâ
TruTranslation
UHC
UltraFETâ
VCX
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
2. A critical component is any component of a life
1. Life support devices or systems are devices or
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I2
工商网监
湘ICP备2023018690号
