FQP17N08L

QFET TM FQP17N08L 80V LOGIC N-Channel MOSFET General Description Features These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology is especially tailored to minimize on-state resistance, provide superior switching performance, and withstand a high energy pulse in the avalanche and commutation modes. These devices are well suited for low voltage applications such as automotive, high efficiency switching for DC/DC converters, and DC motor control. • • • • • • • • 16.5A, 80V, RDS(on) = 0.1Ω @VGS = 10 V Low gate charge ( typical 8.8 nC) Low Crss ( typical 29 pF) Fast switching 100% avalanche tested Improved dv/dt capability 175°C maximum junction temperature rating Low level gate drive requirements allowing direct operation from logic drives D ! " G G! DS ! " " " TO-220 ! FQP Series Absolute Maximum Ratings Symbol VDSS ID S TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current FQP17N08L 80 - Continuous (TC = 100°C) IDM Drain Current VGSS Gate-Source Voltage EAS Single Pulsed Avalanche Energy IAR EAR dv/dt PD TJ, TSTG TL - Pulsed (Note 1) Units V 16.5 A 11.6 A 66 A ± 20 V (Note 2) 100 mJ Avalanche Current (Note 1) 16.5 A Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C) (Note 1) 6.5 6.5 65 0.43 -55 to +175 mJ V/ns W W/°C °C 300 °C (Note 3) - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8” from case for 5 seconds Thermal Characteristics Symbol RθJC Parameter Thermal Resistance, Junction-to-Case Typ -- RθCS Thermal Resistance, Case-to-Sink 0.5 -- °C/W RθJA Thermal Resistance, Junction-to-Ambient -- 62.5 °C/W ©2000 Fairchild Semiconductor International Max 2.31 Units °C/W Rev. A2, December 2000 FQP17N08L December 2000 Symbol TC = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 80 -- -- V ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C -- 0.08 -- V/°C VDS = 80 V, VGS = 0 V -- -- 1 µA VDS = 64 V, TC = 150°C -- -- 10 µA Gate-Body Leakage Current, Forward VGS = 20 V, VDS = 0 V -- -- 100 nA Gate-Body Leakage Current, Reverse VGS = -20 V, VDS = 0 V -- -- -100 nA Gate Threshold Voltage VDS = VGS, ID = 250 µA 1.0 -- 2.0 V RDS(on) Static Drain-Source On-Resistance VGS = 10 V, ID = 8.25 A VGS = 5 V, ID = 8.25 A -- 0.076 0.090 0.100 0.115 Ω gFS Forward Transconductance VDS = 25 V, ID = 8.25 A -- 12.4 -- S -- 400 520 pF -- 120 155 pF -- 29 37 pF IDSS IGSSF IGSSR Zero Gate Voltage Drain Current On Characteristics VGS(th) (Note 4) Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance VDS = 25 V, VGS = 0 V, f = 1.0 MHz Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 40 V, ID = 16.5 A, RG = 25 Ω (Note 4, 5) VDS = 64 V, ID = 16.5 A, VGS = 5 V (Note 4, 5) -- 7 25 ns -- 290 590 ns -- 20 50 ns -- 75 160 ns -- 8.8 11.5 nC -- 2.0 -- nC -- 5.4 -- nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- 16.5 A ISM -- -- 66 A -- -- 1.5 V VGS = 0 V, IS = 16.5 A, dIF / dt = 100 A/µs -- 55 -- ns -- 85 -- nC VSD Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 16.5 A Drain-Source Diode Forward Voltage trr Reverse Recovery Time Qrr Reverse Recovery Charge (Note 4) Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 0.5mH, IAS = 16.5A, VDD = 25V, RG = 25 Ω, Starting TJ = 25°C 3. ISD ≤ 16.5A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, Starting TJ = 25°C 4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2% 5. Essentially independent of operating temperature ©2000 Fairchild Semiconductor International Rev. A2, December 2000 FQP17N08L Electrical Characteristics FQP17N08L Typical Characteristics VGS 10.0 V 8.0 V 6.0 V 5.0 V 4.5 V 4.0 V 3.5 V Bottom : 3.0 V 1 10 1 ID , Drain Current [A] ID, Drain Current [A] Top : 10 175℃ 0 10 25℃ -55℃ ※ Notes : 1. VDS = 25V 2. 250μs Pulse Test ※ Notes : 1. 250μs Pulse Test 2. TC = 25℃ 0 10 -1 -1 0 10 10 1 10 0 10 2 4 6 8 10 VGS , Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics IDR , Reverse Drain Current [A] RDS(on) [ Ω ], Drain-Source On-Resistance 0.4 0.3 VGS = 5V 0.2 VGS = 10V 0.1 1 10 0 10 175℃ ※ Notes : 1. VGS = 0V 2. 250μs Pulse Test 25℃ ※ Note : TJ = 25℃ -1 0.0 0 10 20 30 40 50 10 0.4 0.6 0.8 1.0 1.2 1.4 1.6 VSD , Source-Drain Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 12 1100 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 1000 10 800 700 ※ Notes : 1. VGS = 0 V 2. f = 1 MHz Ciss 600 Coss 500 400 300 Crss 200 VGS, Gate-Source Voltage [V] 900 Capacitance [pF] 0.2 ID , Drain Current [A] VDS = 40V 8 VDS = 64V 6 4 2 100 ※ Note : ID = 16.5A 0 -1 10 0 0 10 1 10 VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics ©2000 Fairchild Semiconductor International 0 2 4 6 8 10 12 14 16 QG, Total Gate Charge [nC] Figure 6. Gate Charge Characteristics Rev. A2, December 2000 FQP17N08L Typical Characteristics (Continued) 3.0 1.2 RDS(ON) , (Normalized) Drain-Source On-Resistance BV DSS , (Normalized) Drain-Source Breakdown Voltage 2.5 1.1 1.0 ※ Notes : 1. VGS = 0 V 2. ID = 250 μA 0.9 0.8 -100 -50 0 50 100 150 2.0 1.5 1.0 ※ Notes : 1. VGS = 10 V 2. ID = 8.25 A 0.5 0.0 -100 200 -50 o 0 50 100 150 200 o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 18 Operation in This Area is Limited by R DS(on) 2 15 10 1 ms ID, Drain Current [A] ID, Drain Current [A] 100 µs 10 ms 1 10 DC 0 10 12 9 6 ※ Notes : 3 o 1. TC = 25 C o 2. TJ = 175 C 3. Single Pulse -1 10 0 1 10 0 25 2 10 10 50 100 125 150 175 Figure 10. Maximum Drain Current vs. Case Temperature D = 0 .5 0 ※ N o te s : 1 . Z θ J C ( t) = 2 .3 1 ℃ /W M a x . 2 . D u ty F a c to r , D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C ( t) 0 .2 0 .1 0 .0 5 10 -1 0 .0 2 0 .0 1 θ JC ( t) , T h e r m a l R e s p o n s e Figure 9. Maximum Safe Operating Area 10 75 TC, Case Temperature [℃] VDS, Drain-Source Voltage [V] PDM t1 Z s i n g l e p u ls e 10 t2 -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ] Figure 11. Transient Thermal Response Curve ©2000 Fairchild Semiconductor International Rev. A2, December 2000 FQP17N08L Gate Charge Test Circuit & Waveform VGS Same Type as DUT 50KΩ Qg 200nF 12V 5V 300nF VDS VGS Qgs Qgd DUT 3mA Charge Resistive Switching Test Circuit & Waveforms VDS RL VDS 90% VDD VGS RG VGS DUT 5V 10% td(on) tr td(off) t on tf t off Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L VDS BVDSS IAS ID RG VDD DUT 10V tp ©2000 Fairchild Semiconductor International ID (t) VDS (t) VDD tp Time Rev. A2, December 2000 FQP17N08L Peak Diode Recovery dv/dt Test Circuit & Waveforms DUT + VDS _ I SD L Driver RG VGS VGS ( Driver ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current I SD ( DUT ) di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop ©2000 Fairchild Semiconductor International Rev. A2, December 2000 FQP17N08L Package Dimensions TO-220 4.50 ±0.20 2.80 ±0.10 (3.00) +0.10 1.30 –0.05 18.95MAX. (3.70) ø3.60 ±0.10 15.90 ±0.20 1.30 ±0.10 (8.70) (1.46) 9.20 ±0.20 (1.70) 9.90 ±0.20 1.52 ±0.10 0.80 ±0.10 2.54TYP [2.54 ±0.20] 10.08 ±0.30 (1.00) 13.08 ±0.20 ) (45° 1.27 ±0.10 +0.10 0.50 –0.05 2.40 ±0.20 2.54TYP [2.54 ±0.20] 10.00 ±0.20 ©2000 Fairchild Semiconductor International Rev. A2, December 2000 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DOME™ E2CMOS™ EnSigna™ FACT™ FACT Quiet Series™ FAST® FASTr™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ POP™ PowerTrench® QFET™ QS™ QT Optoelectronics™ Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. ©2000 Fairchild Semiconductor International Rev. F1