TM
FQP18N20V2/FQPF18N20V2
200V N-Channel MOSFET
General Description
Features
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild’s proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the
avalanche and commutation mode. These devices are well
suited for low voltage applications such as automotive, high
efficiency switching for DC/DC converters, and DC motor
control.
•
•
•
•
•
•
18A, 200V, RDS(on) = 0.14Ω @VGS = 10 V
Low gate charge ( typical 20 nC)
Low Crss ( typical 25 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
D
!
●
◀
G!
G DS
TO-220
TO-220F
GD S
FQP Series
▲
●
●
FQPF Series
!
S
Absolute Maximum Ratings
Symbol
VDSS
ID
TC = 25°C unless otherwise noted
Parameter
Drain-Source Voltage
- Continuous (TC = 25°C)
Drain Current
FQP18N20V2
- Continuous (TC = 100°C)
IDM
Drain Current
VGSS
Gate-Source Voltage
- Pulsed
(Note 1)
FQPF18N20V2
200
Units
V
18
18
A
11.9
11.9
A
72
72
A
± 30
V
mJ
EAS
Single Pulsed Avalanche Energy
(Note 2)
340
IAR
Avalanche Current
(Note 1)
18
A
EAR
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Power Dissipation (TC = 25°C)
(Note 1)
12.3
6.5
-55 to +150
mJ
V/ns
W
W/°C
°C
300
°C
dv/dt
PD
TJ, TSTG
TL
(Note 3)
- Derate above 25°C
Operating and Storage Temperature Range
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
123
0.99
40
0.32
Thermal Characteristics
Symbol
RθJC
Parameter
Thermal Resistance, Junction-to-Case
RθCS
Thermal Resistance, Case-to-Sink
RθJA
Thermal Resistance, Junction-to-Ambient
©2002 Fairchild Semiconductor Corporation
FQP18N20V2
1.01
FQPF18N20V2
3.1
Units
°C/W
0.5
--
°C/W
62.5
62.5
°C/W
Rev. B, August 2002
FQP18N20V2/FQPF18N20V2
QFET
Symbol
TC = 25°C unless otherwise noted
Parameter
Test Conditions
Min
Typ
Max
Units
200
--
--
V
--
0.25
--
V/°C
Off Characteristics
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = 250 µA
∆BVDSS
/
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, Referenced to 25°C
IDSS
IGSSF
IGSSR
VDS = 200 V, VGS = 0 V
--
--
1
µA
VDS = 160 V, TC = 125°C
--
--
10
µA
Gate-Body Leakage Current, Forward
VGS = 30 V, VDS = 0 V
--
--
100
nA
Gate-Body Leakage Current, Reverse
VGS = -30 V, VDS = 0 V
--
--
-100
nA
3.0
--
5.0
V
--
0.12
0.14
Ω
--
11
--
S
--
830
1080
pF
--
200
260
pF
--
25
33
pF
--
70
--
pF
--
135
--
pF
ns
Zero Gate Voltage Drain Current
On Characteristics
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
RDS(on)
Static Drain-Source
On-Resistance
VGS = 10 V, ID = 9 A
gFS
Forward Transconductance
VDS = 40 V, ID = 9 A
(Note 4)
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Coss
Output Capacitance
Coss eff.
Effective Output Capacitance
VDS = 25 V, VGS = 0 V,
f = 1.0 MHz
VDS = 160 V, VGS = 0 V,
f = 1.0 MHz
VDS = 0V to 160 V, VGS = 0 V
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Turn-On Rise Time
td(off)
Turn-Off Delay Time
tf
Turn-Off Fall Time
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = 100 V, ID = 18 A,
RG = 25 Ω
(Note 4, 5)
VDS = 160 V, ID = 18 A,
VGS = 10 V
(Note 4, 5)
--
16
40
--
133
275
ns
--
38
85
ns
--
62
135
ns
--
20
26
nC
--
5.6
--
nC
--
10
--
nC
A
Drain-Source Diode Characteristics and Maximum Ratings
IS
Maximum Continuous Drain-Source Diode Forward Current
--
--
18
ISM
--
--
72
A
VSD
Maximum Pulsed Drain-Source Diode Forward Current
VGS = 0 V, IS = 18 A
Drain-Source Diode Forward Voltage
--
--
1.5
V
trr
Reverse Recovery Time
--
158
--
ns
Qrr
Reverse Recovery Charge
--
1.0
--
µC
VGS = 0 V, IS = 18 A,
dIF / dt = 100 A/µs
(Note 4)
Notes:
1. Repetitive Rating : Pulse width limited by maximum junction temperature
2. L = 1.58mH, IAS = 18A, VDD = 50V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ 18A, di/dt ≤ 200A/µs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Pulse Test : Pulse width ≤ 300µs, Duty cycle ≤ 2%
5. Essentially independent of operating temperature
©2002 Fairchild Semiconductor Corporation
Rev. B, August 2002
FQP18N20V2/FQPF18N20V2
Electrical Characteristics
VGS
Top :
15.0 V
10.0 V
10
8.0 V
1
1
ID , Drain Current [A]
ID, Drain Current [A]
7.0 V
6.5 V
6.0 V
Bottom :
10
5.5 V
0
※ Notes :
10
-1
150℃
10
25℃
-55℃
0
10
1. 250μ s Pulse Test
※ Notes :
1. VDS = 40V
2. 250μ s Pulse Test
2. TC = 25℃
10
-1
10
0
10
1
-1
10
VDS, Drain-Source Voltage [V]
4
5
6
7
8
9
10
VGS , Gate-Source Voltage [V]
Figure 1. On-Region Characteristics
Figure 2. Transfer Characteristics
0.4
IDR , Reverse Drain Current [A]
R DS(ON) [Ω ],
Drain-Source On-Resistance
0.5
VGS = 10V
VGS = 20V
0.3
0.2
0.1
1
10
0
10
150℃
25℃
※ Notes :
1. VGS = 0V
※ Note : TJ = 25℃
2. 250μ s Pulse Test
-1
0.0
0
10
20
30
40
50
10
60
0.2
0.4
0.6
0.8
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
1.2
1.4
1.6
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
12
2500
Ciss = C gs + Cgd (Cds = shorted)
VDS = 40V
Coss = Cds + Cgd
1500
1. VGS = 0 V
2. f = 1 MHz
Ciss
Coss
500
Crss
VGS , Gate-Source Voltage [V]
※ Notes :
1000
VDS = 100V
10
Crss = C gd
2000
Capacitance [pF]
1.0
VSD , Source-Drain Voltage [V]
ID, Drain Current [A]
VDS = 160V
8
6
4
2
※ Note : ID = 18A
0
-1
10
10
0
10
1
VDS, Drain-Source Voltage [V]
Figure 5. Capacitance Characteristics
©2002 Fairchild Semiconductor Corporation
0
0
5
10
15
20
25
QG, Total Gate Charge [nC]
Figure 6. Gate Charge Characteristics
Rev. B, August 2002
FQP18N20V2/FQPF18N20V2
Typical Characteristics
(Continued)
3.0
1.2
R DS(ON) , (Normalized)
1.0
※ Notes :
0.9
1. VGS = 0 V
2. ID = 250 μ A
Drain-Source On-Resistance
BV DSS , (Normalized)
Drain-Source Breakdown Voltage
2.5
1.1
2.0
1.5
1.0
※ Notes :
0.5
1. VGS = 10 V
2. ID = 9 A
0.8
-100
-50
0
50
100
150
0.0
-100
200
-50
0
50
100
o
TJ, Junction Temperature [ C]
Figure 7. Breakdown Voltage Variation
vs. Temperature
Operation in This Area
Operation in This Area
is Limited by R DS(on)
is Limited by R DS(on)
2
10
10
100 us
ID , Drain Current [A]
ID, Drain Current [A]
100 us
1 ms
10 ms
1
DC
※ Notes :
0
10
o
1. TC = 25 C
o
2. TJ = 150 C
3. Single Pulse
1 ms
1
10
10 ms
100 ms
DC
※ Notes :
0
10
o
1. TC = 25 C
o
2. TJ = 150 C
3. Single Pulse
10
-1
0
-1
10
10
200
Figure 8. On-Resistance Variation
2
10
150
o
TJ, Junction Temperature [ C]
0
1
10
1
10
2
10
2
10
10
VDS, Drain-Source Voltage [V]
VDS, Drain-Source Voltage [V]
Figure 9-1. Maximum Safe Operating Area
for FQP18N20V2
Figure 9-2. Maxiumum Safe Operating Area
for FQPF18N20V2
20
ID, Drain Current [A]
15
10
5
0
25
50
75
100
125
150
TC, Case Temperature [℃]
Figure 10. Maximum Drain Current
vs. Case Temperature
©2002 Fairchild Semiconductor Corporation
Rev. B, August 2002
FQP18N20V2/FQPF18N20V2
Typical Characteristics
(Continued)
0
D = 0 .5
※
0 .2
N o te s :
1. Z
10
0 .1
-1
θ
JC
(t) = 1 .0 1 ℃ /W M a x .
2 . D u ty F a c to r, D = t1 /t2
3. T
0 .0 5
0 .0 2
JC
(t) , T h e r m a l R e s p o n s e
10
FQP18N20V2/FQPF18N20V2
Typical Characteristics
JM
- T
C
= P
* Z
DM
θ
JC
(t)
PDM
0 .0 1
t1
Z
θ
s in g le p u ls e
10
t2
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t1 , S q u a r e W a v e P u ls e D u r a t io n [s e c ]
D = 0 .5
10
0
0 .2
※
0 .1
N o te s :
1. Z
0 .0 5
10
3. T
0 .0 2
0 .0 1
JC
(t) = 3 .1 ℃ /W M a x .
JM
- T
C
= P
D M
* Z
θ
JC
(t)
PDM
t1
Z
θ
s in g le p u ls e
10
θ
2 . D u ty F a c to r, D = t1 /t2
-1
JC
( t), T h e r m a l R e s p o n s e
Figure 11-1. Transient Thermal Response Curve for FQP18N20V2
t2
-2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t1 , S q u a r e W a v e P u ls e D u r a tio n [s e c ]
Figure 11-2. Transient Thermal Response Curve for FQPF18N20V2
©2002 Fairchild Semiconductor Corporation
Rev. B, August 2002
FQP18N20V2/FQPF18N20V2
Gate Charge Test Circuit & Waveform
VGS
Same Type
as DUT
50KΩ
Qg
200nF
12V
10V
300nF
VDS
VGS
Qgs
Qgd
DUT
3mA
Charge
Resistive Switching Test Circuit & Waveforms
VDS
RL
VDS
90%
VDD
VGS
RG
VGS
DUT
10V
10%
td(on)
tr
td(off)
t on
tf
t off
Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- L IAS2 -------------------2
BVDSS - VDD
L
VDS
BVDSS
IAS
ID
RG
VDD
DUT
10V
tp
©2002 Fairchild Semiconductor Corporation
ID (t)
VDS (t)
VDD
tp
Time
Rev. B, August 2002
FQP18N20V2/FQPF18N20V2
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
_
I SD
L
Driver
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by RG
• ISD controlled by pulse period
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
I SD
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
VSD
VDD
Body Diode
Forward Voltage Drop
©2002 Fairchild Semiconductor Corporation
Rev. B, August 2002
TO-220
4.50 ±0.20
2.80 ±0.10
(3.00)
+0.10
1.30 –0.05
18.95MAX.
(3.70)
ø3.60 ±0.10
15.90 ±0.20
1.30 ±0.10
(8.70)
(1.46)
9.20 ±0.20
(1.70)
9.90 ±0.20
1.52 ±0.10
0.80 ±0.10
2.54TYP
[2.54 ±0.20]
10.08 ±0.30
(1.00)
13.08 ±0.20
)
(45°
1.27 ±0.10
+0.10
0.50 –0.05
2.40 ±0.20
2.54TYP
[2.54 ±0.20]
10.00 ±0.20
Dimensions in Millimeters
©2002 Fairchild Semiconductor Corporation
Rev. B, August 2002
FQP18N20V2/FQPF18N20V2
Package Dimensions
3.30 ±0.10
TO-220F
10.16 ±0.20
2.54 ±0.20
ø3.18 ±0.10
(7.00)
(1.00x45°)
15.87 ±0.20
15.80 ±0.20
6.68 ±0.20
(0.70)
0.80 ±0.10
)
0°
(3
9.75 ±0.30
MAX1.47
#1
+0.10
0.50 –0.05
2.54TYP
[2.54 ±0.20]
2.76 ±0.20
2.54TYP
[2.54 ±0.20]
9.40 ±0.20
4.70 ±0.20
0.35 ±0.10
Dimensions in Millimeters
©2002 Fairchild Semiconductor Corporation
Rev. B, August 2002
FQP18N20V2/FQPF18N20V2
Package Dimensions (Continued)
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DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems
2. A critical component is any component of a life support
which, (a) are intended for surgical implant into the body,
device or system whose failure to perform can be
or (b) support or sustain life, or (c) whose failure to perform
reasonably expected to cause the failure of the life support
when properly used in accordance with instructions for use
device or system, or to affect its safety or effectiveness.
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or In
Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
©2002 Fairchild Semiconductor Corporation
Rev. I1
