FQU13N06LTU

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Other names and brands may be claimed as the property of others. N-Channel QFET® MOSFET 60 V, 11 A, 115 mΩ Features • 11 A, 60 V, RDS(on) = 115 mΩ (Max) @ VGS = 10 V, ID = 5.5 A Description This N-Channel enhancement mode power MOSFET is produced using ON Semiconductor’s proprietary planar stripe and DMOS technology. This advanced MOSFET technology has been especially tailored to reduce on-state resistance, and to provide superior switching performance and high avalanche energy strength. These devices are suitable for switched mode power supplies, audio amplifier, DC motor control, and variable switching power applications. • Low Gate Charge (Typ. 4.8 nC) • Low Crss (Typ. 17 pF) • 100% Avalanche Tested • Low Level Gate Drive Requirements Allowing Direct Operation form Logic Drivers D 2, 4 4 4 1 I-PAK 2 1 2 3 D-PAK Absolute Maximum Ratings T Symbol VDSS ID 1G 3 S 3 o C = 25 C unless otherwise noted. FQD13N06LTM / FQU13N06LTU FQU13N06LTU-WS Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current - Continuous (TC = 100°C) Unit 60 V 11 A 7 A 44 A IDM Drain Current VGSS Gate-Source Voltage EAS Single Pulsed Avalanche Energy (Note 2) IAR Avalanche Current (Note 1) 11 A EAR Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TA = 25°C) * (Note 1) 2.8 7.0 2.5 mJ V/ns W 28 0.22 -55 to +150 W W/°C °C 300 °C dv/dt PD TJ, TSTG TL - Pulsed (Note 1) (Note 3) Power Dissipation (TC = 25°C) - Derate above 25°C Operating and Storage Temperature Range Maximum Lead Temperature for Soldering, 1/8" from Case5for Seconds ± 20 V 90 mJ Thermal Characteristics Symbol RJC RJA FQD13N06LTM FQU13N06LTU FQU13N06LTU-WS Parameter Thermal Resistance, Junction to Case, Max. 2.5 Thermal Resistance, Junction to Ambient (Minimum Pad of 2-oz Copper), Max. 110 2 Thermal Resistance, Junction to Ambient (*1 in Pad of 2-oz Copper), Max. ©2000 Semiconductor Components Industries, LLC. October-2017,Rev.2 Unit oC/W 50 Publication Order Number: FQU13N06L/D FQD13N06L / FQU13N06L — N-Channel QFET® MOSFET FQD13N06L / FQU13N06L Part Number FQD13N06LTM Package D-PAK Top Mark FQD13N06L Packing Method Tape and Reel Reel Size 330 mm Tape Width 16 mm Quantity 2500 units FQU13N06LTU FQU13N06L I-PAK Tube N/A N/A 70 units FQU13N06LTU-WS FQU13N06LS I-PAK Tube N/A N/A 75 units Electrical Characteristics T Symbol o C = 25 C unless otherwise noted. Parameter Test Conditions Min Typ Max Unit Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA 60 -- -- V ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C -- 0.05 -- V/°C VDS = 60 V, VGS = 0 V -- -- 1 µA VDS = 48 V, TC = 150°C -- -- 10 µA IDSS Zero Gate Voltage Drain Current IGSSF Gate-Body Leakage Current, Forward VGS = 20 V, VDS = 0 V -- -- 100 nA IGSSR Gate-Body Leakage Current, Reverse VGS = -20 V, VDS = 0 V -- -- -100 nA On Characteristics Gate Threshold Voltage VDS = VGS, ID = 250 µA 1.0 -- 2.5 V RDS(on) VGS(th) Static Drain-Source On-Resistance VGS = 10 V, ID = 5.5 A VGS = 5 V, ID = 5.5 A --- 0.092 0.115 0.115 0.145 Ω gFS Forward Transconductance VDS = 25 V, ID = 5.5 A -- 6 -- S VDS = 25 V, VGS = 0 V, f = 1.0 MHz -- 270 350 pF -- 95 125 pF -- 17 23 pF -- 8 25 ns ns Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = 30 V, ID = 6.8 A, RG = 25 Ω (Note 4) VDS = 48 V, ID = 13.6 A, VGS = 5 V (Note 4) -- 90 190 -- 20 50 ns -- 40 90 ns -- 4.8 6.4 nC -- 1.6 -- nC -- 2.7 -- nC 11 A A Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- ISM Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = 11 A Drain-Source Diode Forward Voltage -- -- 44 VSD -- -- 1.5 V trr Reverse Recovery Time -- 45 -- ns Qrr Reverse Recovery Charge -- 45 -- nC VGS = 0 V, IS = 13.6 A, dIF / dt = 100 A/µs
 1. Repetitive rating : pulse-width limited by maximum junction temperature. 2. L = 870 µH, IAS = 11 A, VDD = 25 V, RG = 25 Ω, starting TJ = 25oC. 3. ISD ≤ 13.6 A, di/dt ≤ 300 A/μs, VDD ≤ BVDSS, starting TJ = 25oC. 4. Essentially independent of operating temperature. www.onsemi.com 2 FQD13N06L / FQU13N06L — N-Channel QFET® MOSFET Package Marking and Ordering Information VGS 10.0 V 8.0 V 6.0 V 5.0 V 4.5 V 4.0 V 3.5 V Bottom : 3.0 V Top : ID, Drain Current [A] 10 1 10 ID, Drain Current [A] 1 0 10 150℃ 25℃ ※ Notes : 1. 250μ s Pulse Test 2. TC = 25℃ 0 10 ※ Notes : 1. VDS = 25V 2. 250μ s Pulse Test -55℃ -1 -1 0 10 10 1 10 10 0 2 4 8 6 10 VGS, Gate-Source Voltage [V] VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 1 10 200 IDR, Reverse Drain Current [A] R DS(ON) [mΩ ], Drain-Source On-Resistance 300 VGS = 5V VGS = 10V ※ Note : TJ = 25℃ 0 0 10 100 0 10 20 40 30 150℃ -1 10 ID, Drain Current [A] 0.2 ※ Notes : 1. VGS = 0 V 2. f = 1 MHz Ciss 400 Crss 10 0 1.2 1.4 1.6 VDS = 30V VDS = 48V 8 6 4 2 ※ Note : ID = 13.6A 0 10 1.0 12 V GS , Gate-Source Voltage [V] Capacitance [pF] Coss 0 -1 10 0.8 Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 600 200 0.6 0.4 VSD, Source-Drain voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage 800 ※ Notes : 1. VGS = 0V 2. 250μ s Pulse Test 25℃ 0 1 10 2 4 6 8 10 QG, Total Gate Charge [nC] VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics www.onsemi.com 3 FQD13N06L / FQU13N06L — N-Channel QFET® MOSFET  !    1.2 2.5 BV DSS , (Normalized) Drain-Source Breakdown Voltage 2.0 RDS(ON) , (Normalized) Drain-Source On-Resistance 1.1 1.5 1.0 1.0 ※ Notes : 1. VGS = 0 V 2. ID = 250 μ A 0.9 0.8 -100 -50 0 50 100 0.5 150 ※ Notes : 1. VGS = 10 V 2. ID = 5.5 A 0.0 -100 200 -50 0 o 50 100 150 200 o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 10 10 1 Operation in This Area is Limited by R DS(on) 10 ID , Drain Current [A] 100 µ s 1 ms 10 ms DC 10 0 ※ Notes : 8 6 4 2 o 1. TC = 25 C o 2. TJ = 150 C 3. Single Pulse 0 25 -1 10 10 -1 0 1 10 2 10 10 50 75 100 125 TC, Case Temperature [℃] VDS, Drain-Source Voltage [V] Figure 9. Maximum Safe Operating Area ZJC(t), Thermal Response [oC/W] ID , Drain Current [A] 12 2 Figure 10. Maximum Drain Current vs. Case Temperature D = 0 .5 10 0 0 .2 ※ N otes : 1 . Z θ J C( t ) = 4 . 5 ℃ /W M a x . 2 . D u t y F a c t o r , D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C( t ) 0 .1 0 .0 5 10 10 PDM 0 .0 2 0 .0 1 -1 -5 t1 s in g le p u ls e 10 -4 10 -3 10 -2 10 -1 t2 10 0 t1 , R e c t a n g u l a r P u l s e D u r a t i o n [ s e c ] Figure 11. Transient Thermal Response Curve www.onsemi.com 4 10 1 150 FQD13N06L / FQU13N06L — N-Channel QFET® MOSFET  !   



   FQD13N06L / FQU13N06L — N-Channel QFET® MOSFET 50KΩ 200nF 12V VGS Same Type as DUT Qg 10V 300nF VDS VGS Qgs Qgd DUT IG = const. 3mA Charge Figure 12. Gate Charge Test Circuit & Waveform VDS RG RL VDS 90% VDD VGS VGS DUT V 10V GS 10% td(on) tr td(off) t on t off tf Figure 13. Resistive Switching Test Circuit & Waveforms VDS BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L BVDSS IAS ID RG V 10V GS GS VDD DUT ID (t) VDS (t) VDD tp tp Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms www.onsemi.com 5 Time + VDS _ I SD L Driver RG VGS VGS ( Driver ) I SD ( DUT ) Same Type as DUT VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V IFM , Body Diode Forward Current di/dt IRM Body Diode Reverse Current VDS ( DUT ) Body Diode Recovery dv/dt VSD VDD Body Diode Forward Voltage Drop Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms www.onsemi.com 6 FQD13N06L / FQU13N06L — N-Channel QFET® MOSFET DUT FQD13N06L / FQU13N06L — N-Channel QFET® MOSFET Mechanical Dimensions www.onsemi.com 7 FQU13N06LTU Figure 17. TO251 (I-PAK), Molded, 3-Lead Package drawings are provided as a service to customers considering ON Semiconductor components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a ON Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of ON Semiconductor's worldwide terms and conditions, specif-ically the warranty therein, which covers ON Semiconductor products. www.onsemi.com 8 FQD13N06L / FQU13N06L — N-Channel QFET® MOSFET Mechanical Dimensions FQU13N06LTU_WS Figure 18. TO-251 (I-PAK), Molded, 3-Lead, Option AA Package drawings are provided as a service to customers considering ON Semiconductor components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a ON Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of ON Semiconductor’s worldwide terms and conditions, specif-ically the warranty therein, which covers ON Semiconductor products. www.onsemi.com 9 FQD13N06L / FQU13N06L — N-Channel QFET® MOSFET Mechanical Dimensions ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. 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