FSA8038UMSX_F106

ADVANCE INFORMATION — CONFIDENTIAL AND PROPRIETARY — DO NOT DISTRIBUTE April 2013 FSA8038 © 2012 Fairchild Semiconductor Corporation FSA8038 • Rev. 0.0.5 www.fairchildsemi.com ADVANCE INFORMATION — CONFIDENTIAL AND PROPRIETARY — DO NOT DISTRIBUTE Pin Configuration © 2012 Fairchild Semiconductor Corporation FSA8038 • Rev. 0.0.5 www.fairchildsemi.com 2 ADVANCE INFORMATION — CONFIDENTIAL AND PROPRIETARY — DO NOT DISTRIBUTE Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter VDD, VIO Supply Voltage from Battery Min. Max. Unit -0.5 6.0 V VSW Switch I/O Voltage for “S” Switch and All Input Voltages Except J_DET -0.5 VDD+0.5 V VJD Input Voltage for J_DET Input -1.5 VDD+0.5 V IIK Input Clamp Diode Current -50 ISW Switch I/O Current (Continuous) TSTG Storage Temperature Range -65 mA 50 mA +150 C TJ Maximum Junction Temperature +150 C TL Lead Temperature (Soldering, 10 Seconds) +260 C IEC 61000-4-2 System ESD ESD JEDEC JESD22-A114, Human Body Model Air Gap 15 Contact 8 J_DET, J_MIC, VDD, VIO, GND 8 All other pins 4 JEDEC JESD22-C101, Charged Device Model All Pins kV 1 Note: 1. The input and output negative ratings may be exceeded if the input and output diode current ratings are observed. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to Absolute Maximum Ratings. Symbol Parameter Min. Max. Unit VDD Battery Supply Voltage 2.5 4.5 V VIO Parallel I/O Supply Voltage 1.6 VDD V TA Operating Temperature -40 +85 ºC © 2012 Fairchild Semiconductor Corporation FSA8038 • Rev. 0.0.5 www.fairchildsemi.com 3 ADVANCE INFORMATION — CONFIDENTIAL AND PROPRIETARY — DO NOT DISTRIBUTE DC Electrical Characteristics All typical values are at TA=25°C unless otherwise specified. Symbol Parameter VDD (V) Conditions TA = -40 to +85°C Min. Typ. Max. Units MIC Switch RON MIC Switch On Resistance 2.8 2.0 2.0 3.0 1.5 2.0 1.2 2.0 1.0 2.0 IOUT = 30 mA, VIN = 2.2 V 3.3 3.8 2.8 RFLAT(ON) On Resistance Flatness 1.5 3.0 1.5 IOUT = 30 mA, VIN = 1.6 to 2.8 V 3.3 1.5 3.8 VIN CON COFF Switch Input Voltage Range MIC and J_MIC Switch ON Capacitance MIC and J_MIC Switch OFF Capacitance 1.5 2.5 to 4.5 0 VDD V 3.8 f = 1 MHz 80 pF 3.8 f = 1 MHz 30 pF J_DET J_DETAudioV J_DETAudiof Audio Voltage Range on J_DET Pin Audio Frequency on J_DET Pin J_DETRGND Detection Resistance to Ground J_DETHYS J_DETVIH Hysteresis of J_DET Input High Voltage J_DETVIL Input Low Voltage Parallel I/O VIH Input High Voltage VIL Input Low Voltage VOH Output High Voltage VOL Output Low Voltage Comparator Comparator Threshold for VCOMP_S/E SEND/END Sensing Current Power Off Leakage Current IOFF Through Switch IIN Input Leakage Current ICC-SLNA Battery Supply Sleep Mode Current No Accessory Attached ICC-SLWA Battery Supply Sleep Mode Current with Accessory Attached © 2012 Fairchild Semiconductor Corporation FSA8038 • Rev. 0.0.5 2.5 to 4.5 DET = LOW -1 1 V 2.5 to 4.5 DET = LOW Audio Jack 2.5 to 4.5 Inserted 20 20000 Hz 0 500 200 0.7 × V DD VDD 0.4 × VDD -1 0.7 × VIO IOH = -100 µA IOL = +100 µA J_DET, EN = LOW 3.2 to 4.5 MIC, J_MIC Ports VIN = 4.3 V 0 Inputs VIN = 4.3 V Static Current During Sleep 2.5 to 4.5 Mode (EN = LOW) Active Current (EN = LOW 2.5 to 4.4 and/or DET = HIGH) VIO 0.3 × VIO 0.8 × VIO k mV V V V 0.2 × VIO 780 mV 1 µA 1 µA 2 3 µA 15 25 µA 0 www.fairchildsemi.com 4 ADVANCE INFORMATION — CONFIDENTIAL AND PROPRIETARY — DO NOT DISTRIBUTE AC Electrical Characteristics All typical values are for VCC=3.3 V at TA=25°C unless otherwise specified. Symbol Parameter VDD (V) Conditions TA = -40 to +85°C Unit Min. Typ. Max. MIC Switch RT = 600 , VSW = 0.5 VPP, f = 20 Hz to 20 kHz, VIN = 2.2 V f = 20 kHz, RS = 32 , CL = 0 pF, RT = 32 0.01 % -90 dB 15 ns 2.5 to 4.5 1 ms 2.5 to 4.5 10 ms 2.5 to 4.5 250 ms 2.5 to 4.5 30 µs 2.5 to 4.5 30 ms -80 dB THD Total Harmonic Distortion 3.8 OIRR Off Isolation 3.8 Parallel I/O tR, tF tPOLL tWAIT tDET_IN tDET_REM tKBK Output Edge Rates (DET, S/E) On Time of MIC Switch for Sensing SEND/END Button Press Oscillator Stable Time Period of MIC Switching Time for Sensing SEND/END Button Press Debounce Time after J_DET Changes State from High to Low Debounce Time after J_DET Changes State from Low to High Debounce Time for Sensing SEND/END Key Press / Release 3.8 CL = 5 pF, 20% to 80% Power PSRR Power Supply Rejection Ratio © 2012 Fairchild Semiconductor Corporation FSA8038 • Rev. 0.0.5 Power Supply Noise 300 mVPP, Measured 10/90%, f = 217 Hz 3.8 www.fairchildsemi.com 5 ADVANCE INFORMATION — CONFIDENTIAL AND PROPRIETARY — DO NOT DISTRIBUTE Physical Dimensions 1.40 0.10 C A 2X (10X) 1.70 B 0.563 0.563 1 2.10 1.80 PIN#1 IDENT 0.40 0.10 C TOP VIEW 0.55 MAX. 0.10 C (10X) 0.225 2X RECOMMENDED LAND PATTERN (0.15) 1.45 0.08 C 0.45 SEATING C PLANE 0.05 0.00 FRONT VIEW (10X) 0.45 0.40 1.85 0.35 (10X) 0.45 3 (10X) 0.250 6 DETAIL A OPTIONAL MINIMIAL TOE LAND PATTERN 0.40 1 PIN#1 IDENT 0.15 (10X) SIDE VIEW 0.25 10 BOTTOM VIEW 0.45 0.35 45° 0.25 0.15 DETAIL A SCALE : 2X 0.10 C A B 0.05 C C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 2009. D. LAND PATTERN RECOMMENDATION IS BASED ON FSC DESIGN. LEAD OPTION 2 E. DRAWING FILENAME: MKT-UMLP10SGrev1 F. FAIRCHILD SEMICONDUCTOR. SCALE : 2X Figure 3. Table 1. A. SAMSUNG ONLY CUSTOMER DRAWING. B. DIMENSIONS ARE IN MILLIMETERS. PACKAGE EDGE LEAD OPTION 1 NOTES: 10-Lead UMLP Package Drawing Nominal Values JEDEC Symbol Description Nominal Values (mm) A Overall Height 0.5 A1 Package Standoff 0.026 A3 Lead Thickness 0.152 b Lead Width 0.2 L Lead Length 0.4 e Lead Pitch 0.4 D Body Length (Y) 1.8 E Body Width (X) 1.4 Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2012 Fairchild Semiconductor Corporation FSA8038 • Rev. 0.0.5 www.fairchildsemi.com 6 ADVANCE INFORMATION — CONFIDENTIAL AND PROPRIETARY — DO NOT DISTRIBUTE © 2012 Fairchild Semiconductor Corporation FSA8038 • Rev. 0.0.5 www.fairchildsemi.com 7