FSB50450US

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This literature is subject to all applicable copyright laws and is not for resale in any manner. FSB50450US Motion SPM® 5 Series Features Related Source • UL Certified No. E209204 (UL1557) • AN-9082 - Motion SPM5 Series Thermal Performance by Contact Pressure • 500 V RDS(on) = 2.4 Max FRFET MOSFET 3-Phase Inverter with Gate Drivers and Protection General Description • Separate Open-Source Pins from Low-Side MOSFETs for Three-Phase Current-Sensing The FSB50450US is an advanced Motion SPM® 5 module providing a fully-featured, high-performance inverter output stage for AC Induction, BLDC and PMSM motors. These modules integrate optimized gate drive of the built-in MOSFETs (FRFET® technology) to minimize EMI and losses, while also providing multiple on-module protection features including under-voltage lockouts. The built-in high-speed HVIC requires only a single supply voltage and translates the incoming logic-level gate inputs to the high-voltage, high-current drive signals required to properly drive the module's internal MOSFETs. Separate open-source MOSFET terminals are available for each phase to support the widest variety of control algorithms. • Active-HIGH Interface, Works with 3.3 / 5 V Logic, Schmitt-trigger Input • Optimized for Low Electromagnetic Interference • HVIC for Gate Driving and Under-Voltage Protection • Isolation Rating: 1500 Vrms / min. • Moisture Sensitive Level (MSL) 3 • RoHS Compliant Applications • 3-Phase Inverter Driver for Small Power AC Motor Drives Package Marking & Ordering Information Device Marking Device Package Reel Size Packing Type Quantity FSB50450US FSB50450US SPM5H-023 330mm Tape-Reel 450 ©2010 Fairchild Semiconductor Corporation FSB50450US Rev. C4 1 www.fairchildsemi.com FSB50450US Motion SPM® 5 Series January 2014 Inverter Part (each MOSFET unless otherwise specified.) Symbol Parameter Conditions Rating Unit 500 V VDSS Drain-Source Voltage of Each MOSFET *ID 25 Each MOSFET Drain Current, Continuous TC = 25°C 1.5 A *ID 80 Each MOSFET Drain Current, Continuous TC = 80°C 1.1 A *IDP Each MOSFET Drain Current, Peak TC = 25°C, PW < 100 s 3.8 A *PD Maximum Power Dissipation TC = 25°C, For Each MOSFET 14 W Rating Unit Control Part (each HVIC unless otherwise specified.) Symbol Parameter Conditions VCC Control Supply Voltage Applied Between VCC and COM 20 V VBS High-side Bias Voltage Applied Between VB and VS 20 V VIN Input Signal Voltage Applied Between IN and COM -0.3 ~ VCC + 0.3 V Conditions Rating Unit Each MOSFET under Inverter Operating Condition (1st Note 1) 8.9 °C/W Conditions Rating Unit Operating Junction Temperature -40 ~ 150 °C TSTG Storage Temperature -50 ~ 150 °C VISO Isolation Voltage 1500 Vrms Thermal Resistance Symbol RJC Parameter Junction to Case Thermal Resistance Total System Symbol TJ Parameter 60 Hz, Sinusoidal, 1 Minute, Connect Pins to Heat Sink Plate 1st Notes: 1. For the measurement point of case temperature TC, please refer to Figure 4. 2. Marking “ * “ is calculation value or design factor. ©2010 Fairchild Semiconductor Corporation FSB50450US Rev. C4 2 www.fairchildsemi.com FSB50450US Motion SPM® 5 Series Absolute Maximum Ratings FSB50450US Motion SPM® 5 Series Pin descriptions Pin Number Pin Name Pin Description 1 COM IC Common Supply Ground 2 VB(U) Bias Voltage for U Phase High Side MOSFET Driving 3 VCC(U) Bias Voltage for U Phase IC and Low Side MOSFET Driving 4 IN(UH) Signal Input for U Phase High-Side 5 IN(UL) Signal Input for U Phase Low-Side 6 VS(U) Bias Voltage Ground for U Phase High Side MOSFET Driving 7 VB(V) Bias Voltage for V Phase High Side MOSFET Driving 8 VCC(V) Bias Voltage for V Phase IC and Low Side MOSFET Driving 9 IN(VH) Signal Input for V Phase High-Side 10 IN(VL) Signal Input for V Phase Low-Side 11 VS(V) Bias Voltage Ground for V Phase High Side MOSFET Driving 12 VB(W) Bias Voltage for W Phase High Side MOSFET Driving 13 VCC(W) Bias Voltage for W Phase IC and Low Side MOSFET Driving 14 IN(WH) Signal Input for W Phase High-Side 15 IN(WL) Signal Input for W Phase Low-Side 16 VS(W) 17 P Positive DC–Link Input 18 U Output for U Phase 19 NU Negative DC–Link Input for U Phase 20 NV Negative DC–Link Input for V Phase 21 V Output for V Phase 22 NW Negative DC–Link Input for W Phase 23 W Output for W Phase Bias Voltage Ground for W Phase High Side MOSFET Driving (1) COM (17) P (2) VB(U) (3) VCC(U) VCC VB (4) IN(UH) HIN HO (5) IN(UL) LIN VS COM LO (18) U (6) VS(U) (19) NU (7) VB(V) (8) VCC(V) VCC VB (9) IN(VH) HIN HO (10) IN(VL) LIN VS COM LO (20) NV (21) V (11) VS(V) (12) VB(W) (13) VCC(W) VCC VB (14) IN(WH) HIN HO LIN VS COM LO (15) IN(WL) (22) NW (23) W (16) VS(W) Figure 1. Pin Configuration and Internal Block Diagram (Bottom View) 1st Notes: 3. Source terminal of each low-side MOSFET is not connected to supply ground or bias voltage ground inside Motion SPM® 5 product. External connections should be made as indicated in Figure 3. ©2010 Fairchild Semiconductor Corporation FSB50450US Rev. C4 3 www.fairchildsemi.com Inverter Part (each MOSFET unless otherwise specified.) Symbol BVDSS Parameter Drain - Source Breakdown Voltage Conditions VIN = 0 V, ID = 1 mA (2nd Note 1) Min Typ Max Unit 500 - - V Breakdown Voltage TemID = 250A, Referenced to 25°C perature Coefficient - 0.53 - V Zero Gate Voltage Drain Current VIN = 0 V, VDS = 500 V - - 250 A RDS(on) Static Drain - Source Turn-On Resistance VCC = VBS = 15 V, VIN = 5 V, ID = 0.5 A - 1.9 2.4  VSD Drain - Source Diode Forward Voltage VCC = VBS = 15V, VIN = 0 V, ID = -0.5 A - - 1.2 V - 1250 - ns - 500 - ns Switching Times VPN = 300 V, VCC = VBS = 15 V, ID = 0.5 A VIN = 0 V  5 V, Inductive Load L = 3 mH High- and Low-Side MOSFET Switching (2nd Note 2) - 200 - ns - 80 - J - 10 - J BVDSS/ TJ IDSS tON tOFF trr EON EOFF RBSOA V = 400 V, VCC = VBS = 15 V, ID = IDP, VDS = BVDSS, Reverse Bias Safe Oper- PN TJ = 150°C ating Area High- and Low-Side MOSFET Switching (2nd Note 3) Full Square Control Part (each HVIC unless otherwise specified.) Symbol Parameter Conditions Min Typ Max Unit IQCC Quiescent VCC Current VCC = 15 V, VIN = 0 V Applied Between VCC and COM - - 160 A IQBS Quiescent VBS Current VBS = 15 V, VIN = 0 V Applied Between VB(U) - U, VB(V) - V, VB(W) - W - - 100 A Low-Side Under-Voltage Protection (Figure 8) VCC Under-Voltage Protection Detection Level 7.4 8.0 9.4 V VCC Under-Voltage Protection Reset Level 8.0 8.9 9.8 V High-Side Under-Voltage Protection (Figure 9) VBS Under-Voltage Protection Detection Level 7.4 8.0 9.4 V VBS Under-Voltage Protection Reset Level 8.0 8.9 9.8 V VIH ON Threshold Voltage Logic HIGH Level 3.0 - - V VIL OFF Threshold Voltage Logic LOW Level - - 0.8 V - 10 20 A - - 2 A UVCCD UVCCR UVBSD UVBSR IIH IIL Input Bias Current VIN = 5V VIN = 0V Applied between IN and COM Applied between IN and COM 2nd Notes: 1. BVDSS is the absolute maximum voltage rating between drain and source terminal of each MOSFET inside Motion SPM® 5 product. VPN should be sufficiently less than this value considering the effect of the stray inductance so that VPN should not exceed BVDSS in any case. 2. tON and tOFF include the propagation delay of the internal drive IC. Listed values are measured at the laboratory test condition, and they can be different according to the field applications due to the effect of different printed circuit boards and wirings. Please see Figure 4 for the switching time definition with the switching test circuit of Figure 5. 3. The peak current and voltage of each MOSFET during the switching operation should be included in the Safe Operating Area (SOA). Please see Figure 5 for the RBSOA test circuit that is same as the switching test circuit. ©2010 Fairchild Semiconductor Corporation FSB50450US Rev. C4 4 www.fairchildsemi.com FSB50450US Motion SPM® 5 Series Electrical Characteristics (TJ = 25°C, VCC = VBS = 15 V unless otherwise specified.) Symbol Parameter Conditions Min. Typ. Max. Unit VPN Supply Voltage Applied Between P and N - 300 400 V VCC Control Supply Voltage Applied Between VCC and COM 13.5 15.0 16.5 V VBS High-Side Bias Voltage Applied Between VB and VS 13.5 15.0 16.5 V 3.0 - VCC V 0 - 0.6 V 1.0 - - s - 15 - kHz VIN(ON) Input ON Threshold Voltage VIN(OFF) Input OFF Threshold Voltage Applied Between IN and COM tdead Blanking Time for Preventing VCC = VBS = 13.5 ~ 16.5 V, TJ 150°C Arm-Short fPWM PWM Switching Frequency TJ 150°C These values depend on PWM control algorithm R2 15-V Line R1 P D1 R5 Micom C5 VCC VB HIN HO LIN VS COM LO Inverter Output C3 N C2 10F VDC R3 HIN LIN Output Note 0 0 Z Both FRFET Off 0 1 0 Low side FRFET On 1 0 VDC High side FRFET On 1 1 Forbidden Shoot through Open Open Z Same as (0,0) One-Leg Diagram of SPM ® 5 Product C1 * Example of bootstrap paramters: C1 = C2 = 1F ceramic capacitor, R1 = 56 R2 = 20 Figure 2. Recommended MCU Interface and Bootstrap Circuit with Parameters 3rd Notes: 1. It is recommended the bootstrap diode D1 to have soft and fast recovery characteristics with 600 V rating. 2. Parameters for bootstrap circuit elements are dependent on PWM algorithm. For 15 kHz of switching frequency, typical example of parameters is shown above. 3. RC-coupling (R5 and C5) and C4 at each input of Motion SPM 5 product and MCU (Indicated as Dotted Lines) may be used to prevent improper signal due to surge-noise. 4. Bold lines should be short and thick in PCB pattern to have small stray inductance of circuit, which results in the reduction of surge-voltage. Bypass capacitors such as C1, C2 and C3 should have good high-frequency characteristics to absorb high-frequency ripple-current. 14.50mm 3.80mm Case Temperature(Tc) Detecting Point MOSFET Figure 3. Case Temperature Measurement 3rd Notes: 5. Attach the thermocouple on top of the heat-sink of SPM 5 package (between SPM 5 package and heatsink if applied) to get the correct temperature measurement. ©2010 Fairchild Semiconductor Corporation FSB50450US Rev. C4 5 www.fairchildsemi.com FSB50450US Motion SPM® 5 Series Recommended Operating Condition FSB50450US Motion SPM® 5 Series VIN VIN Irr 120% of ID 100% of ID VDS ID 10% of ID ID VDS tON trr tOFF (a) Turn-on (b) Turn-off Figure 4. Switching Time Definitions REH VCC ID RBS VCC VB HIN HO LIN VS COM LO L VDC + VDS - CBS One-leg Diagram of Motion SPM® 5 Product Figure 5. Switching and RBSOA (Single-pulse) Test Circuit (Low-side) Input Signal UV Protection Status Low-side Supply, VCC RESET DETECTION RESET UVCCR UVCCD MOSFET Current Figure 6. Under-Voltage Protection (Low-Side) Input Signal UV Protection Status High-side Supply, VBS RESET DETECTION RESET UVBSR UVBSD MOSFET Current Figure 7. Under-Voltage Protection (High-Side) ©2010 Fairchild Semiconductor Corporation FSB50450US Rev. C4 6 www.fairchildsemi.com (1) COM (2) VB(U) R1 (3) VCC(U) R5 (4) IN(UH) (5) IN(UL) C5 C2 C1 R1 (6) VS(U) VCC VB HIN HO LIN VS COM LO (18) U C3 (9) IN(VH) (10) IN(VL) C2 C1 R1 (11) VS(V) VDC (19) NU (7) VB(V) (8) VCC(V) Micom (17) P VCC VB HIN HO LIN VS COM LO VCC VB HIN HO LIN VS COM LO (20) NV (21) V M (12) VB(W) (13) VCC(W) (14) IN(WH) (15) IN(WL) C2 C1 (16) VS(W) (22) NW (23) W For 3-phase current sensing and protection 15-V Supply R4 C4 R3 Figure 8. Example of Application Circuit 4th Notes: 1. About pin position, refer to Figure 1. 2. RC-coupling (R5 and C5, R4 and C6) and C4 at each input of Motion SPM® 5 product and MCU are useful to prevent improper input signal caused by surge-noise. 3. The voltage-drop across R3 affects the low-side switching performance and the bootstrap characteristics since it is placed between COM and the source terminal of the lowside MOSFET. For this reason, the voltage-drop across R3 should be less than 1 V in the steady-state. 4. Ground-wires and output terminals, should be thick and short in order to avoid surge-voltage and malfunction of HVIC. 5. All the filter capacitors should be connected close to Motion SPM 5 product, and they should have good characteristics for rejecting high-frequency ripple current. ©2010 Fairchild Semiconductor Corporation FSB50450US Rev. C4 7 www.fairchildsemi.com FSB50450US Motion SPM® 5 Series R2 FSB50450US Motion SPM® 5 Series Detailed Package Outline Drawings Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or data on the drawing and contact a FairchildSemiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide therm and conditions, specifically the the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/dwg/MO/MOD23DE.pdf ©2010 Fairchild Semiconductor Corporation FSB50450US Rev. C4 8 www.fairchildsemi.com FSB50450US Motion SPM® 5 Series ©2010 Fairchild Semiconductor Corporation FSB50450US Rev. C4 9 www.fairchildsemi.com ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 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