Is Now Part of
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will need to change in order to meet ON Semiconductor’s system requirements. Since the ON Semiconductor
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Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON
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FSB50550B / FSB50550BS
Motion SPM® 5 Series
Features
Related Source
• UL Certified No. E209204 (UL1557)
• RD-FSB50450AS - Reference Design for Motion SPM
5 Series Ver.2
• Optimized for over 10 kHz Switching Frequency
• AN-9082 - Motion SPM5 Series Thermal Performance
by Contact Pressure
• 500 V FRFET MOSFET 3-Phase Inverter with Gate
Drivers and Protection
• Built-In Bootstrap Diodes Simplify PCB Layout
• Separate Open-Source Pins from Low-Side MOSFETs
for Three-Phase Current-Sensing
General Description
The FSB50550B / FSB50550BS is an advanced Motion
SPM® 5 module providing a fully-featured, highperformance inverter output stage for AC Induction,
BLDC
and
PMSM
motors.
These
modules
integrate optimized gate drive of the built-in MOSFETs
(FRFET® technology) to minimize EMI and losses, while
also providing multiple on-module protection features
including under-voltage lockouts and thermal monitoring.
The built-in high-speed HVIC requires only a single
supply voltage and translates the incoming logic-level
gate inputs to the high-voltage, high-current drive signals
required to properly drive the module's internal
MOSFETs. Separate open-source MOSFET terminals
are available for each phase to support the widest
variety of control algorithms.
• Active-HIGH Interface, Works with 3.3 / 5 V Logic,
Schmitt-trigger Input
• Optimized for Low Electromagnetic Interference
• HVIC Temperature-Sensing Built-In for Temperature
Monitoring
• HVIC for Gate Driving and Under-Voltage Protection
• Isolation Rating: 1500 Vrms / min.
• RoHS Complia
• Moisture Sensitive Level (MSL) 3 for SMD PKG
Applications
• 3-Phase Inverter Driver for Small Power AC Motor
Drives
< FSB50550B >
Figure 1. 3D Package Drawing
(Click to Activate 3D Content)
Package Marking & Ordering Information
Device
Device Marking
Package
Packing Type
Reel Size
Quantity
FSB50550B
FSB50550B
SPM5P-023
Rail
NA
15
FSB50550BS
FSB50550BS
SPM5Q-023
Tape & Reel
330mm
450
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1
FSB50550B / FSB50550BS Motion SPM® 5 Series
February 2017
Inverter Part (each MOSFET unless otherwise specified.)
Symbol
Parameter
Conditions
Rating
Unit
VDSS
Drain-Source Voltage of Each MOSFET
500
V
*ID 25
Each MOSFET Drain Current, Continuous TC = 25°C
3.0
A
*ID 80
Each MOSFET Drain Current, Continuous TC = 80°C
1.9
A
*IDP
Each MOSFET Drain Current, Peak
TC = 25°C, PW < 100 μs
7.0
A
*IDRMS
Each MOSFET Drain Current, Rms
TC = 80°C, FPWM < 20 kHz
1.3
Arms
Rating
Unit
20
V
Control Part (each HVIC unless otherwise specified.)
Symbol
Parameter
Conditions
VDD
Control Supply Voltage
Applied between VDD and COM
VBS
High-side Bias Voltage
Applied between VB and VS
VIN
Input Signal Voltage
Applied between VIN and COM
20
V
-0.3 ~ VDD + 0.3
V
Rating
Unit
500
V
Bootstrap Diode Part (each bootstrap diode unless otherwise specified.)
Symbol
VRRMB
Parameter
Conditions
Maximum Repetitive Reverse Voltage
* IFB
Forward Current
TC = 25°C
0.5
A
* IFPB
Forward Current (Peak)
TC = 25°C, Under 1ms Pulse Width
2.0
A
Conditions
Rating
Unit
Inverter MOSFET part, (Per Module)
2.2
°C/W
Conditions
Rating
Unit
Thermal Resistance
Symbol
Rth(j-c)Q
Parameter
Junction to Case Thermal Resistance
( Note1 )
Total System
Symbol
TJ
Parameter
Operating Junction Temperature
-40 ~ 150
°C
TSTG
Storage Temperature
-40 ~ 125
°C
VISO
Isolation Voltage
1500
Vrms
60 Hz, Sinusoidal, 1 Minute, Connect Pins to Heat Sink Plate
Notes:
1. For the measurement point of case temperature TC, please refer to Figure 4.
2. Marking “ * “ is calculation value or design factor.
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2
FSB50550B / FSB50550BS Motion SPM® 5 Series
Absolute Maximum Ratings
FSB50550B / FSB50550BS Motion SPM® 5 Series
Pin descriptions
Pin Number
Pin Name
Pin Description
1
COM
IC Common Supply Ground
2
VB(U)
Bias Voltage for U-Phase High-Side MOSFET Driving
3
VDD(U)
Bias Voltage for U-Phase IC and Low-Side MOSFET Driving
4
IN(UH)
Signal Input for U-Phase High-Side
5
IN(UL)
6
N.C
No Connection
7
VB(V)
Bias Voltage for V-Phase High Side MOSFET Driving
8
VDD(V)
Bias Voltage for V-Phase IC and Low Side MOSFET Driving
9
IN(VH)
Signal Input for V-Phase High-Side
10
IN(VL)
Signal Input for V-Phase Low-Side
Signal Input for U-Phase Low-Side
Output for HVIC Temperature Sensing
11
VTS
12
VB(W)
13
VDD(W)
Bias Voltage for W-Phase IC and Low-Side MOSFET Driving
14
IN(WH)
Signal Input for W-Phase High-Side
15
IN(WL)
16
N.C
Bias Voltage for W-Phase High-Side MOSFET Driving
Signal Input for W-Phase Low-Side
No Connection
17
P
18
U, VS(U)
Positive DC-Link Input
19
NU
Negative DC-Link Input for U-Phase
20
NV
Negative DC-Link Input for V-Phase
21
V, VS(V)
22
NW
23
W, VS(W)
Output for U-Phase & Bias Voltage Ground for High-Side MOSFET Driving
Output for V-Phase & Bias Voltage Ground for High-Side MOSFET Driving
Negative DC-Link Input for W-Phase
Output for W Phase & Bias Voltage Ground for High-Side MOSFET Driving
(1) COM
(17) P
(2) VB(U)
(3) V DD(U)
VDD
VB
(4) IN (UH)
HIN
HO
(5) IN (UL)
LIN
VS
COM
LO
(18) U, V S(U)
(6) N.C
(19) N U
(7) VB(V)
(8) V DD(V)
VDD
VB
(9) IN (VH)
HIN
HO
(10) IN (VL)
LIN
VS
COM
LO
(11) V TS
(20) N V
(21) V, V S(V)
V TS
(12) V B(W)
(13) V DD(W)
VDD
VB
(14) IN (WH)
HIN
HO
LIN
VS
COM
LO
(15) IN (WL)
(22) N W
(23) W, V S(W)
(16) N.C
Figure 2. Pin Configuration and Internal Block Diagram (Bottom View)
Notes:
3. Source terminal of each low-side MOSFET is not connected to supply ground or bias voltage ground inside Motion SPM® 5 product. External connections should be made as
indicated in Figure 3.
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3
Inverter Part (each MOSFET unless otherwise specified.)
Symbol
Parameter
Conditions
BVDSS
Drain - Source
Breakdown Voltage
VIN = 0 V, ID = 1 mA ( Note 4)
IDSS
Zero Gate Voltage
Drain Current
RDS(on)
VSD
-
-
V
VIN = 0 V, VDS = 500 V
-
-
1
mA
Static Drain - Source
Turn-On Resistance
VDD = VBS = 15 V, VIN = 5 V, ID = 1.0 A
-
2.3
3.0
Ω
Drain - Source Diode
Forward Voltage
VDD = VBS = 15V, VIN = 0 V, ID = -1.0 A
-
-
1.3
V
-
350
-
ns
-
500
-
ns
Switching Times
VPN = 300 V, VDD = VBS = 15 V, ID = 1.0 A
VIN = 0 V ↔ 5 V, Inductive Load L = 3 mH
High- and Low-Side MOSFET Switching
( Note 5)
-
60
-
ns
-
22
-
μJ
-
3
-
μJ
tON
EON
EOFF
RBSOA
Unit
500
tOFF
trr
Min Typ Max
V
= 400 V, VDD = VBS = 15 V, ID = (TBD), VDS =
Reverse Bias Safe Oper- PN
BVDSS, TJ = 150°C
ating Area
High- and Low-Side MOSFET Switching ( Note 6)
Full Square
Control Part (each HVIC unless otherwise specified.)
Symbol
Parameter
Conditions
Min Typ Max
Unit
IQDD
Quiescent VDD Current
VDD = 15 V,
VIN = 0 V
IQBS
Quiescent VBS Current
VBS = 15 V,
VIN = 0 V
Applied between VB(U) - U,
VB(V) - V, VB(W) - W
-
-
100
μA
IPDD
Operating
Current
VDD
Supply
VDD - COM
VDD = 15 V, fPWM = 20 kHz, duty
= 50%, Applied to One PWM Signal Input for Low-Side
-
-
900
μA
IPBS
Operating
Current
VBS
Supply
VB(U) - VS(U), VB(V) VDD = VBS = 15 V, fPWM = 20 kHz,
- VS(V), VB(W) - Duty = 50%, Applied to One PWM
Signal Input for High-Side
VS(W)
-
-
800
μA
7.4
8.0
9.4
V
UVDDD
UVDDR
UVBSD
UVBSR
Applied between VDD and COM
-
-
200
μA
Low-Side Under-Voltage
Protection (Figure 8)
VDD Under-Voltage Protection Detection Level
VDD Under-Voltage Protection Reset Level
8.0
8.9
9.8
V
High-Side Under-Voltage
Protection (Figure 9)
VBS Under-Voltage Protection Detection Level
7.4
8.0
9.4
V
VBS Under-Voltage Protection Reset Level
8.0
8.9
9.8
V
600
790
980
mV
-
-
2.9
V
0.8
-
-
V
VTS
HVIC Temperature Sensing Voltage Output
VDD = 15 V, THVIC = 25°C ( Note 7)
VIH
ON Threshold Voltage
Logic HIGH Level
VIL
OFF Threshold Voltage
Logic LOW Level
Applied between VIN and COM
Bootstrap Diode Part (each bootstrap diode unless otherwise specified.)
Symbol
Parameter
Conditions
Min Typ Max
Unit
VFB
Forward Voltage
IF = 0.1 A, TC = 25°C (Note 8)
-
2.5
-
V
trrB
Reverse Recovery Time
IF = 0.1 A, TC = 25°C
-
80
-
ns
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4
FSB50550B / FSB50550BS Motion SPM® 5 Series
Electrical Characteristics (TJ = 25°C, VDD = VBS = 15 V unless otherwise specified.)
Symbol
Parameter
VPN
Supply Voltage
VDD
Control Supply Voltage
VBS
High-Side Bias Voltage
Conditions
Min.
Typ.
Max.
Unit
-
300
400
V
Applied between VDD and COM
13.5
15.0
16.5
V
Applied between VB and VS
13.5
15.0
16.5
V
3.0
-
VDD
V
0
-
0.6
V
1.0
-
-
μs
-
15
-
kHz
Applied between P and N
VIN(ON)
Input ON Threshold Voltage
VIN(OFF)
Input OFF Threshold Voltage
Applied between VIN and COM
tdead
Blanking Time for Preventing
VDD = VBS = 13.5 ~ 16.5 V, TJ ≤ 150°C
Arm-Short
fPWM
PWM Switching Frequency
TJ ≤ 150°C
Built-In Bootstrap Diode VF-IF Characteristic
1.0
0.9
0.8
0.7
IF [A]
0.6
0.5
0.4
0.3
0.2
0.1
0.0
0
1
2
3
4
5
6
7
8
VF [V]
9
10
11
12
13
14
15
TC = 25°C
Figure 3. Built-In Bootstrap Diode Characteristics (Typical)
Notes:
4. BVDSS is the absolute maximum voltage rating between drain and source terminal of each MOSFET inside Motion SPM® 5 product. VPN should be sufficiently less than this
value considering the effect of the stray inductance so that VPN should not exceed BVDSS in any case.
5. tON and tOFF include the propagation delay of the internal drive IC. Listed values are measured at the laboratory test condition, and they can be different according to the field
applications due to the effect of different printed circuit boards and wirings. Please see Figure 6 for the switching time definition with the switching test circuit of Figure 7.
6. The peak current and voltage of each MOSFET during the switching operation should be included in the Safe Operating Area (SOA). Please see Figure 7 for the RBSOA test
circuit that is same as the switching test circuit.
7. Vts is only for sensing-temperature of module and cannot shutdown MOSFETs automatically.
8. Built-in bootstrap diode includes around 15 Ωresistance characteristic. Please refer to Figure 2.
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5
FSB50550B / FSB50550BS Motion SPM® 5 Series
Recommended Operating Condition
C1
+15 V
* Example Circuit : V phase
VDC
P
MCU
R5
C5
VDD
VB
HIN
HO
LIN
VS
COM
LO
V
10 μF
C2
C4
LIN
Output
Note
0
0
Z
Both FRFET Off
0
1
0
Low side FRFET On
C3
1
0
VDC
High side FRFET On
1
1
Forbidden
Shoot through
Open
Open
Z
Same as (0,0)
R3
N
VTS
HIN
Inverter
Output
®
One Leg Diagram of Motion SPM 5 Product
* Example of Bootstrap Paramters
:
C1 = C2 = 1 μF Ceramic Capacitor
Figure 4. Recommended MCU Interface and Bootstrap Circuit with Parameters
Notes:
9. Parameters for bootstrap circuit elements are dependent on PWM algorithm. For 15 kHz of switching frequency, typical example of parameters is shown above.
10. RC-coupling (R5 and C5) and C4 at each input of Motion SPM 5 product and MCU (Indicated as Dotted Lines) may be used to prevent improper signal due to surge-noise.
11. Bold lines should be short and thick in PCB pattern to have small stray inductance of circuit, which results in the reduction of surge-voltage. Bypass capacitors such as C1, C2
and C3 should have good high-frequency characteristics to absorb high-frequency ripple-current.
Figure 5. Case Temperature Measurement
Notes:
12. Attach the thermocouple on top of the heat-sink of SPM 5 package (between SPM 5 package and heatsink if applied) to get the correct temperature measurement.
3.5
3.0
VTS [V]
2.5
2.0
1.5
1.0
0.5
20
40
60
80
100
120
140
160
o
THVIC [ C]
Figure 6. Temperature Profile of V TS (Typical)
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6
FSB50550B / FSB50550BS Motion SPM® 5 Series
These values depend on PWM control algorithm
VIN
Irr
VDS
120% of ID
100% of ID
ID
10% of ID
ID
VDS
tON
trr
tOFF
(a) Turn-on
(b) Turn-off
Figure 7. Switching Time Definitions
C BS
VDD
ID
VDD
VB
HIN
HO
LIN
VS
COM
LO
L
VDC
+
V DS
-
VTS
®
One Leg Diagram of Motion SPM 5 Product
Figure 8. Switching and RBSOA (Single-Pulse) Test Circuit (Low-side)
Input Signal
UV Protection
Status
Low- side Supply, VDD
RESET
SET
RESET
UVDDR
UVDDD
MOSFET Current
Figure 9. Under-Voltage Protection (Low-Side)
Input Signal
UV Protec tion
Status
High- side Supply, VBS
RESET
SET
RESET
UVBSR
UVBSD
MOSFET C urrent
Figure 10. Under-Voltage Protection (High-Side)
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7
FSB50550B / FSB50550BS Motion SPM® 5 Series
VIN
(2 ) VB(U)
(3 ) VDD(U)
R5
(4 ) IN(UH)
(5 ) IN(UL)
C5
C2
(6 ) N.C
(17) P
VDD
VB
HIN
HO
LIN
VS
COM
LO
(18) U , VS(U)
C3
(19) NU
(7 ) VB(V)
(8 ) VDD(V)
(9 ) IN(VH)
Micom
(10) IN(VL)
(11) VTS
(12) VB(W)
(13) VDD(W)
(14) IN(WH)
(15) IN(WL)
(16) N.C
VDC
VDD
VB
HIN
HO
LIN
VS
COM
LO
(20) NV
(21) V , VS(V)
M
VTS
VDD
VB
HIN
HO
LIN
VS
COM
LO
(22) NW
(23) W , VS(W)
C4
For current-sensing and protection
15 V
Supply
R4
C6
R3
Figure 11. Example of Application Circuit
Notes:
13. About pin position, refer to Figure 1.
14. RC-coupling (R5 and C5, R4 and C6) and C4 at each input of Motion SPM® 5 product and MCU are useful to prevent improper input signal caused by surge-noise.
15. The voltage-drop across R3 affects the low-side switching performance and the bootstrap characteristics since it is placed between COM and the source terminal of the lowside MOSFET. For this reason, the voltage-drop across R3 should be less than 1 V in the steady-state.
16. Ground-wires and output terminals, should be thick and short in order to avoid surge-voltage and malfunction of HVIC.
17. All the filter capacitors should be connected close to Motion SPM 5 product, and they should have good characteristics for rejecting high-frequency ripple current.
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FSB50550B / FSB50550BS Motion SPM® 5 Series
C1
(1 ) COM
FSB50550B / FSB50550BS Motion SPM® 5 Series
Detailed Package Outline Drawings ( FSB50550B )
Max 1.00
0.50 ?0.10 16X
(0.20) 13X
(1.165)
(1.165)
15X1.778=26.67 ?0.30
(1.80)
13.34?0.30
0.60
0.4 5
13.34?0.30
(1.00)
16
17
23
14.55?0.3 0
14.00
)
40
0.
12.00?0 .2 0
(R
1
6?
2?~
(2.275)
12.23 ?0.30
(1.375)
13.13?0.30
3.15?0.20
(6.05)
29.00 ?0.20
1.95?0.30
17
(0.30)
0.60?0.10 5X
Max 1.00
2.48?0.30
19
3.90?0.30 4X
23
0.50 ?0.10 2X
PIN19,20
2.95 ?0 .50
(0.17)
3.90?0.30 2X
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FSB50550B / FSB50550BS . Rev. 1.2
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE DOES NOT COMPLY
TO ANY CURRENT PACKAGING STANDARD
B) ALL DIMENSIONS ARE IN MILLIMETERS
C) DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS
D) ( ) IS REFERENCE
E) [ ] IS ASS'Y QUALITY
F) DRAWING FILENAME: MOD23DCREV4.0
G) FAIRCHILD SEMICONDUCTOR
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9
Max 1.00
0.60?0.10 16X
(1.165)
15X1.778=26.67 ?0.30
(1.165)
(1.80)
13.34?0.30
13.34?0.30
0.60
0.4 5
GAGE PLANE
(2.275)
23
12.23 ?0.30
13.13?0.30
(2.50)
2~
8?
0.30
0.05
17.00?0 .2 0
)
40
0.
12.00?0 .2 0
(R
17
0.508
16
Max 3.50
1
(1.00)
1.50?0.20
SEATING PLANE
(1.30)
(1.375)
3.15?0.20
29.00 ?0.20
2.48?0.30
3.90?0.30 4X
7.55
3.90?0.30 2X
2.80
1.95?0.30
19
0.889
1
16
1.3
23
0.50 ?0.10 2X
PIN19,20
3.90 2X
7.55
17
0.60?0.10 5X
Max 1.00
1.778 15X
NOTES: UNLESS OTHERWISE SPECIFIED
A) THIS PACKAGE DOES NOT COMPLY
TO ANY CURRENT PACKAGING STANDARD
B) ALL DIMENSIONS ARE IN MILLIMETERS
C) DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS
D) ( ) IS REFERENCE
E) DRAWING FILENAME: MOD23DGREV6.0
F) FAIRCHILD SEMICONDUCTOR
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FSB50550B / FSB50550BS . Rev. 1.2
3.90 4X
17
23
1.95
2.475
LAND PATTERN RECOMMENDATIONS
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10
FSB50550B / FSB50550BS Motion SPM® 5 Series
Detailed Package Outline Drawings ( FSB50550BS )
FSB50550B / FSB50550BS Motion SPM® 5 Series
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