DATA SHEET
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Green Mode Fairchild
Power Switch (FPSt)
FSCQ Series
FSCQ0765RT / FSCQ0965RT /
FSCQ1265RT / FSCQ1565RT
TO−220−5
CASE 340BH
MARKING DIAGRAM
Description
A Quasi−Resonant Converter (QRC) typically shows lower EMI
and higher power conversion efficiency compared to a conventional
hard−switched converter with a fixed switching frequency. Therefore,
a QRC is well suited for noise−sensitive applications, such as color TV
and audio. Each product in the FSCQ series contains an integrated
Pulse Width Modulation (PWM) controller and a SENSEFET®. This
series is specifically designed for quasi−resonant off−line Switch
Mode Power Supplies (SMPS) with minimal external components.
The PWM controller includes an integrated fixed frequency oscillator,
under−voltage lockout, leading−edge blanking (LEB), optimized gate
driver, internal soft−start, temperature−compensated precise current
sources for loop compensation, and self−protection circuitry.
Compared with a discrete MOSFET and PWM controller solution,
the FSCQ series can reduce total cost, component count, size,
and weight; while increasing efficiency, productivity, and system
reliability. These devices provide a basic platform for cost−effective
designs of quasi−resonant switching flyback converters.
Features
• Optimized for Quasi−Resonant Converter (QRC)
• Advanced Burst−Mode Operation for under 1 W Standby Power
•
•
•
•
•
•
•
•
•
•
•
$Y&Z&3&K
CQxx65RT
$Y
&Z
&3
&K
CQXX65RT
XX
= onsemi Logo
= Assembly Plant Code
= Date Code (Year & Week)
= Lot Code
= Specific Device Code
= 07, 09, 12, 15
ORDERING INFORMATION
See detailed ordering and shipping information on page 31 of
this data sheet.
Consumption
Pulse−by−Pulse Current Limit
Overload Protection (OLP) – Auto Restart
Over−Voltage Protection (OVP) – Auto Restart
Abnormal Over−Current Protection (AOCP) – Latch
Internal Thermal Shutdown (TSD) – Latch
Under−Voltage Lockout (UVLO) with Hysteresis
Low Startup Current (Typical: 25 mA)
Internal High Voltage SENSEFET
Built−in Soft−Start (20 ms)
Extended Quasi−Resonant Switching
This is a Pb−Free and Halid−Free Device
Applications
• CTV
• Audio Amplifier
Related Resources
• https://www.onsemi.com/pub/Collateral/AN−4146.pdf
• https://www.onsemi.com/pub/Collateral/AN−4140.pdf
© Semiconductor Components Industries, LLC, 2006
September, 2021 − Rev. 2
1
Publication Order Number:
FSCQ1565RT/D
FSCQ Series
VO
AC
IN
Drain
FSCQ−Series
PWM
GND
Sync
VFB
VCC
Figure 1. Typical Flyback Application
Table 1. MAXIMUM OUTPUT POWER (Note 1)
230 VAC +15% (Note 2)
85−265 VAC
Product
Open Frame (Note 3)
Open Frame (Note 3)
FSCQ0765RT
100 W
85 W
FSCQ0965RT
130 W
110 W
FSCQ1265RT
170 W
140 W
FSCQ1565RT
210 W
170 W
1. The junction temperature can limit the maximum output power.
2. 230 VAC or 100/115 VAC with doubler.
3. Maximum practical continuous power in an open frame design at 50°C ambient.
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2
FSCQ Series
Internal Block Diagram
Sync
5
Vcc
3
+
Threshold
Soft Start
Normal Operation
Auxiliary
Vref
Burst Switching
Vref
Vref
IBFB
IFB
9 V/15 V
Vcc good
Main Bias
Normal
Operation
Vref
Internal
Bias
IB
PWM
4
2.5 R
R
S
Q
R
Q
Gate
Driver
LEB
600 ns
VSD
Sync
Vovp
−
OSC
Idelay
VFB
+
fs
4.6 V/2.6 V: Normal QR
3.0 V/1.8 V: Extended QR
Burst Mode
Controller
VBurst
Vcc
Quasi−Resonant
(QR) Switching
Controller
−
Drain
1
S
Vcc good
(Vcc = 9 V)
R
Q
Q
AOCP
Q
S
Q
R
Figure 2. Functional Block Diagram
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3
2 GND
TSD
Vocp
Power Off Reset (Vcc = 6 V)
FSCQ Series
Pin Configuration
5
4
3
2
SYNC
VFB
VCC
GND
1
DRAIN
Figure 3. Pin Assignments (Top View)
PIN DESCRIPTION
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Pin No.
Symbol
Description
1
DRAIN
2
GND
This pin is the control ground and the SENSEFET source.
3
VCC
This pin is the positive supply input. This pin provides internal operating current for both startup
and steady−state operation.
4
VFB
This pin is internally connected to the inverting input of the PWM comparator. The collector
of an opto−coupler is typically tied to this pin. For stable operation, a capacitor should be placed
between this pin and GND. If the voltage of this pin reaches 7.5 V, the overload protection
triggers, which results in the FPS] shutting down.
5
SYNC
This pin is the high−voltage power SENSEFET drain connection.
This pin is internally connected to the sync detect comparator for quasi−resonant switching. In
normal quasi−resonant operation, the threshold of the sync comparator is 4.6 V / 2.6 V. Whereas,
the sync threshold is changed to 3.0 V / 1.8 V in an extended quasi−resonant operation.
ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise specified)
Parameter
Symbol
Value
Unit
Drain Pin Voltage
VDS
650
V
Supply Voltage
VCC
20
V
Analog Input Voltage Range
Vsync
−0.3 to 13
V
VFB
−0.3 to VCC
IDM
15.2
Drain Current Pulsed (Note 4)
FSCQ0765RT
Continuous Drain Current (TC = 25°C)
(TC: Case Back Surface Temperature)
FSCQ0965RT
16.4
FSCQ1265RT
21.2
FSCQ1565RT
26.4
FSCQ0765RT
Continuous Drain Current* (TDL = 25°C)
(TDL: Case Back Surface Temperature)
ID
FSCQ0965RT
4.1
FSCQ1265RT
5.3
FSCQ1565RT
6.6
FSCQ0765RT
ID*
7.6
FSCQ1265RT
11.0
FSCQ0765RT
A(rms)
A(rms)
13.3
ID
2.4
FSCQ0965RT
2.6
FSCQ1265RT
3.4
FSCQ1565RT
4.4
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4
7.0
FSCQ0965RT
FSCQ1565RT
Continuous Drain Current (TC = 100°C)
3.8
A
A(rms)
FSCQ Series
ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise specified) (continued)
Parameter
Single−Pulsed Avalanche Energy (Note 5)
FSCQ0765RT
Total Power Dissipation (TC = 25°C with Infinite Heat Sink)
Symbol
Value
Unit
EAS
570
mJ
FSCQ0965RT
630
FSCQ1265RT
950
FSCQ1565RT
1050
FSCQ0765RT
PD
45
FSCQ0965RT
49
FSCQ1265RT
50
FSCQ1565RT
75
W
Operating Junction Temperature
TJ
150
°C
Operating Ambient Temperature
TA
−25 to +85
°C
TSTG
−55 to +150
°C
2.0
kV
300
V
Storage Temperature Range
Human Body Model (All Pins Except VFB)
(GND − VFB = 1.7 kV)
Machine Model (All Pins Except VFB)
(GND − VFB = 170 V)
ESD
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
4. Repetitive rating: pulse width limited by maximum junction temperature.
5. L = 15 mH, starting TJ = 25°C. These parameters, although guaranteed by design, are not tested in production.
THERMAL CHARACTERISTICS (TA = 25°C unless otherwise specified)
Characteristic
Junction−to Case Thermal Impedance
Characteristic
Symbol
Value
Unit
FSCQ0765RT
JC
2.60
°C/W
FSCQ0965RT
2.55
FSCQ1265RT
2.50
FSCQ1565RT
2.00
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5
FSCQ Series
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified)
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
Drain−Source Breakdown Voltage
VGS = 0 V, ID = 250 mA
650
−
−
V
Zero Gate Voltage Drain Current
VDS = 650 V, VGS = 0 V
−
−
250
mA
FSCQ0765RT
VGS = 10 V, ID = 1 A
−
1.40
1.60
W
FSCQ0965RT
VGS = 10 V, ID = 1 A
−
1.00
1.20
FSCQ1265RT
VGS = 10 V, ID = 1 A
−
0.75
0.90
FSCQ1565RT
VGS = 10 V, ID = 1 A
−
0.53
0.70
FSCQ0765RT
VGS = 0 V, VDS = 25 V,
f = 1 MHz
−
1415
−
−
1750
−
FSCQ1265RT
−
2400
−
FSCQ1565RT
−
3050
−
−
100
−
−
130
−
FSCQ1265RT
−
175
−
FSCQ1565RT
−
220
−
18
20
22
SENSEFET PART
BVDSS
IDSS
RDS(ON)
CISS
Drain−Source On−State Resistance
Input Capacitance
FSCQ0965RT
COSS
Output Capacitance
FSCQ0765RT
FSCQ0965RT
VGS = 0 V, VDS = 25 V,
f = 1 MHz
pF
pF
CONTROL SECTION
fOSC
DfOSC
IFB
Switching Frequency
VFB = 5 V, VCC = 18 V
Switching Frequency Variation (Note 7)
Feedback Source Current
kHz
−25°C ≤ TA ≤ 85°C
0
±5
±10
%
VFB = 0.8 V, VCC = 18 V
0.50
0.65
0.80
mA
DMAX
Maximum Duty Cycle
VFB = 5 V, VCC = 18 V
92
95
98
%
DMIN
Minimum Duty Cycle
VFB = 0 V, VCC = 18 V
−
0
−
%
VFB = 1 V
14
15
16
V
8
9
10
18
20
22
ms
0.25
0.40
0.55
V
VFB = 0 V
60
100
140
mA
VFB = 0.9 V, Duty = 50%
1.2
1.4
1.6
ms
VFB = 0.9 V → 0 V
1.2
1.4
1.6
ms
VCC = 18 V
7.0
7.5
8.0
V
VSTART
UVLO Threshold Voltage
VSTOP
tSS
Soft−Start Time (Note 6)
BURST MODE SECTION
VBEN
Burst Mode Enable Feedback Voltage
IBFB
Burst Mode Feedback Source Current
tBS
Burst Mode Switching Time
tBH
Burst Mode Hold Time
PROTECTION SECTION
VSD
Shutdown Feedback Voltage
IDELAY
Shutdown Delay Current
VFB = 5 V, VCC = 18 V
4
5
6
mA
VOVP
Over−Voltage Protection
VFB = 3 V
11
12
13
V
VOCL
Over−Current Latch Voltage (Note 6)
VCC = 18 V
0.9
1.0
1.1
V
TSD
Thermal Shutdown Temperature (Note 7)
140
−
−
°C
4.2
4.6
5.0
V
SYNC SECTION
VCC = 18 V, VFB = 5 V
VSH1
Sync Threshold in Normal QR (H)
VSL1
Sync Threshold in Normal QR (L)
2.3
2.6
2.9
V
VSH2
Sync Threshold in Extended QR (H)
2.7
3.0
3.3
V
VSL2
Sync Threshold in Extended QR (L)
1.6
1.8
2.0
V
fSYH
Extended QR Enable Frequency
−
90
−
kHz
fSYL
Extended QR Disable Frequency
−
45
−
kHz
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FSCQ Series
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified) (continued)
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
VFB = 5 V
−
4
6
mA
FSCQ0965RT
−
6
8
FSCQ1265RT
−
6
8
FSCQ1565RT
−
7
9
−
0.25
0.50
mA
TOTAL DEVICE SECTION
IOP
IOB
ISTART
ISN
Operating Supply Current in Normal
Operation (Note 8)
FSCQ0765RT
Operating Supply Current in Burst Mode
(Non−Switching) (Note 8)
VFB = GND
Startup Current
VCC = VSTART − 0.1 V
−
25
50
mA
Sustain Latch Current (Note 6)
VCC = VSTOP − 0.1 V
−
50
100
mA
VCC = 18 V, VFB = 5 V
4.40
5.00
5.60
A
FSCQ0965RT
5.28
6.00
6.72
FSCQ1265RT
6.16
7.00
7.84
FSCQ1565RT
7.04
8.00
8.96
CURRENT SENSE SECTION
ILIM
IBUR(pk)
Maximum Current Limit (Note 9)
Burst Peak Current
FSCQ0765RT
FSCQ0765RT
VCC = 18 V, VFB = Pulse
0.65
0.90
1.15
FSCQ0965RT
0.60
0.90
1.20
FSCQ1265RT
0.80
1.20
1.60
FSCQ1565RT
−
1.00
−
A
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
6. These parameters, although guaranteed, are tested only in wafer test process.
7. These parameters, although guaranteed by design, are not tested in production.
8. This parameter is the current flowing in the control IC.
9. These parameters indicate inductor current.
10. These parameters, although guaranteed, are tested only in wafer test process.
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FSCQ Series
TYPICAL PERFORMANCE CHARACTERISTICS
Figure 4. Operating Supply Current
Figure 5. Burst Mode Supply Current
(Non−Switching)
Figure 7. Start Threshold Voltage
Figure 6. Startup Current
Figure 8. Stop Threshold Voltage
Figure 9. Initial Frequency
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FSCQ Series
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Figure 10. Maximum Duty Cycle
Figure 11. Over−Voltage Protection
Figure 13. Shutdown Feedback Voltage
Figure 12. Shutdown Delay Current
Figure 14. Feedback Source Current
Figure 15. Burst Mode Feedback Source Current
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FSCQ Series
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Figure 16. Feedback Offset Voltage
Figure 17. Burst Mode Enable Feedback Voltage
Figure 18. Sync. Threshold in Normal QR(H)
Figure 19. Sync. Threshold in Normal QR(L)
Figure 20. Sync. Threshold in Extended QR(H)
Figure 21. Sync. Threshold in Extended QR(L)
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FSCQ Series
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
Figure 23. Extended QR Disable Frequency
Figure 22. Extended QR Enable Frequency
Figure 24. Pulse−by−Pulse Current Limit
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FSCQ Series
Functional Description
The minimum average of the current supplied from the
AC is given by:
Startup
Figure 25 shows the typical startup circuit and the
transformer auxiliary winding for the FSCQ series. Before
the FSCQ series begins switching, it consumes only startup
current (typically 25 mA). The current supplied from the AC
line charges the external capacitor (Ca1) that is connected to
the VCC pin. When VCC reaches the start voltage of 15 V
(VSTART), the FSCQ series begins switching and its current
consumption increases to IOP. Then, the FSCQ series
continues normal switching operation and the power
required is supplied from the transformer auxiliary winding,
unless VCC drops below the stop voltage of 9 V (VSTOP). To
guarantee stable operation of the control IC, VCC has
under−voltage lockout (UVLO) with 6 V hysteresis.
Figure 26 shows the relationship between the operating
supply current of the FSCQ series and the supply voltage
(VCC).
I SUP
AVG
+
ǒ
Ǹ2 @ VAC MIN
p
−
V START
2
Ǔ
@
1
R STR
(eq. 1)
where Vacmin is the minimum input voltage, VSTART is
the FSCQ series’ start voltage (15 V), and Rstr is
the startup resistor. The startup resistor should be
chosen so that Isupavg is larger than the maximum
startup current (50 mA).
Once the resistor value is determined, the maximum loss in
the startup resistor is obtained as:
Loss +
1
R STR
ȡǒV
@ȧ
Ȣ
AC
Ǔ
MAX 2
) V START
2
2
*
2 Ǹ2 @ V START @ V AC
p
ȣ
ȧ
Ȥ
MAX
(eq. 2)
where Vacmax is the maximum input voltage.
The startup resistor should have properly rated dissipation
wattage.
CDC
Synchronization
The FSCQ series employs a quasi−resonant switching
technique to minimize the switching noise and loss. In this
technique, a capacitor (Cr) is added between the MOSFET
drain and the source, as shown in Figure 27. The basic
waveforms of the quasi−resonant converter are shown in
Figure 28. The external capacitor lowers the rising slope of
the drain voltage to reduce the EMI caused when the
MOSFET turns off. To minimize the MOSFET’s switching
loss, the MOSFET should be turned on when the drain
voltage reaches its minimum value, as shown in Figure 28.
1N4007
AC line
(Vacmin − Vacmax)
Isup
Rstr
Da
VCC
FSCQ−Series
Ca2
Ca1
CDC
Figure 25. Startup Circuit
+
VDC
−
Np
Ns
Lm
Drain
ICC
IOP Value
FSCQ0565RT: 4 mA (Typ.)
FSCQ0765RT: 4 mA (Typ.)
FSCQ0965RT: 6 mA (Typ.)
FSCQ1265RT: 6 mA (Typ.)
FSCQ1565RT: 7 mA (Typ.)
Cr
Ids
Sync
+
Vds
−
GND
Vco
Vcc
Da
Rcc
IOP
Ca1
Power Down
Power Up
VCC
VSTART = 15 V
Na
DSY
RSY1
ISTART
VSTOP = 9 V
Ca2
CSY
VZ
Figure 26. Relationship between Operating Supply
Current and VCC Voltage
RSY2
Figure 27. Synchronization Circuit
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12
Vo
FSCQ Series
Vds
MOSFET
On
MOSFET
Off
Vgs
2VRO
tQ
VRO
VRO
Vds
Vsync
VDC
V
Vrh (4.6 V)
Ids
tR
Ipk
Vrf (2.6 V)
MOSFET Gate
Figure 28. Quasi−Resonant Operation Waveforms
ON
The minimum drain voltage is indirectly detected by
monitoring the VCC winding voltage, as shown in Figure 27
and Figure 29. Choose voltage dividers, RSY1 and RSY2, so
that the peak voltage of the sync signal (Vsypk) is lower than
the OVP voltage (12 V) to avoid triggering OVP in normal
operation. It is typical to set Vsypk to be lower than OVP
voltage by 3–4 V. To detect the optimum time to turn on
MOSFET, the sync capacitor (CSY) should be determined
so that tR is the same with tQ, as shown in Figure 29. The tR
and tQ are given as:
t R + R SY2 @ C SY @ In
ǒ
V CO
2.6
@
R SY2
R SY1 ) R SY2
t Q + p @ ǸL m @ C eo
V CO +
where:
Lm
Ns
Na
VFo
VFa
Ceo
N a @ ǒV O ) V FOǓ
Ns
* V Fa
Ǔ
ON
Figure 29. Normal QR Operation Waveforms
Switching
Frequency
Extended QR
Operation
90 kHz
Normal QR
Operation
(eq. 3)
(eq. 4)
(eq. 5)
Output Power
Figure 30. Extended Quasi−Resonant Operation
is the primary side inductance of the
transformer,
is the number of turns for the output
winding,
is the number of turns for the VCC
winding,
is the diode forward−voltage drop of
the output winding,
is the diode forward−voltage drop of
the VCC winding; and
is the sum of the output capacitance
of the MOSFET and the external
capacitor, Cr.
In general, the QRC has a limitation in a wide load range
application, since the switching frequency increases as the
output load decreases, resulting in a severe switching loss in
the light load condition. To overcome this limitation, the
FSCQ series employs an extended quasi−resonant switching
operation. Figure 30 shows the mode change between
normal and extended quasi−resonant operations. In the
normal quasi−resonant operation, the FSCQ series enters
into the extended quasi−resonant operation when the
switching frequency exceeds 90 kHz as the load reduces. To
reduce the switching frequency, the MOSFET is turned on
when the drain voltage reaches the second minimum level,
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13
FSCQ Series
as shown in Figure 31. Once the FSCQ series enters into the
extended quasi−resonant operation, the first sync signal is
ignored. After the first sync signal is applied, the sync
threshold levels are changed from 4.6 V and 2.6 V to 3 V and
1.8 V, respectively, and the MOSFET turn−on time is
synchronized to the second sync signal. The FSCQ series
returns to its normal quasi−resonant operation when the
switching frequency reaches 45 kHz as the load increases.
Leading Edge Blanking (LEB)
At the instant the internal SENSEFET is turned on, there
is usually a high current spike through the SENSEFET,
caused by the external resonant capacitor across the
MOSFET and secondary−side rectifier reverse recovery.
Excessive voltage across the Rsense resistor can lead to
incorrect feedback operation in the current mode PWM
control. To counter this effect, the FSCQ series employs a
leading edge blanking (LEB) circuit. This circuit inhibits the
PWM comparator for a short time (tLEB) after the Sense FET
is turned on.
Vds
2VRO
VCC
Vref
Idelay
Vfb
VO
Vsyn
c
4
H11A817A
D1
CB
D2
+
Vfb *
4.6 V
3V
2.6 V
KA431
OSC
2.5R
Gate
Driver
R
−
1.8 V
VSD
MOSFET Gate
ON
IFB
OLP
Rsense
Figure 32. Pulse Width Modulation (PWM) Circuit
ON
Protection Circuits
Figure 31. Extended QR Operation Waveforms
The FSCQ series has several self−protective functions
such as overload protection (OLP), abnormal over−current
protection (AOCP), overvoltage protection (OVP), and
thermal shutdown (TSD). OLP and OVP are auto−restart
mode protections, while TSD and AOCP are latch mode
protections. Because these protection circuits are fully
integrated into the IC without external components, the
reliability can be improved without increasing cost.
− Auto− Restart Mode Protection: Once the fault condition
is detected, switching is terminated and the SENSEFET
remains off. This causes VCC to fall. When VCC falls to
the under voltage lockout (UVLO) stop voltage of 9 V, the
protection is reset and the FSCQ series consumes only
startup current (25 mA). Then, the VCC capacitor is
charged up, since the current supplied through the startup
resistor is larger than the current that the FPS consumes.
When VCC reaches the start voltage of 15 V, the FSCQ
series resumes its normal operation. If the fault condition
is not removed, the SENSEFET remains off and VCC
drops to stop voltage again. In this manner, the
auto−restart can alternately enable and disable the
switching of the power SENSEFET until the fault
condition is eliminated (see Figure 33).
− Latch Mode Protection: Once this protection is triggered,
switching is terminated and the SENSEFET remains off
until the AC power line is unplugged. Then, VCC
continues charging and discharging between 9 V and
15 V. The latch is reset only when VCC is discharged to
6 V by unplugging the AC power line.
Feedback Control
The FSCQ series employs current mode control, as shown
in Figure 32. An optocoupler (such as onsemi’s H11A817A)
and shunt regulator (such as onsemi’s KA431) are typically
used to implement the feedback network. Comparing the
feedback voltage with the voltage across the Rsense resistor,
plus an offset voltage, makes it possible to control the
switching duty cycle. When the reference pin voltage of the
shunt regulator exceeds the internal reference voltage of 2.5
V, the opto−coupler LED current increases, pulling down the
feedback voltage and reducing the duty cycle. This typically
occurs when input voltage is increased or output load is
decreased.
Pulse−by−Pulse Current Limit
Because current mode control is employed, the peak
current through the SENSEFET is limited by the inverting
input of the PWM comparator (Vfb*) as shown in Figure 32.
The feedback current (IFB) and internal resistors are
designed so that the maximum cathode voltage of diode D2
is about 2.8 V, which occurs when all IFB flows through the
internal resistors. Since D1 is blocked when the feedback
voltage (Vfb) exceeds 2.8 V, the maximum voltage of the
cathode of D2 is clamped at this voltage, thus clamping Vfb*.
Therefore, the peak value of the current through the
SENSEFET is limited.
www.onsemi.com
14
FSCQ Series
Fault
occurs
Power
on
Vds
Abnormal Over Current Protection (AOCP)
When the secondary rectifier diodes or the transformer
pins are shorted, a steep current with extremely high di/dt
can flow through the SENSEFET during the LEB time.
Even though the FSCQ series has OLP (Overload
Protection), it is not enough to protect the FSCQ series in
that abnormal case, since severe current stress will be
imposed on the SENSEFET until the OLP triggers. The
FSCQ series has an internal AOCP (Abnormal
Over−Current Protection) circuit as shown in Figure 35.
When the gate turn−on signal is applied to the power
SENSEFET, the AOCP block is enabled and monitors the
current through the sensing resistor. The voltage across the
resistor is then compared with a preset AOCP level. If the
sensing resistor voltage is greater than the AOCP level, the
set signal is applied to the latch, resulting in the shutdown of
SMPS. This protection is implemented in the latch mode.
Fault
removed
Vcc
15 V
9V
ICC
IOP
ISTART
Normal Fault
operation situation
t
Normal
operation
Figure 33. Auto Restart Mode Protection
Overload Protection (OLP)
Overload is defined as the load current exceeding its
normal level due to an unexpected abnormal event. In this
situation, the protection circuit should trigger to protect the
SMPS. However, even when the SMPS is in the normal
operation, the over load protection circuit can be triggered
during the load transition. To avoid this undesired operation,
the overload protection circuit is designed to trigger after a
specified time to determine whether it is a transient situation
or an overload situation. Because of the pulse−by−pulse
current limit capability, the maximum peak current through
the SENSEFET is limited, and therefore the maximum input
power is restricted with a given input voltage. If the output
consumes more than this maximum power, the output
voltage (Vo) decreases below the set voltage. This reduces
the current through the opto−coupler LED, which also
reduces the opto−coupler transistor current, thus increasing
the feedback voltage (Vfb). If Vfb exceeds 2.8 V, D1 is
blocked, and the 5 mA current source starts to charge CB
slowly up to VCC. In this condition, Vfb continues
increasing until it reaches 7.5 V, then the switching operation
is terminated as shown in Figure 34. The delay for shutdown
is the time required to charge CB from 2.8 V to 7.5 V with
5 mA. In general, a 20~50 ms delay is typical for most
applications. OLP is implemented in auto restart mode.
PWM
R
Q
R
Q
Gate
Driver
LEB
2
AOCP
GND
VAOCP
−
Figure 35. AOCP Block
Over−Voltage Protection (OVP)
If the secondary side feedback circuit malfunctions or a
solder defect causes an open in the feedback path, the current
through the opto−coupler transistor becomes almost zero.
Then, Vfb climbs up in a similar manner to the over load
situation, forcing the preset maximum current to be supplied
to the SMPS until the over load protection triggers. Because
more energy than required is provided to the output, the
output voltage may exceed the rated voltage before the
overload protection triggers, resulting in the breakdown of
the devices in the secondary side. In order to prevent this
situation, an over voltage protection (OVP) circuit is
employed. In general, the peak voltage of the sync signal is
proportional to the output voltage and the FSCQ series uses
a sync signal instead of directly monitoring the output
voltage. If the sync signal exceeds 12 V, an OVP is triggered
resulting in a shutdown of SMPS. In order to avoid
undesired triggering of OVP during normal operation, the
peak voltage of the sync signal should be designed to be
below 12 V. This protection is implemented in the auto
restart mode.
2.8 V
t12 = CB*(7.5 − 2.8)/Idelay
t
S
R
Overload Protection
t1
OSC
+
VFB
7.5 V
2.5R
t
Figure 34. Overload Protection
www.onsemi.com
15
FSCQ Series
Figure 38 shows the burst mode operation waveforms.
When the picture ON signal is disabled, Q1 is turned off and
R3 and Dz are connected to the reference pin of KA431
through D1. Before Vo2 drops to Vo2stby, the voltage on the
reference pin of KA431 is higher than 2.5 V, which increases
the current through the opto LED. This pulls down the
feedback voltage (VFB) of FSCQ series and forces FSCQ
series to stop switching. If the switching is disabled longer
than 1.4 ms, FSCQ series enters into burst operation and the
operating current is reduced from IOP to 0.25 mA (IOB).
Since there is no switching, Vo2 decreases until it reaches
Vo2stby. As Vo2 reaches Vo2stby, the current through the opto
LED decreases allowing the feedback voltage to rise. When
the feedback voltage reaches 0.4 V, FSCQ series resumes
switching with a predetermined peak drain current of 0.9 A.
After burst switching for 1.4 ms, FSCQ series stops
switching and checks the feedback voltage. If the feedback
voltage is below 0.4 V, FSCQ series stops switching until the
feedback voltage increases to 0.4 V. If the feedback voltage
is above 0.4 V, FSCQ series goes back to the normal
operation. The output voltage drop circuit can be
implemented alternatively, as shown in Figure 37. In the
circuit, the FSCQ series goes into burst mode, when picture
off signal is applied to Q1. Then, Vo2 is determined by the
Zener diode breakdown voltage. Assuming that the forward
voltage drop of opto LED is 1 V, the approximate value of
Vo2 in standby mode is given by:
Thermal Shutdown (TSD)
The SENSEFET and the control IC are built in one
package. This makes it easy for the control IC to detect
abnormal over temperature of the SENSEFET. When the
temperature exceeds approximately 150°C, the thermal
shutdown triggers. This protection is implemented in the
latch mode.
Soft Start
The FSCQ series has an internal soft−start circuit that
increases PWM comparator’s inverting input voltage
together with the SENSEFET current slowly after it starts
up. The typical soft start time is 20 ms. The pulse width to
the power switching device is progressively increased to
establish the correct working conditions for transformers,
inductors, and capacitors. Increasing the pulse width to the
power switching device also helps prevent transformer
saturation and reduces the stress on the secondary diode
during startup. For a fast build up of the output voltage, an
offset is introduced in the soft−start reference current.
Burst Operation
To minimize the power consumption in the standby mode,
the FSCQ series employs burst operation. Once FSCQ series
enters burst mode, FSCQ series allows all output voltages
and effective switching frequency to be reduced. Figure 36
shows the typical feedback circuit for C−TV applications. In
normal operation, the picture on signal is applied and the
transistor Q1 is turned on, which decouples R3, DZ and D1
from the feedback network. Therefore, only VO1 is
regulated by the feedback circuit in normal operation and
determined by R1 and R2 as:
V O1
NORM
+ 2.5 @
ǒ
R1 ) R2
R2
Ǔ
V O2
STBY
+ V Z ) 0.7 ) 2.5
Linear
Regulator
(eq. 6)
RD
CF
C
KA431
A
(eq. 7)
RD
RF
R1
R
R2
Linear
Regulator
R1
CF
Micom
Q1
Picture OFF
Dz
Rbias
A
Micom
Dz
VO1 (B+)
KA431
(eq. 8)
VO1 (B+)
Rbias
VO2
C
+ VZ ) 1
VO2
In standby mode, the picture ON signal is disabled and the
transistor Q1 is turned off, which couples R3, DZ, and D1 to
the reference pin of KA431. Then, VO2 is determined by the
Zener diode breakdown voltage. Assuming that the forward
voltage drop of D1 is 0.7 V, VO2 in standby mode is
approximately given by:
V O2
STBY
RF
D1
R3
Figure 37. Feedback Circuit to Drop Output
Voltage in Standby Mode
Q1
Picture ON
R
R2
Figure 36. Typical Feedback Circuit to Drop
Output Voltage in Standby Mode
www.onsemi.com
16
FSCQ Series
(a)
(b)
(c)
norm
Vo2
Vo2 stby
VFB
0.4 V
Iop
IOP
IOB
Vds
Picture
On
Picture
On
Picture Off
Burst Mode
0.4 V
0.3 V
VFB
0.4 V
0.4 V
Vds
1.4 ms
Ids
1.4 ms
0.9 A
0.9 A
(a) Mode Change to Burst Operation
(b) Burst Operation
(c) Mode Change to Normal Operation
Figure 38. Burst Operation Waveforms
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17
FSCQ Series
FSCQ0765RT Typical Application Circuit
FSCQ0765RT TYPICAL APPLICATION CIRCUIT
Application
Output Power
Input Voltage
Output Voltage (Max. Current)
C−TV
83 W
Universal Input
(90−270 Vac)
12 V (1 A)
18 V (0.5 A)
125 V (0.4 A)
24 V (0.5 A)
• Enhanced System Reliability Through Various
Features
• High Efficiency (>83% at 90 Vac Input)
• Wider Load Range through the Extended
•
•
•
Quasi−Resonant Operation
Low Standby Mode Power Consumption (83% at 90 Vac Input)
• Wider Load Range through the Extended
•
•
•
Quasi−Resonant Operation
Low Standby Mode Power Consumption (