www.fairchildsemi.com
FSDH0265RN, FSDM0265RN
Green Mode Fairchild Power Switch (FPSTM)
Features
• Internal Avalanche Rugged Sense FET
• Consumes only 0.65W at 240VAC & 0.3W load with
Advanced Burst-Mode Operation
• Frequency Modulation for low EMI
• Precision Fixed Operating Frequency
• Internal Start-up Circuit
• Pulse by Pulse Current Limiting
• Abnormal Over Current Protection
• Over Voltage Protection
• Over Load Protection
• Internal Thermal Shutdown Function
• Auto-Restart Mode
• Under Voltage Lockout
• Low Operating Current (3mA)
• Adjustable Peak Current Limit
• Built-in Soft Start
Applications
• SMPS for VCR, SVR, STB, DVD & DVCD
• SMPS for Printer, Facsimile & Scanner
• Adaptor for Camcorder
Description
The FSDx0265RN(x stands for M, H) are integrated Pulse
Width Modulators (PWM) and Sense FETs specifically
designed for high performance offline Switch Mode Power
Supplies (SMPS) with minimal external components. Both
devices are integrated high voltage power switching regulators which combine an avalanche rugged Sense FET with a
current mode PWM control block. The integrated PWM controller features include: a fixed oscillator with frequency
modulation for reduced EMI, Under Voltage Lock Out
(UVLO) protection, Leading Edge Blanking (LEB), optimized gate turn-on/turn-off driver, Thermal Shut Down
(TSD) protection, Abnormal Over Current Protection
(AOCP) and temperature compensated precision current
sources for loop compensation and fault protection circuitry.
When compared to a discrete MOSFET and controller or
RCC switching converter solution, the FSDx0265RN reduce
total component count, design size, weight and at the same
time increase efficiency, productivity, and system reliability.
Both devices are a basic platform well suited for cost effective designs of flyback converters.
OUTPUT POWER TABLE
230VAC ±15%(3)
85-265VAC
PRODUCT
Adapter(1)
Open
Frame(2)
Adapter(1)
Open
Frame(2)
FSDL321
11W
17W
8W
12W
FSDH321
11W
17W
8W
12W
FSDL0165RN
13W
23W
11W
17W
FSDM0265RN
16W
27W
13W
20W
FSDH0265RN
16W
27W
13W
20W
FSDL0365RN
19W
30W
16W
24W
FSDM0365RN
19W
30W
16W
24W
FSDL321L
11W
17W
8W
12W
FSDH321L
11W
17W
8W
12W
FSDL0165RL
13W
23W
11W
17W
FSDM0265RL
16W
27W
13W
20W
FSDH0265RL
16W
27W
13W
20W
FSDL0365RL
19W
30W
16W
24W
FSDM0365RL
19W
30W
16W
24W
Table 1. Notes: 1. Typical continuous power in a non-ventilated enclosed adapter with sufficient drain pattern or
something as a heat sinker measured at 50°C ambient. 2.
Maximum practical continuous power in an open frame
design with sufficient drain pattern or something as a
heat sinker at 50°C ambient. 3. 230 VAC or 100/115 VAC
with doubler.
Typical Circuit
AC
IN
DC
OUT
Vstr
Ipk
Drain
PWM
Vfb
Vcc
Source
Figure 1. Typical Flyback Application
Rev.1.0.6
©2005 Fairchild Semiconductor Corporation
FSDH0265RN, FSDM0265RN
Internal Block Diagram
Vcc
I start
+
V BURL /V BURH
-
Soft start
8V/12V
Vcc good
Vcc
V BURH
I B_PEAK
Vcc
Drain
6,7,8
Vstr
5
2
Internal
Bias
Vref
Freq.
Modulation
Vcc
OSC
I delay
V FB
IFB
Normal
3
2.5R
I pk
PWM
Burst
S
Q
R
Q
Gate
driver
R
4
LEB
V SD
Vcc
1 GND
S
Q
R
Q
Vovp
TSD
Vcc good
AOCP
Vocp
Figure 2. Functional Block Diagram of FSDx0265RN
2
FSDH0265RN, FSDM0265RN
Pin Definitions
Pin Number
Pin Name
1
GND
Sense FET source terminal on primary side and internal control ground.
Vcc
Positive supply voltage input. Although connected to an auxiliary transformer winding, current is supplied from pin 5 (Vstr) via an internal switch during
startup (see Internal Block Diagram section). It is not until Vcc reaches the
UVLO upper threshold (12V) that the internal start-up switch opens and device power is supplied via the auxiliary transformer winding.
Vfb
The feedback voltage pin is the non-inverting input to the PWM comparator.
It has a 0.9mA current source connected internally while a capacitor and optocoupler are typically connected externally. A feedback voltage of 6V triggers over load protection (OLP). There is a time delay while charging
between 3V and 6V using an internal 5uA current source, which prevents
false triggering under transient conditions but still allows the protection
mechanism to operate under true overload conditions.
Ipk
Pin to adjust the current limit of the Sense FET. The feedback 0.9mA current
source is diverted to the parallel combination of an internal 2.8kΩ resistor
and any external resistor to GND on this pin to determine the current limit.
If this pin is tied to Vcc or left floating, the typical current limit will be 1.5A.
Vstr
This pin connects directly to the rectified AC line voltage source. At start up
the internal switch supplies internal bias and charges an external storage
capacitor placed between the Vcc pin and ground. Once the Vcc reaches
12V, the internal switch is disabled.
Drain
The Drain pin is designed to connect directly to the primary lead of the transformer and is capable of switching a maximum of 650V. Minimizing the
length of the trace connecting this pin to the transformer will decrease leakage inductance.
2
3
4
5
6, 7, 8
Pin Function Description
Pin Configuration
8DIP
8LSOP
GND 1
8 Drain
Vcc 2
7 Drain
Vfb 3
6 Drain
Ipk 4
5 Vstr
Figure 3. Pin Configuration (Top View)
3
FSDH0265RN, FSDM0265RN
Absolute Maximum Ratings
(Ta=25°C, unless otherwise specified)
Characteristic
Maximum Drain Pin Voltage
Maximum Vstr Pin Voltage
Drain Current Pulsed
Symbol
Value
Unit
VDRAIN,MAX
650V
V
VSTR,MAX
650V
V
IDM
8.0
ADC
(1)
Single Pulsed Avalanche Energy
(2)
EAS
68
mJ
VCC,MAX
20
V
Analog Input Voltage Range
VFB
-0.3 to VCC
V
Total Power Dissipation
PD
1.56
W
Operating Junction Temperature.
TJ
Internally limited
°C
TA
-25 to +85
°C
TSTG
-55 to +150
°C
Maximum Supply Voltage
Operating Ambient Temperature.
Storage Temperature Range.
Note:
1. Repetitive rating: Pulse width limited by maximum junction temperature
2. L = 51mH, starting Tj = 25°C
3. L = 13µH, starting Tj = 25°C
4. Vsd is shutdown feedback voltage ( see Protection Section in Electrical Characteristics )
Thermal Impedance
Parameter
Symbol
Value
Unit
θJA(1)
θJC(2)
ψJT(4)
79.64(3)
°C/W
18.20
°C/W
34.30
°C/W
8DIP
Junction-to-Ambient Thermal
Junction-to-Case Thermal
Junnction-to-Top Thermal
Note:
1. Free standing with no heatsink.
2. Measured on the DRAIN pin close to plastic interface.
3. Without copper clad.
4. Measured on the PKG top surface.
* - all items are tested with the standard JESD 51-10(DIP)
4
FSDH0265RN, FSDM0265RN
Electrical Characteristics
(Ta = 25°C unless otherwise specified)
Parameter
Symbol
Condition
Min.
Typ.
Max.
Unit
VDS=660V, VGS=0V
-
-
50
µA
VDS=0.8Max.Rating,
VGS=0V, TC=125°C
-
-
200
µA
VGS=10V, ID=0.5A
-
5.0
6.0
Ω
-
550
-
pF
-
38
-
pF
Sense FET SECTION
Off-State Current
(Max.Rating =660V)
IDSS
On-State Resistance(1)
RDS(ON)
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
-
17
-
pF
TD(ON)
-
20
-
ns
-
15
-
ns
-
55
-
ns
-
25
-
ns
92
100
108
KHz
±2.0
±.3.0
±4.0
KHz
61
67
73
KHz
±1.5
±2.0
±2.5
KHz
-
±5
±10
%
FSDH0265R
71
77
83
%
FSDM0265R
62
67
72
%
0
0
0
%
Turn On Delay Time
Rise Time
Turn Off Delay Time
Fall Time
TR
TD(OFF)
TF
VGS=0V, VDS=25V,
F=1MHz
VDS=325V, ID=1.0A
(Sense FET switching
time is essentially
independent of
operating temperature)
CONTROL SECTION
Output Frequency
FOSC
Output Frequency Modulation
FMOD
Output Frequency
FOSC
Output Frequency Modulation
FMOD
Frequency Change With Temperature(2)
-
Maximum Duty Cycle
DMAX
Minimum Duty Cycle
DMIN
FSDH0265R
FSDM0265R
-25°C ≤ Ta ≤ 85°C
Start threshold voltage
VSTART
VFB=GND
11
12
13
V
Stop threshold voltage
VSTOP
VFB=GND
7
8
9
V
IFB
VFB=GND
0.7
0.9
1.1
mA
VFB=4V
10
15
20
ms
VBURH
-
0.4
0.5
0.6
V
VBURL
-
0.25
0.35
0.45
V
Drain to Source Peak Current Limit
IOVER
Max. inductor current
1.3
1.5
1.7
A
Current Limit Delay(3)
TCLD
-
500
-
ns
Feedback Source Current
Internal Soft Start Time
TS/S
BURST MODE SECTION
Burst Mode Voltages
PROTECTION SECTION
5
FSDH0265RN, FSDM0265RN
125
140
-
°C
VSD
5.5
6.0
6.5
V
VOVP
18
19
-
V
3.5
5.0
6.5
µA
200
-
-
ns
Thermal Shutdown
TSD
Shutdown Feedback Voltage
Over Voltage Protection
Shutdown Feedback Delay Current
Leading Edge Blanking Time
IDELAY
-
VFB=4V
TLEB
TOTAL DEVICE SECTION
Operating Current
Start Up Current
Vstr Supply Voltage
IOP
VCC=14V
1
3
5
mA
ISTART
VCC=0V
0.7
0.85
1.0
mA
VSTR
VCC=0V
35
-
-
V
Note:
1. Pulse test: Pulse width ≤ 300uS, duty ≤ 2%
2. These parameters, although guaranteed, are tested in EDS (wafer test) process
3. These parameters, although guaranteed, are not 100% tested in production
6
FSDH0265RN, FSDM0265RN
Comparison Between KA5x0265RN and FSDx0265RN
Function
KA5x0265RN
FSDx0265RN
FSDx0265RN Advantages
Soft-Start
not applicable
15mS
• Gradually increasing current limit
during soft-start further reduces peak
current and voltage component
stresses
• Eliminates external components used
for soft-start in most applications
• Reduces or eliminates output
overshoot
External Current Limit
not applicable
Programmable of
default current limit
• Smaller transformer
• Allows power limiting (constant overload power)
• Allows use of larger device for lower
losses and higher efficiency.
Frequency Modulation
not applicable
±2.0KHz @67KHz
±3.0KHz @100KHz
• Reduced conducted EMI
Burst Mode Operation
not applicable
Yes-built into
controller
• Improve light load efficiency
• Reduces no-load consumption
• Transformer audible noise reduction
Drain Creepage at
Package
1,02mm
7.62mm
• Greater immunity to arcing as a result
of build-up of dust, debris and other
contaminants
7
FSDH0265RN, FSDM0265RN
Typical Performance Characteristics (Control Part)
1.20
1.20
1.00
1.00
Normalized
Normalized
(These characteristic graphs are normalized at Ta = 25°C)
0.80
0.60
0.40
0.80
0.60
0.40
0.20
0.20
0.00
0.00
-50
0
50
100
-50
150
0
1.20
1.20
1.00
1.00
0.80
0.80
Normalized
Normalized
150
Frequency Modulation (FMOD)
Operating Frequency (Fosc)
0.60
0.40
0.20
0.60
0.40
0.20
0.00
0.00
-50
0
50
100
150
-50
0
T emp[℃]
50
100
150
T emp[ ℃]
Operating supply current (Iop)
Maximum duty cycle (Dmax)
1.20
1.20
1.00
1.00
0.80
0.80
Normalized
Nomalized
100
T emp[℃]
T emp[℃]
0.60
0.40
0.20
0.60
0.40
0.20
0.00
0.00
-50
0
50
100
T emp[℃]
Start Threshold Voltage (Vstart)
8
50
150
-50
0
50
100
T emp[℃]
Stop Threshold Voltage (Vstop)
150
FSDH0265RN, FSDM0265RN
1.20
1.20
1.00
1.00
Normalized
Normalized
Typical Performance Characteristics (Continued)
0.80
0.60
0.40
0.80
0.60
0.40
0.20
0.20
0.00
0.00
-50
0
50
100
-50
150
0
Feedback Source Current (Ifb)
150
Peak current limit (Iover)
1.20
1.20
1.00
1.00
0.80
Normalized
Normalized
100
T emp[℃]
T emp[℃]
0.60
0.40
0.20
0.80
0.60
0.40
0.20
0.00
0.00
-50
0
50
100
150
-50
0
T emp[℃]
50
100
150
T emp[℃]
J-FET Start up current (Istr)
Start up Current (Istart)
1.20
1.20
1.00
1.00
Normalized
Normalized
50
0.80
0.60
0.40
0.80
0.60
0.40
0.20
0.20
0.00
0.00
-50
0
50
100
T emp[ ℃]
Burst peak current (Iburst)
150
-50
0
50
100
150
T emp[℃]
Over Voltage Protection (Vovp)
9
FSDH0265RN, FSDM0265RN
Functional Description
1. Startup : In previous generations of Fairchild Power
Switches (FPSTM) the Vstr pin had an external resistor to the
DC input voltage line. In this generation the startup resistor
is replaced by an internal high voltage current source and a
switch that shuts off when 15mS goes by after the supply
voltage, Vcc, gets above 12V. The source turns back on if
Vcc drops below 8V.
Vcc
Vfb
Vo
Istr
0.9mA
FB
3
OSC
D1
Cfb
D2
2.5R
Vfb*
Gate
driver
R
431
VSD
Vin,dc
Vref
5uA
OLP
Figure 5. Pulse width modulation (PWM) circuit
Vstr
Vcc
UVLO 12V)
off
Figure 4. High voltage current source
2. Feedback Control : The FSDx0265RN employs current
mode control, shown in figure 5. An opto-coupler (such as
the H11A817A) and shunt regulator (such as the KA431) are
typically used to implement the feedback network. Comparing the feedback voltage with the voltage across the Rsense
resistor plus an offset voltage makes it possible to control the
switching duty cycle. When the reference pin voltage of the
KA431 exceeds the internal reference voltage of 2.5V, the
H11A817A LED current increases, thus pulling down the
feedback voltage and reducing the duty cycle. This event
typically happens when the input voltage is increased or the
output load is decreased.
3. Leading edge blanking (LEB) : At the instant the internal Sense FET is turned on, there usually exists a high current spike through the Sense FET, caused by the primary side
capacitance and secondary side rectifier diode reverse recovery. Excessive voltage across the Rsense resistor would lead
to incorrect feedback operation in the current mode PWM
control. To counter this effect, the FPSTM employs a leading
edge blanking (LEB) circuit. This circuit inhibits the PWM
comparator for a short time (TLEB) after the Sense FET is
turned on.
10
4. Protection Circuit : The FPSTM has several protective
functions such as over load protection (OLP), over voltage
protection (OVP), abnormal over current protection
(AOCP), under voltage lock out (UVLO) and thermal shutdown (TSD). Because these protection circuits are fully integrated inside the IC without external components, the
reliability is improved without increasing cost. Once the
fault condition occurs, switching is terminated and the Sense
FET remains off. This causes Vcc to fall. When Vcc reaches
the UVLO stop voltage, 8V, the protection is reset and the
internal high voltage current source charges the Vcc capacitor via the Vstr pin. When Vcc reaches the UVLO start voltage,12V, the FPSTM resumes its normal operation. In this
manner, the auto-restart can alternately enable and disable
the switching of the power Sense FET until the fault condition is eliminated.
4.1 Over Load Protection (OLP) : Overload is defined as
the load current exceeding a pre-set level due to an unexpected event. In this situation, the protection circuit should
be activated in order to protect the SMPS. However, even
when the SMPS is in the normal operation, the over load
protection circuit can be activated during the load transition.
In order to avoid this undesired operation, the over load protection circuit is designed to be activated after a specified
time to determine whether it is a transient situation or an
overload situation. In conjunction with the Ipk current limit
pin (if used) the current mode feedback path would limit the
current in the Sense FET when the maximum PWM duty
cycle is attained. If the output consumes more than this maximum power, the output voltage (Vo) decreases below the set
voltage. This reduces the current through the opto-coupler
LED, which also reduces the opto-coupler transistor current,
thus increasing the feedback voltage (Vfb). If Vfb exceeds
3V, the feedback input diode is blocked and the 5uA Idelay
current source starts to charge Cfb slowly up to Vcc. In this
condition, Vfb continues increasing until it reaches 6V, when
the switching operation is terminated as shown in figure 6.
The delay time for shutdown is the time required to charge
FSDH0265RN, FSDM0265RN
Cfb from 3V to 6V with 5uA.
tection) circuit as shown in figure 7. When the gate turn-on
signal is applied to the power Sense FET, the AOCP block is
enabled and monitors the current through the sensing resistor. The voltage across the resistor is then compared with a
preset AOCP level. If the sensing resistor voltage is greater
than the AOCP level, pulse by pulse AOCP is triggered
regardless of uncontrollable LEB time. Here, pulse by pulse
AOCP stops Sense FET within 350nS after it is activated.
Vcc
8V
OLP
6V
FPS switching
Following Vcc
3V
Delay current (5uA) charges the Cfb
t1
t2
t1 = −
1
RC
t 2 = C fb
In (1 −
fb
t3
t4
V ( t1)
); V ( t1) = 3V , R = 2 . 8 K Ω , C fb = C
R
t
fb _ fig . 2
(V (t1 + t 2) − V (t1))
; I delay = 5uA,V (t1 + t 2) − V (t1) = 3V
I delay
Figure 6. Over load protection
4.2 Thermal Shutdown (TSD) : The Sense FET and the
control IC are integrated, making it easier for the control IC
to detect the temperature of the Sense FET. When the temperature exceeds approximately 140°C, thermal shutdown is
activated.
4.3 Abnormal Over Current Protection (AOCP) :
PWM
COMPARATOR
Vfb
LEB
CLK
Drain
Out Driver
Vsense
AOCP
COMPARATOR
S
Q
R
4.4 Over Voltage Protection (OVP) : In case of malfunction in the secondary side feedback circuit, or feedback loop
open caused by a defect of solder, the current through the
opto-coupler transistor becomes almost zero. Then, Vfb
climbs up in a similar manner to the over load situation, forcing the preset maximum current to be supplied to the SMPS
until the over load protection is activated. Because excess
energy is provided to the output, the output voltage may
exceed the rated voltage before the over load protection is
activated, resulting in the breakdown of the devices in the
secondary side. In order to prevent this situation, an over
voltage protection (OVP) circuit is employed. In general,
Vcc is proportional to the output voltage and the FPSTM uses
Vcc instead of directly monitoring the output voltage. If
VCC exceeds 19V, OVP circuit is activated resulting in termination of the switching operation. In order to avoid undesired activation of OVP during normal operation, Vcc should
be properly designed to be below 19V.
5. Soft Start : The FPSTM has an internal soft start circuit
that increases the feedback voltage together with the Sense
FET current slowly after it starts up. The typical soft start
time is 15msec, as shown in figure 8, where progressive
increments of Sense FET current are allowed during the
start-up phase. The pulse width to the power switching
device is progressively increased to establish the correct
working conditions for transformers, inductors, and capacitors. The voltage on the output capacitors is progressively
increased with the intention of smoothly establishing the
required output voltage. It also helps to prevent transformer
saturation and reduce the stress on the secondary diode.
Rsense
VAOCP
Drain current
[A]
Figure 7. AOCP Function & Block
2.15A
1mS
Even though the FPSTM has OLP (Over Load Protection)
and current mode PWM feedback, these are not enough to
protect the FPSTM when a secondary side diode short or a
transformer pin short occurs. In addition to start-up, softstart is also activated at each restart attempt during autorestart and when restarting after latch mode is activated. The
FPSTM has an internal AOCP (Abnormal Over Current Pro-
15steps
Current limit
0.98A
t
11
FSDH0265RN, FSDM0265RN
D R A IN
5V
S W IT C H
O FF
GND
V BURH
V BURL
I_ o v e r
Rsense
Figure 8. Soft Start Function
Figure 10. Circuit for Burst Operation
6. Burst operation :In order to minimize power dissipation
in standby mode, the FPSTM enters burst mode operation.
VBURL/
VBURH
VBURH
7. Frequency Modulation : EMI reduction can be accomplished by modulating the switching frequency of a switched
power supply. Frequency modulation can reduce EMI by
spreading the energy over a wider frequency range than the
band width measured by the EMI test equipment. The
amount of EMI reduction is directly related to the depth of
the reference frequency. As can be seen in Figure 11, the frequency changes from 65KHz to 69KHz in 4mS for the
FSDM0265RN. Frequency modulation allows the use of a
cost effective inductor instead of an AC input mode choke to
satisfy the requirements of world wide EMI limits.
Inte rnal
O scillator
Figure 9. Circuit for Burst operation
69kH z
As the load decreases, the feedback voltage decreases. As shown in
figure 10, the device automatically enters burst mode when the
feedback voltage drops below VBURH(500mV). Switching still continues but the current limit is set to a fixed limit internally to minimize flux density in the transformer. The fixed current limit is
larger than that defined by Vfb = VBURH and therefore, Vfb is
driven down further. Switching continues until the feedback
voltage drops below VBURL(350mV). At this point switching
stops and the output voltages start to drop at a rate dependent
on the standby current load. This causes the feedback voltage to rise. Once it passes VBURH(500mV) switching resumes.
The feedback voltage then falls and the process repeats. Burst
mode operation alternately enables and disables switching of
the power Sense FET thereby reducing switching loss in
Standby mode.
12
D rain to
S ource
voltage
D rain to
S ource
curren t
V ds
W aveform
4kH z
65kH z
67kH z
69kH z
T urn-on
T u rn-off
po int
Figure 11. Frequency Modulation Waveform
FSDH0265RN, FSDM0265RN
5uA
Amplitude (dBµV)
900uA
Feed
Back
CISPR2QB
3
CISPR2AB
2 KΩ
4
Current
Limit
AKΩ
PWM
comparator
0 .8 K Ω
Rsense
SenseFET
Sense
Figure 14. Peak current adjustment
Frequency (MHz)
Figure 12. KA5-series FPSTM Full Range EMI scan(67KHz,
no Frequency Modulation) with DVD Player SET
For example, FSDx0265RN has a typical Sense FET current
limit (IOVER) of 1.5A. The Sense FET current can be limited
to 1A by inserting a 5.54kΩ between the current limit pin
and ground which is derived from the following equations:
1.5: 1 = 2.8KΩ : XkΩ ,
Amplitude (dBµV)
CISPR2QB
CISPR2AB
X = 1.86kΩ,
Since X represents the resistance of the parallel network, A
can be calculated using the following equation:
A = X / (1 - (X/2.8kΩ))
Frequency (MHz)
Figure 13. FSDX-series FPSTM Full Range EMI Scan
(67KHz, with Frequency Modulation) with DVD Player SET
8. Adjusting Current limit function: As shown in fig 14, a
combined 2.8kΩ internal resistance is connected into the
non-inverting lead on the PWM comparator. A external
resistance of A on the current limit pin forms a parallel resistance with the 2.8kΩ when the internal diodes are biased by
the main current source of 900uA.
13
FSDH0265RN, FSDM0265RN
Typical application circuit
1. Set Top Box Example Circuit (17W Output Power)
12
2A/250V
C7
400V
/47u
FUSE
85VAC
~275VAC
100pF
/400V
C1
LF1
40mH
R1
47K
R3
56K/1/
4W
100pF
/400V
C2
D5
UF4007
KBP06M
GreenFPS
PERFORMANCE SUMMARY
Output Power:
17W
Regulation
3.3V:
±5%
5.0V:
±5%
17.0V:
±7%
23.0:
±7%
Efficiency:
≥75%
No load Consumption:
0.12W at 230Vac
D
D
1
C8
6.8n/1k
V
+23.0V
D12
EGP20D
R15
20R
11
D14
10
5
D start
EGP20D
FSDM0265RN
S
1
Vcc Vfb I_pk
R4
30R
R5
6kR
D6
UF4004
ZD1
19V
C6
50V
47uF
C9
33n
50V
4
5
6
SB360
D15
100uF
/50V
C15
470uF
/35V
C16
220uF
/35V
0.005~0.25A
8
R21
330R
Q1 FOD2741A
PC817
C13
1000uF
/16V
C14
470uF
/10V
+5.0V
0.2~0.7A
R20
L1
+3.3V
0.4~1.0A
C12
470uF
/10V
R14
R22
1KR 800R
R19
R13
2.7K
0.1uF/mon
olithic
C209
R15 6.9K
TL431AZ
0.01~0.3A
L2
C11
1000uF
/16V
PC817
ZD2
19V
100uF
/50V
L3
+17.0V
D13
EGP20D
3
C17
R12
1.5K
Figure15. 17W multiple power supply using FSDM0265RN
Multiple Output, 17W, 85-265VAC Input Power supply:
Figure 15 shows a multiple output supply typical for high
end set-top boxes containing high capacity hard disks for
recording. The supply delivers an output power of 17W
cont./20 W peak (thermally limited) from an input voltage of
85 to 265 VAC. Efficiency at 12W, 85VAC is ≥75%.
The 3.3 V and 5 V outputs are regulated to ±5% without the
need for secondary linear regulators. DC stacking (the secondary winding reference for the other output voltages is
connected to the anode of D15. For more accuracy, connection to the cathode of D15 will be better.) is used to minimize
the voltage error for the higher voltage outputs. Due to the
high ambient operating temperature requirement typical of a
set-top box (60 °C) the FSDL0165RN is used to reduce conduction losses without a heatsink. Resistor R5 sets the device
current limit to limit overload power.
Leakage inductance clamping is provided by R1 and C8,
keeping the DRAIN voltage below 650 V under all conditions. Resistor R1 and capacitor C8 are selected such that R1
dissipates power to prevent rising of DRAIN Voltage caused
by leakage inductance. The frequency modulation feature of
FSDL0165RN allows the circuit shown to meet CISPR2AB
with simple EMI filtering (C1, LF1 and C2) and the output
grounded. The secondaries are rectified and smoothed by
D12, D13, D14,and D15. Diode D15 for the 3.4V output is a
Schottky diode to maximize efficiency. Diode D14 for the 5
V output is a PN type to center the 5 V output at 5 V. The 3.3
V and 5 V output voltage require two capacitors in parallel to
meet the ripple current requirement. Switching noise filtering is provided by L3, L2 and L1. Resistor R15 prevents
14
peak charging of the lightly loaded 23V output. The outputs
are regulated by the reference (TL431) voltage in secondary.
Both the 3.3 V and 5 V outputs are sensed via R13 and R14.
Resistor R22 provides bias for TL431and R21 sets the overall DC gain. Resistor R21, C209, R14 and R13 provide loop
compensation.
FSDH0265RN, FSDM0265RN
2. Transformer Specification
1.
-
TRAN SFORM ER SPECIFIC ATION
SCHEM ATIC DIAG R AM (TRANSFORM ER)
3mm
6mm
12
1
11
2
8
7
5
top
bottom
6
2.
W INDING SPEC IFIC ATIO N
NO.
3.
NB
N P/2
N 23V
N 17V
N 5V
N 3.3V
N P/2
10
3
4
PIN(S → F)
W IRE
TURNS
W INDING M ETHOD
N P/2
3 → 2
0.25 Φ × 1
22
SOLENOID W INDING
N 3.3V
6
→ 8
0.3 Φ × 8
2
STACK W INDING
N 5V
10 → 6
0.3 Φ × 2
1
STACK W INDING
N 16V
11 → 6
0.3 Φ × 4
7
SOLENOID W INDING
N 23V
12 → 11
0.3 Φ × 2
3
SOLENOID W INDING
N P/2
2 → 1
0.25 Φ × 1
22
SOLENOID W INDING
NB
4 → 5
0.25 Φ × 1
10
CENTER W INDING
ELECTRIC CH AR ACTERISTIC
CLOSURE
PIN
SPEC.
REM ARKS
INDUCTANCE
1-3
800uH ± 10%
1KHz, 1V
LEAKAGE L
1-3
15uH MAX.
2nd ALL SHORT
4. BOBBIN & COR E.
CORE:
BOBBIN:
EER 2828
EER 2828
15
FSDH0265RN, FSDM0265RN
Layout Considerations
SURFACE MOUNTED
COPPER AREA FOR HEAT
SINKING
DC_link Capacitor
#1 : GND
#2 : VCC
#3 : Vfb
#4 : Ipk
#5 : Vstr
#6 : Drain
#7 : Drain
#8 : Drain
Y1CAPACITOR
- +
DC
OUT
Figure 15. Layout Considerations for FSDx0265RN using 8DIP
16
FSDH0265RN, FSDM0265RN
Package Dimensions
8DIP
17
FSDH0265RN, FSDM0265RN
Package Dimensions (Continued)
8LSOP
18
FSDH0265RN, FSDM0265RN
Ordering Information
Product Number
Package
Marking Code
BVDSS
FOSC
RDS(on)
FSDM0265RN
8DIP
DM0265R
650V
67KHz
5.0Ω
FSDH0265RN
8DIP
DH0265R
650V
100KHz
5.0Ω
FSDM0265RL
8LSOP
DM0265R
650V
67KHz
5.0Ω
FSDH0265RL
8LSOP
DH0265R
650V
100KHz
5.0Ω
19
FSDH0265RN, FSDM0265RN
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER
DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
CORPORATION. As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with
instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
www.fairchildsemi.com
4/26/05 0.0m 001
2005 Fairchild Semiconductor Corporation
