Green Mode Power Switch
FSL136HR
Description
The FSL136HR integrated Pulse Width Modulator (PWM) and
SENSEFET® is specifically designed for high−performance offline
Switch−Mode Power Supplies (SMPS) with minimal external
components. FSL136HR includes integrated high−voltage power
switching regulators that combine an avalanche−rugged SENSEFET
with a current−mode PWM control block.
The integrated PWM controller includes: Under−Voltage Lockout
(UVLO) protection, Leading−Edge Blanking (LEB), a frequency
generator for EMI attenuation, an optimized gate turn−on/turn−off
d r i v e r, T h e r m a l S h u t d o w n ( T S D ) p r o t e c t i o n , a n d
temperature−compensated precision current sources for loop
compensation and fault protection circuitry. The FSL136HR offers
good soft−start performance. When compared to a discrete MOSFET
and controller or RCC switching converter solution, the FSL136HR
reduces total component count, design size, and weight; while
increasing efficiency, productivity, and system reliability. This device
provides a basic platform that is well suited for the design of
cost−effective flyback converters.
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PDIP8 9.42x6.38, 2.54P
CASE 646CM
PDIP8 GW
CASE 709AJ
MARKING DIAGRAM
$Y&E&Z&2&K
FSL136HR
$Y&E&Z&2&K
FSL136HR
Features
• Internal Avalanche−Rugged SENSEFET (650 V)
• Under 50 mW Standby Power Consumption at 265 Vac, No−load
•
•
•
•
•
•
•
•
•
Condition with Burst Mode
Precision Fixed Operating Frequency with Frequency Modulation
for Attenuating EMI
Internal Startup Circuit
Built−in Soft−Start: 20 ms
Pulse−by−Pulse Current Limit
Various Protection: Over Voltage Protection (OVP), Overload
Protection (OLP), Output−Short Protection (OSP), Abnormal
Over−Current Protection (AOCP), Internal Thermal Shutdown
Function with Hysteresis (TSD)
Auto−Restart Mode
Under−Voltage Lockout (UVLO)
Low Operating Current: 1.8 mA
Adjustable Peak Current Limit
Table 1. MAXIMUM OUTPUT POWER (Note 1)
230 Vac + 15% (Note 2)
ORDERING INFORMATION
See detailed ordering and shipping information on page 5 of
this data sheet.
Applications
• SMPS for VCR, STB, DVD & DVCD
•
•
Players
SMPS for Home Appliance
Adapter
• https://www.onsemi.com/pub/Collateral/
Adapter (Note 3)
Open Frame
Adapter (Note 3)
Open Frame
19 W
26 W
14 W
20 W
AN−4137.pdf.pdf
• https://www.onsemi.com/pub/Collateral/
1. The junction temperature can limit the maximum output power.
2. 230 Vac or 100/115 Vac with doubler.
3. Typical continuous power in a non−ventilated enclosed adapter
measured at 50°C ambient.
April, 2020 − Rev. 3
= ON Semiconductor Logo
= Designated Space
= Assembly Plant Code
= 2−Digit Date code format
= 2−Digits Lot Run Traceability Code
= Specific Device Code Data
Related Resources
85−265 Vac
© Semiconductor Components Industries, LLC, 2011
$Y
&E
&Z
&2
&K
FSL136HR
•
1
AN−4141.pdf.pdf
https://www.onsemi.com/PowerSolutions/
home.do
Publication Order Number:
FSL136HR/D
FSL136HR
TYPICAL APPLICATION DIAGRAM
Figure 1. Typical Application
INTERNAL BLOCK DIAGRAM
V STR
5
V CC
2
Drai n
6,7,8
ICH
V BURL /V BURH
V CC
8V/12V
V CC Good
Internal
Bias
V REF
V CC
I DELAY
Random
Frequency
Generator
IFB
OSC
S
Q
R
Q
PWM
V FB 3
2.5R
Gate
Driver
R
IPK 4
On-Time
Detector
LEB
Soft
Start
OSP
V SD
V CC Good
V CC
V OVP
S
Q
R
Q
AOCP
TSD
Figure 2. Internal Block Diagram
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2
1 GND
V OCP
FSL136HR
PIN CONFIGURATION
GND
Drain
VCC
8−DIP
Drain
VFB
Drain
IPK
VSTR
Figure 3. Pin Configuration
PIN DEFINITIONS
Pin No.
Name
Description
1
GND
Ground. SENSEFET source terminal on the primary side and internal control ground.
2
VCC
Positive Supply Voltage Input. Although connected to an auxiliary transformer winding, current is supplied from pin
5 (VSTR) via an internal switch during startup (see Figure 2). Once VCC reaches the UVLO upper threshold (12 V),
the internal startup switch opens and device power is supplied via the auxiliary transformer winding.
3
VFB
Feedback Voltage. The non−inverting input to the PWM comparator, it has a 0.4 mA current source connected internally, while a capacitor and opto−coupler are typically connected externally. There is a delay while charging external
capacitor CFB from 2.4 V to 6 V using an internal 5 mA current source. This delay prevents false triggering under transient conditions, but still allows the protection mechanism to operate under true overload conditions.
4
IPK
Peak Current Limit. Adjusts the peak current limit of the SENSEFET. The feedback 0.4 mA current source is diverted to the parallel combination of an internal 6 kW resistor and any external resistor to GND on this pin to determine
the peak current limit.
5
VSTR
Startup. Connected to the rectified AC line voltage source. At startup, the internal switch supplies internal bias and
charges an external storage capacitor placed between the VCC pin and ground. Once VCC reaches 12 V, the internal
switch is opened.
6, 7, 8
Drain
Drain. Designed to connect directly to the primary lead of the transformer and capable of switching a maximum of
650 V. Minimizing the length of the trace connecting these pins to the transformer decreases leakage inductance.
ABSOLUTE MAXIMUM RATINGS (TJ = 25°C unless otherwise specified)
Symbol
Parameter
Min
Max
Unit
VSTR
VSTR Pin Voltage
−0.3
650
V
−0.3
650
V
−
26
V
VDS
Drain Pin Voltage
VCC
Supply Voltage
VFB
Feedback Voltage Range
−0.3
12.0
V
ID
Continuous Drain Current
−
3
A
IDM
Drain Current Pulsed (Note 4)
−
12
A
EAS
Single Pulsed Avalanche Energy (Note 5)
−
230
mJ
PD
Total Power Dissipation
−
1.5
TJ
Operating Junction Temperature
Internally Limited
TA
Operating Ambient Temperature
−40
+150
°C
TSTG
Storage Temperature
−55
+150
°C
ESD
Human Body Model, JESD22−A114 (Note 6)
5.0
−
kV
Charged Device Model, JESD22−C101 (Note 6)
1.5
−
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3
W
°C
FSL136HR
ABSOLUTE MAXIMUM RATINGS (continued)(TJ = 25°C unless otherwise specified) (continued)
Symbol
Parameter
Min
Max
Unit
°C/W
QJA
Junction−to−Ambient Thermal Resistance (Note 7, 8)
−
80
QJC
Junction−to−Case Thermal Resistance (Note 7, 9)
−
19
QJT
Junction−to−Top Thermal Resistance (Note 7, 10)
−
33.7
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
4. Repetitive rating: pulse width limited by maximum junction temperature.
5. L = 51 mH, starting TJ = 25°C.
6. Meets JEDEC standards JESD 22−A114 and JESD 22−C101.
7. All items are tested with the standards JESD 51−2 and JESD 51−10.
8. QJA free−standing, with no heat−sink, under natural convection.
9. QJC junction−to−lead thermal characteristics under QJA test condition. TC is measured on the source #7 pin closed to plastic interface for
QJA thermo−couple mounted on soldering.
10. QJT junction−to−top of thermal characteristic under QJA test condition. Tt is measured on top of package. Thermo−couple is mounted in
epoxy glue.
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified)
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
SENSEFET SECTION
BVDSS
IDSS
RDS(ON)
Drain−Source Breakdown Voltage
VCC = 0 V, ID = 250 mA
650
−
−
V
Zero Gate Voltage Drain Current
VDS = 650 V, VGS = 0 V
−
−
250
mA
Drain−Source On−State Resistance
VGS = 10 V, VGS = 0 V, TC = 25°C
−
3.5
4.0
W
CISS
Input Capacitance
VGS = 0 V, VDS = 25 V, f = 1MHz
−
290
−
pF
COSS
Output Capacitance
VGS = 0 V, VDS = 25 V, f = 1MHz
−
45
−
pF
CRSS
Reverse Transfer Capacitance
VGS = 0 V, VDS = 25 V, f = 1MHz
−
5.5
−
pF
td(on)
Turn−on Delay
VDD = 350 V, ID = 3.5 A
−
12
−
ns
Rise Time
VDD = 350 V, ID = 3.5 A
−
22
−
ns
Turn−off Delay
VDD = 350 V, ID = 3.5 A
−
20
−
ns
Fall Time
VDD = 350 V, ID = 3.5 A
−
19
−
ns
Switching Frequency
VDS = 650 V, VGS = 0 V
90
100
110
kHz
Switching Frequency Variation
VGS = 10 V, VGS = 0 V, TC = 125°C
−
±5
±10
%
−
±3
−
kHz
71
77
83
%
tr
td(off)
tf
CONTROL SECTION
fOSC
DfOSC
fFM
Frequency Modulation
DMAX
Maximum Duty Cycle
VFB = 4 V
DMIN
Minimum Duty Ratio
VFB = 0 V
VSTART
0
0
0
%
11
12
13
V
After Turn−on
7.0
8.0
9.0
V
UVLO Threshold Voltage
VSTOP
IFB
Feedback Source Current
VFB = 0
320
400
480
mA
tS/S
Internal Soft−Start Time
VFB = 4 V
15
20
25
ms
TJ = 25°C
0.4
0.5
0.6
V
VBURL
0.25
0.35
0.45
V
VBURH(HYS)
−
150
−
mV
1.89
2.15
2.41
A
200
−
−
ns
5.5
6.0
6.5
V
BURST−MODE SECTION
VBURH
Burst−Mode Voltage
PROTECTION SECTION
ILIM
Peak Current Limit
tCLD
Current Limit Delay Time (Note 11)
VSD
Shutdown Feedback Voltage
TJ = 25°C, di/dt = 300 mA/ms
VCC = 15 V
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4
FSL136HR
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified) (continued)
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
PROTECTION SECTION
IDELAY
Shutdown Delay Current
VFB = 5 V
3.5
5.0
6.5
mA
VOVP
Over−Voltage Protection Threshold
VFB = 2 V
22.5
24.0
25.5
V
tOSP
Output Short
Protection (Note 11)
TJ = 25°C
OSP Triggered when tON < tOSP &
VFB > VOSP, which lasts longer than
tOSP_FB
−
1.00
1.35
ms
1.44
1.60
−
V
2.0
2.5
−
ms
0.85
1.00
1.15
V
125
137
150
°C
−
60
−
°C
300
−
−
ns
VOSP
tOSP_FB
VAOCP
TSD
Threshold
Feedback Voltage
Feedback Blanking
Time
AOCP Voltage (Note 11)
Thermal Shutdown
(Note 11)
HYSTSD
tLEB
Threshold Time
TJ = 25°C
Shutdown
Temperature
Hysteresis
Leading−Edge Blanking Time (Note 11)
TOTAL DEVICE SECTION
IOP1
Operating Supply Current (Note 11)
(While Switching)
VCC = 14 V, VFB > VBURH
−
2.5
3.5
mA
IOP2
Operating Switching Current,
(Control Part Only)
VCC = 14 V, VFB < VBURL
−
1.8
2.5
mA
ICH
Startup Charging Current
VCC = 0 V
0.9
1.1
1.5
mA
Minimum VSTR Supply Voltage
VCC = VFB = 0 V, VSTR Increase
35
−
−
V
VSTR
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
11. Though guaranteed by design, it is not 100% tested in production.
ORDERING INFORMATION
Part Number
Operating Temperature Range
Top Mark
Package
Packing Method†
FSL136HR
−40 to 105 °C
FSL136HR
8−Lead, Dual Inline Package (DIP)
Rail
8−Lead, Surface Mount Package
(LSOP)
Rail
FSL136HRL
FSL136HRLX
Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
FSL136HR
TYPICAL PERFORMANCE CHARACTERISTICS
(These characteristics graphs are normalized TA = 25°C.)
Operating Frequency (f OSC)
Maximum Duty Cycle (DMAX)
1.4
1.4
1.3
1.2
1.2
1.1
1
1
0.9
0.8
0.8
0.6
0.7
0.6
-40℃ -25℃
0℃
25℃
50℃
75℃ 100℃ 120℃ 140℃
Figure 4. Operating Frequency vs. Temperature
Figure 5. Maximum Duty Cycle vs. Temperature
Start Threshold Voltage (V START)
Operating Supply Current (I op2)
1.4
1.4
1.3
1.3
1.2
1.2
1.1
1.1
1.0
1.0
0.9
0.9
0.8
0.8
0.7
0.7
0.6
0.6
-40 -250 255075100 120 140
-40 -250255075 100 120 140
Figure 6. Operating Supply Current vs. Temperature
Figure 7. Start Threshold Voltage vs. Temperature
Stop Threshold Voltage (V STOP)
Feedback Source Current (I FB)
1.4
1.4
1.3
1.3
1.2
1.2
1.1
1.1
1.0
1
0.9
0.9
0.8
0.8
0.7
0.7
0.6
0.6
-40℃ -25℃
-40 -250255075 100 120 140
Figure 8. Stop Threshold Voltage vs. Temperature
0℃
25℃
50℃
75℃ 100℃ 120℃ 140℃
Figure 9. Feedback Source Current vs. Temperature
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FSL136HR
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
(These Characteristic graphs are normalized at TA = 25.)
Peak Current Limit (ILIM)
Start Up Charging Current (ICH)
1.4
1.2
1
0.8
0.6
1.4
1.2
1
0.8
0.6
Figure 10. Startup Charging Current vs. Temperature
Figure 11. Peak Current Limit vs. Temperature
Over Voltage Protection (VOVP)
1.4
1.2
1
0.8
0.6
Figure 12. Burst Operating Supply Current
vs. Temperature
Figure 13. Over−Voltage Protection vs. Temperature
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FSL136HR
FUNCTIONAL DESCRIPTION
Feedback Control
At startup, an internal high−voltage current source
supplies the internal bias and charges the external capacitor
(CA) connected with the VCC pin, as illustrated in Figure 14.
When VCC reaches the start voltage of 12 V, the power
switch begins switching and the internal high−voltage
current source is disabled. The power switch continues
normal switching operation and the power is provided from
the auxiliary transformer winding unless VCC goes below
the stop voltage of 8 V.
FSL136HR employs current−mode control, as shown in
Figure 16. An opto−coupler (such as the FOD817A) and
shunt regulator (such as the KA431) are typically used to
implement the feedback network. Comparing the feedback
voltage with the voltage across the RSENSE resistor makes it
possible to control the switching duty cycle. When the shunt
regulator reference pin voltage exceeds the internal
reference voltage of 2.5 V, the optocoupler LED current
increases, the feedback voltage VFB is pulled down, and the
duty cycle is reduced. This typically occurs when the input
voltage is increased or the output load is decreased.
Figure 14. Startup Circuit
Figure 16. Pulse−Width−Modulation Circuit
Startup
Oscillator Block
Leading−Edge Blanking (LEB)
The oscillator frequency is set internally and the power
switch has a random frequency fluctuation function.
Fluctuation of the switching frequency of a switched power
supply can reduce EMI by spreading the energy over a wider
frequency range than the bandwidth measured by the EMI
test equipment. The amount of EMI reduction is directly
related to the range of the frequency variation. The range of
frequency variation is fixed internally; however, its
selection is randomly chosen by the combination of external
feedback voltage and internal free−running oscillator. This
randomly chosen switching frequency effectively spreads
the EMI noise nearby switching frequency and allows the
use of a cost− effective inductor instead of an AC input line
filter to satisfy the world−wide EMI requirements.
At the instant the internal SENSEFET is turned on, the
primary−side capacitance and secondary−side rectifier
diode reverse recovery typically cause a high−current spike
through the SENSEFET. Excessive voltage across the
RSENSE resistor leads to incorrect feedback operation in the
current−mode PWM control. To counter this effect, the
power switch employs a leading−edge blanking (LEB)
circuit (see the Figure 16). This circuit inhibits the PWM
comparator for a short time (tLEB) after the SENSEFET is
turned on.
Protection Circuit
The power switch has several protective functions, such
as overload protection (OLP), over−voltage protection
(OVP), output−short protection (OSP), under−voltage
lockout (UVLO), abnormal over−current protection
(AOCP), and thermal shutdown (TSD). Because these
various protection circuits are fully integrated in the IC
without external components, the reliability is improved
without increasing cost. Once a fault condition occurs,
switching is terminated and the SENSEFET remains off.
This causes VCC to fall. When VCC reaches the UVLO stop
voltage, VSTOP (8 V), the protection is reset and the internal
high−voltage current source charges the VCC capacitor via
the VSTR pin. When VCC reaches the UVLO start voltage,
VSTART (12 V), the power switch resumes normal operation.
In this manner, the auto−restart can alternately enable and
disable the switching of the power SENSEFET until the
fault condition is eliminated.
Figure 15. Frequency Fluctuation Waveform
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FSL136HR
Abnormal Over−Current Protection (AOCP)
When the secondary rectifier diodes or the transformer pin
are shorted, a steep current with extremely high di/dt can
flow through the SENSEFET during the LEB time. Even
though the power switch has OLP (Overload Protection), it
is not enough to protect the FPS in that abnormal case, since
severe current stress is imposed on the SENSEFET until
OLP triggers. The power switch includes the internal AOCP
(Abnormal Over−Current Protection) circuit shown in
Figure 19. When the gate turn−on signal is applied to the
power SENSEFET, the AOCP block is enabled and monitors
the current through the sensing resistor. The voltage across
the resistor is compared with a preset AOCP level. If the
sensing resistor voltage is greater than the AOCP level, the
set signal is applied to the latch, resulting in the shutdown of
the SMPS.
Figure 17. Pulse−Width−Modulation Circuit
Overload Protection (OLP)
Overload is defined as the load current exceeding a preset
level due to an unexpected event. In this situation, the
protection circuit should be activated to protect the SMPS.
However, even when the SMPS is operating normally, the
overload protection (OLP) circuit can be activated during
the load transition or startup. To avoid this undesired
operation, the OLP circuit is designed to be activated after
a specified time to determine whether it is a transient
situation or a true overload situation.
In conjunction with the IPK current limit pin (if used), the
current−mode feedback path limits the current in the
SENSEFET when the maximum PWM duty cycle is
attained. If the output consumes more than this maximum
power, the output voltage (VO) decreases below its rating
voltage. This reduces the current through the opto−coupler
LED, which also reduces the opto−coupler transistor
current, thus increasing the feedback voltage (VFB). If VFB
exceeds 2.4 V, the feedback input diode is blocked and the
5 mA current source (IDELAY) starts to charge CFB slowly up
to VCC. In this condition, VFB increases until it reaches 6 V,
when the switching operation is terminated, as shown in
Figure 18. The shutdown delay is the time required to charge
CFB from 2.4 V to 6 V with 5 mA current source.
Figure 19. Abnormal Over−Current Protection
Thermal Shutdown (TSD)
The SENSEFET and the control IC are integrated, making
it easier to detect the temperature of the SENSEFET. When
the temperature exceeds approximately 137°C, thermal
shutdown is activated.
Over−Voltage Protection (OVP)
In the event of a malfunction in the secondary−side
feedback circuit or an open feedback loop caused by
a soldering defect, the current through the opto−coupler
transistor becomes almost zero. Then, VFB climbs up in
a similar manner to the overload situation, forcing the preset
maximum current to be supplied to the SMPS until the
overload protection is activated. Because excess energy is
provided to the output, the output voltage may exceed the
rated voltage before the overload protection is activated,
resulting in the breakdown of the devices in the secondary
side. To prevent this situation, an over−voltage protection
(OVP) circuit is employed. In general, VCC is proportional
to the output voltage and the power switch uses VCC instead
of directly monitoring the output voltage. If VCC exceeds
24 V, OVP circuit is activated, resulting in termination of
the switching operation. To avoid undesired activation of
OVP during normal operation, VCC should be designed to be
below 24 V.
Figure 18. Overload Protection (OLP)
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FSL136HR
Output−Short Protection (OSP)
Burst Operation
If the output is shorted, steep current with extremely high
di/dt can flow through the SENSEFET during the LEB time.
Such a steep current brings high−voltage stress on the drain
of SENSEFET when turned off. To protect the device from
such an abnormal condition, OSP detects VFB and
SENSEFET turn−on time. When the VFB is higher than
1.6 V and the SENSEFET turn−on time is lower than 1.0 ms,
the FPS recognizes this condition as an abnormal error and
shuts down PWM switching until VCC reaches VSTART
again. An abnormal condition output is shown in Figure 20.
To minimize power dissipation in standby mode, the FPS
enters burst mode. As the load decreases, the feedback
voltage decreases. As shown in Figure 22, the device
automatically enters burst mode when the feedback voltage
drops below VBURH. Switching continues, but the current
limit is fixed internally to minimize flux density in the
transformer. The fixed current limit is larger than that
defined by VFB = VBURH and, therefore, VFB is driven down
further. Switching continues until the feedback voltage
drops below VBURL. At this point, switching stops and the
output voltages start to drop at a rate dependent on the
standby current load. This causes the feedback voltage to
rise. Once it passes VBURH, switching resumes. The
feedback voltage then falls and the process repeats. Burst
mode alternately enables and disables switching of the
SENSEFET and reduces switching loss in standby mode.
Turn-off delay
Rectifier
Diode
Current
MOSFET
Drain
Current
ILIM
VOSP
VFB
VOUT
Minimum
turn-on time
D
1.6us
output short occurs
IOUT
Figure 20. Output Short Waveforms (OSP)
Soft−Start
The power switch has an internal soft−start circuit that
slowly increases the feedback voltage, together with the
SENSEFET current, after it starts. The typical soft−start
time is 20 ms, as shown in Figure 21, where progressive
increments of the SENSEFET current are allowed during the
startup phase. The pulse width to the power switching device
is progressively increased to establish the correct working
conditions for transformers, inductors, and capacitors. The
voltage on the output capacitors is progressively increased
with the intention of smoothly establishing the required
output voltage. Soft−start helps to prevent transformer
saturation and reduce the stress on the secondary diode.
Figure 22. Burst−Mode Operation
Adjusting Peak Current Limit
As shown in Figure 23, a combined 6 kW internal
resistance is connected to the non−inverting lead on the
PWM comparator. An external resistance of Rx on the
current limit pin forms a parallel resistance with the 6 kW
when the internal diodes are biased by the main current
source of 400 mA. For example, FSL136HR has a typical
SENSEFET peak current limit (ILIM) of 2.15 A. ILIM can be
adjusted to 1.5 A by inserting Rx between the IPK pin and the
ground. The value of the Rx can be estimated by the
following equations:
1.25ms
ILIM
16Steps
Current Limit
0.25ILIM
Drain
Current
t
Figure 21. Internal Soft−Start
2.15 A : 1.5 A + 6 kW : X kW
(eq. 1)
X + Rx Ŧ 6 kW
(eq. 2)
Where X is the resistance of the parallel network.
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10
FSL136HR
VFB
IPK
Rx
Vcc
Vcc
IDELAY
IFB
400mA
3
PWM
4.25k W
1.7k W
4
Current
Sense
Figure 23. Peak Current Limit Adjustment
SENSEFET is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States
and/or other countries.
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11
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP8 9.42x6.38, 2.54P
CASE 646CM
ISSUE O
DATE 31 JUL 2016
9.83
9.00
5
8
6.670
6.096
1
4
8.255
7.610
TOP VIEW
1.65
1.27
(0.56)
7.62
3.683
3.200
5.08 MAX
3.60
3.00
0.33 MIN
0.560
0.355
2.54
15°
0°
0.356
0.200
7.62
9.957
7.870
FRONT VIEW
SIDE VIEW
NOTES:
A. CONFORMS TO JEDEC MS−001, VARIATION BA
B. ALL DIMENSIONS ARE IN MILLIMETERS
C. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH, AND TIE BAR EXTRUSIONS
D. DIMENSIONS AND TOLERANCES PER ASME
Y14.5M−2009
DOCUMENT NUMBER:
DESCRIPTION:
98AON13468G
PDIP8 9.42X6.38, 2.54P
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP8 GW
CASE 709AJ
ISSUE O
DATE 31 JAN 2017
DOCUMENT NUMBER:
STATUS:
98AON13756G
ON SEMICONDUCTOR STANDARD
NEW STANDARD:
© Semiconductor Components Industries, LLC, 2002
October, DESCRIPTION:
2002 − Rev. 0
PDIP8 GW
http://onsemi.com
1
Electronic versions are uncontrolled except when
accessed directly from the Document Repository. Printed
versions are uncontrolled except when stamped
“CONTROLLED COPY” in red.
Case Outline Number:
PAGE 1 OFXXX
2
DOCUMENT NUMBER:
98AON13756G
PAGE 2 OF 2
ISSUE
O
REVISION
RELEASED FOR PRODUCTION FROM FAIRCHILD MKT−MLSOP08A TO ON
SEMICONDUCTOR. REQ. BY D. TRUHITTE.
DATE
31 JAN 2017
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
© Semiconductor Components Industries, LLC, 2017
January, 2017 − Rev. O
Case Outline Number:
709AJ
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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