FSQ100

FSQ100 Green Mode Fairchild Power Switch (FPS™) Features Description  Internal Avalanche-Rugged SenseFET  Precision Fixed Operating Frequency: 67KHz  Burst-Mode Operation  Internal Startup Circuit  Pulse-by-Pulse Current Limiting  Over-Voltage Protection (OVP)  Overload Protection (OLP)  Internal Thermal Shutdown Function (TSD)  Auto-Restart Mode  Under-Voltage Lockout (UVLO) with Hysteresis  Built-in Soft-Start  Secondary-Side Regulation The FSQ100 consists of an integrated Pulse Width Modulator (PWM) and SenseFET, specifically designed for high-performance, off-line, Switch-Mode Power Supplies (SMPS) with minimal external components. This device is an integrated high-voltage power switching regulator that combines a VDMOS SenseFET with a voltage mode PWM control block. The integrated PWM controller features include a fixed oscillator, Under-Voltage Lockout (UVLO) protection, Leading Edge Blanking (LEB), an optimized gate turn-on/turn-off driver, Thermal Shutdown (TSD) protection, and temperature-compensated precision-current sources for loop compensation and fault protection circuitry. When compared to a discrete MOSFET and controller or RCC solution, the FSQ100 device reduces total component count and design size and weight, while increasing efficiency, productivity, and system reliability. This device provides a basic platform well suited for cost-effective flyback converters. Applications  Charger & Adapter for Mobile Phone, PDA, MP3  Auxiliary Power for White Goods, PC, C-TV, Monitor Related Application Notes  AN-4137 — Design Guidelines for Off-line Flyback Converters using FPS™  AN-4141 — Troubleshooting and Design Tips for Fairchild Power Switch (FPS™) Flyback Applications  AN-4147 — Design Guidelines for RCD Snubber of Flyback  AN-4134 — Design Guidelines for Off-line Forward Converters using FPS™  AN-4138 — Design Considerations for Battery Charger Using Green Mode Fairchild Power Switch (FPS™) Ordering Information Product Number Package Marking Code BVDSS fOSC RDS(ON) FSQ100 8-DIP Q100 650V 67KHz 16Ω FPS™ is a trademark of Fairchild Semiconductor Corporation. © 2007 Fairchild Semiconductor Corporation FSQ100 Rev. 1.0.2 www.fairchildsemi.com FSQ100 — Green Mode Fairchild Power Switch (FPSTM) March 2011 AC IN DC OUT VSTR Drain PWM VFB Figure 1. VCC GND Typical Flyback Application Table 1. Output Power Table Open Frame(1) Product 230VAC ±15%(2) 85~265VAC 13W 8W FSQ100 Notes: 1. Maximum practical continuous power in an open-frame design with sufficient drain pattern as a heat sinker, at 50C ambient. 2. 230VAC or 100/115VAC with doubler. FSQ100 — Green Mode Fairchild Power Switch (FPSTM) Typical Application Internal Block Diagram VCC VSTR Drain 5 6,7,8 L 2 Internal Bias Voltage Ref UVLO H 9/7V Idelay 5µA Ifb 400µA Vck OSC DR IVER PWM VFB SFET S Q 3 R S/S 15ms BURST VBURL/ VBURH NC LEB 4 OLP ILIM Reset Min.20V S Q VSD OVP Vth R sense R TSD A/R 1 GND Figure 2. Functional Block Diagram © 2007 Fairchild Semiconductor Corporation FSQ100 Rev. 1.0.2 www.fairchildsemi.com 2 GND 1 8 Drain VCC 2 7 Drain VFB 3 6 Drain NC 4 5 VSTR Figure 3. Pin Configuration (Top View) Pin Definitions Pin # Name Description 1 GND 2 VCC 3 VFB 4 NC 5 VSTR 6,7,8 Drain Ground. SenseFET source terminal on primary-side and internal control ground. Positive Supply Voltage Input. Although connected to an auxiliary transformer winding, current is supplied from pin 5 (VSTR) via an internal switch during startup (see Figure 2). When VCC reaches the UVLO upper threshold (9V), the internal startup switch opens and device power is supplied via the auxiliary transformer winding. Feedback. Inverting input to the PWM comparator with its normal input level lies between 0.5V and 2.5V. It has a 0.4mA current source connected internally, while a capacitor and optocoupler are typically connected externally. A feedback voltage of 4.5V triggers overload protection (OLP). There is a time delay while charging external capacitor Cfb from 3V to 4.5V using an internal 5µA current source. This time delay prevents false triggering under transient conditions, but still allows the protection mechanism to operate in true overload conditions. No Connection. Startup. This pin connects directly to the rectified AC line voltage source. At startup, the internal switch supplies internal bias and charges an external storage capacitor placed between the VCC pin and ground. Once the VCC reaches 9V, the internal switch stops charging the capacitor. SenseFET Drain. The drain pins are designed to connect directly to the primary lead of the transformer and are capable of switching a maximum of 650V. Minimizing the length of the trace connecting these pins to the transformer decreases leakage inductance. © 2007 Fairchild Semiconductor Corporation FSQ100 Rev. 1.0.2 FSQ100 — Green Mode Fairchild Power Switch (FPSTM) Pin Assignments www.fairchildsemi.com 3 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA = 25°C, unless otherwise specified. Symbol Parameter Value Unit VDRAIN Drain Pin Voltage 650 V VSTR VSTR Pin Voltage 650 V VDG Drain-Gate Voltage 650 V VGS Gate-Source Voltage ±20 V VCC Supply Voltage 20 V VFB Feedback Voltage Range -0.3 to VSTOP V PD Total Power Dissipation 1.40 W TJ Operating Junction Temperature Internally limited °C TA Operating Ambient Temperature -25 to +85 °C Storage Temperature -55 to +150 °C TSTG Notes: 1. Repetitive rating: Pulse width is limited by maximum junction temperature. 2. L = 24mH, starting TJ = 25C. FSQ100 — Green Mode Fairchild Power Switch (FPSTM) Absolute Maximum Ratings Thermal Impedance TA = 25°C, unless otherwise specified. All items are tested with the JEDEC standards JESD 51-2 and 51-10 (DIP). Symbol Parameter (3) Value Unit θJA Junction-to-Ambient Thermal Impedance 88.84 °C/W θJC Junction-to-Case Thermal Impedance(4) 13.94 °C/W Notes: 3. Free-standing with no heatsink; without copper clad. Measurement condition; just before junction temperature TJ enters into OTP. 4. Measured on the DRAIN pin close to plastic interface. © 2007 Fairchild Semiconductor Corporation FSQ100 Rev. 1.0.2 www.fairchildsemi.com 4 TA = 25°C, unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Unit SenseFET Section IDSS RDS(ON) gfs CISS Zero-Gate-Voltage Drain Current VDS=650V, VGS=0V 25 200 VDS=520V, VGS=0V, TC=125C Drain-Source On-State Resistance(5) VGS=10V, ID=0.5A Forward Trans-Conductance VDS=50V, ID=0.5A 16 1.0 22 1.3 µA Ω S 162 Input Capacitance COSS Output Capacitance CRSS Reverse Transfer Capacitance VGS=0V, VDS=25V, f=1MHz 18 pF 3.8 Control Section fOSC Switching Frequency 61 (6) ΔfOSC Switching Frequency Variation DMAX Maximum Duty Cycle VSTART VSTOP UVLO Threshold Voltage IFB Feedback Source Current tS/S Internal Soft Start Time -25°C ≤ TA ≤ 85°C VFB=GND VFB=GND 0V ≤ VFB ≤ 3V 67 73 kHz ±5 ±10 % 60 67 74 % 8 9 10 V 6 7 8 V 0.35 0.40 0.45 mA 10 15 20 ms Burst Mode Section VBURH VBURL Burst Mode Voltage VBUR(HYS) TJ=25°C 0.6 0.7 0.8 V 0.45 0.55 0.65 V Hysteresis 150 FSQ100 — Green Mode Fairchild Power Switch (FPSTM) Electrical Characteristics mV Protection Section ILIM Peak Current Limit 0.475 0.550 TSD Thermal Shutdown Temperature(7) 125 145 0.650 VSD Shutdown Feedback Voltage 4.0 4.5 5.0 V VOVP Over-Voltage Protection IDELAY Shutdown Delay Current 5 6 µA 1.5 3.0 mA 550 650 µA 20 3V ≤ VFB ≤ VSD 4 A °C V Total Device Section IOP Operating Supply Current (8) VCC ≤ 16V ICH Startup Charging Current VCC=0V , VSTR=50V 450 Notes: 5. Pulse test: Pulse width ≤ 300µs, duty ≤ 2%. 6. These parameters, although guaranteed, are tested in EDS (wafer test) process. 7. These parameters, although guaranteed, are not 100% tested in production. 8. Control part only. © 2007 Fairchild Semiconductor Corporation FSQ100 Rev. 1.0.2 www.fairchildsemi.com 5 1.15 1.15 1.10 1.10 1.05 1.05 1.00 1.00 IOP VOVP These characteristic graphs are normalized at TA = 25°C. 0.95 0.95 0.90 0.90 0.85 -50 0 50 100 0.85 150 -50 0 Figure 5. 1.15 1.10 1.10 1.05 1.05 VSTOP VSTAART Over-Voltage Protection (VOVP) vs. TA 1.15 1.00 0.95 0.90 0.90 -50 0 50 100 0.85 150 Operating Supply Current (IOP) vs. TA -50 0 Temperature [°C] Start Threshold Voltage (VSTART) vs. TA Figure 7. 1.15 1.15 1.10 1.10 1.05 1.05 1.00 0.95 0.90 0.90 -50 0 50 100 0.85 150 -50 Temperature [°C] Figure 8. 150 Stop Threshold Voltage (VSTOP) vs. TA 0 50 100 150 Temperature [°C] Operating Frequency (fOSC) vs. TA © 2007 Fairchild Semiconductor Corporation FSQ100 Rev. 1.0.2 100 1.00 0.95 0.85 50 Temperature [°C] DMAX fOSC Figure 6. 150 1.00 0.95 0.85 100 Temperature [°C] Temperature [°C] Figure 4. 50 FSQ100 — Green Mode Fairchild Power Switch (FPSTM) Typical Performance Characteristics Figure 9. Maximum Duty Cycle (DMAX) vs. TA www.fairchildsemi.com 6 1.15 1.15 1.10 1.10 1.05 1.05 1.00 1.00 IFB ILIM These characteristic graphs are normalized at TA = 25°C. 0.95 0.95 0.90 0.90 0.85 0.85 -50 0 50 100 150 -50 0 Temperature [°C] Peak Current Limit (ILIM) vs. TA Figure 11. 1.15 1.15 1.10 1.10 1.05 1.05 1.00 0.95 0.90 0.90 -50 0 50 100 0.85 150 Temperature [°C] Figure 12. Feedback Source Current (IFB) vs. TA -50 0 50 100 150 Temperature [°C] Shutdown Delay Current (IDELAY) vs. TA © 2007 Fairchild Semiconductor Corporation FSQ100 Rev. 1.0.2 150 1.00 0.95 0.85 100 Temperature [°C] VSD IDELAY Figure 10. 50 FSQ100 — Green Mode Fairchild Power Switch (FPSTM) Typical Performance Characteristics (Continued) Figure 13. Shutdown Feedback Voltage (VSD) vs. TA www.fairchildsemi.com 7 When the shunt regulator reference pin voltage exceeds the internal reference voltage of 2.5V, the opto-coupler LED current increases, the feedback voltage VFB is pulled down, and it reduces the duty cycle. This happens when the input voltage increases or the output load decreases. 1. Startup: At startup, the internal high-voltage current source supplies the internal bias and charges the external VCC capacitor, as shown in Figure 14. When VCC reaches 9V, the device starts switching and the internal high-voltage current source stops charging the capacitor. The device is in normal operation provided VCC does not drop below 7V. After startup, the bias is supplied from the auxiliary transformer winding. VCC VIN ,dc ISTR V CC driver 4 Cfb L 400µA Gate Vfb VO Vstr OSC Vref 5µA + R Vfb KA431 H OLP VSD 9V/ 7V Figure 16. Figure 14. 3. Leading Edge Blanking (LEB): At the instant the internal SenseFET is turned on, the primary-side capacitance and secondary-side rectifier diode reverse recovery typically causes a high-current spike through the SenseFET. Excessive voltage across the RSENSE resistor lead to incorrect pulse-by-pulse current limit protection. To avoid this, a leading edge blanking (LEB) circuit disables pulse-by-pulse current-limit protection block for a fixed time (tLEB) after the SenseFET turns on. Internal Startup Circuit Calculating the VCC capacitor is an important step to design with the FSQ100. At initial startup, the maximum value of start operating current ISTART is about 100µA, which supplies current to UVLO and VREF blocks. The charging current IVCC of the VCC capacitor is equal to ISTR – 100µA. After VCC reaches the UVLO start voltage, only the bias winding supplies VCC current to the device. When the bias winding voltage is not sufficient, the VCC level decreases to the UVLO stop voltage and the internal current source is activated again to charge the VCC capacitor. To prevent this VCC fluctuation (charging/discharging), the VCC capacitor should be chosen to have a value between 10µF and 47µF. VIN ,dc V CC 4. Protection Circuit: The FSQ100 has protective functions, such as overload protection (OLP), over voltage protection (OVP), under-voltage lockout (UVLO), and thermal shutdown (TSD). Because these protection circuits are fully integrated inside the IC without external components, reliability is improved without increasing costs. Once a fault condition occurs, switching is terminated and the SenseFET remains off. This causes VCC to fall. When VCC reaches the UVLO stop voltage VSTOP (7V), the protection is reset and the internal highvoltage current source charges the VCC capacitor via the VSTR pin. When VCC reaches the UVLO start voltage VSTART (9V), the device resumes normal operation. In this manner, the auto-restart can alternately enable and disable the switching of the power SenseFET until the fault condition is eliminated. ISTR VSTR IVcc = ISTR-ISTART IVcc = ISTR-ISTART PWM and Feedback Circuit FSQ100 — Green Mode Fairchild Power Switch (FPSTM) Functional Description J-FET ISTART U VLO V ref VCC V START OSC UV LO VCC must not drop below VSTOP 5 µA VSTOP V fb Bias winding voltage C fb OLP SQ RESET Charging VCC Capacitor through Vstr 2. Feedback Control: The FSQ100 is a voltage mode controlled device, as shown in Figure 16. Usually, an opto-coupler and shunt regulator, like KA431 are used to implement the feedback network. The feedback voltage is compared with an internally generated sawtooth waveform. This directly controls the duty cycle. © 2007 Fairchild Semiconductor Corporation FSQ100 Rev. 1.0.2 - 4 GATE DRIVER SQ R + R t Figure 15. 400µA Figure 17. 4.5V TSD R A /R OLP, TSD Protection Block Protection Block www.fairchildsemi.com 8 Drain current 0.55A 2.14ms 7steps 0.31A t Figure 19. Internal Soft-Start 6. Burst Operation: To minimize the power dissipation in standby mode, the FSQ100 enters burst-mode operation. As the load decreases, the feedback voltage decreases. The device automatically enters burst mode when the feedback voltage drops below VBURL (0.55V). At this point, switching stops and the output voltages start to drop. This causes the feedback voltage to rise. Once is passes VBURH (0.70V), switching starts again. The feedback voltage falls and the process repeats. Burst-mode operation alternately enables and disables switching of the power MOSFET to reduce the switching loss in standby mode. VFB Overload Protection 4.5V OSC S 3V 5µA V fb t12 = Cfb×(V(t2 )-V(t1 )) / IDELAY t1 t12 = Cfb t2 GATE DRIVER on /off 0.70V /0.55V Burst Operation Block Figure 20. Burst Operation Block VO Overload Protection (OLP) VO set 4.2 Thermal Shutdown (TSD): The SenseFET and the control IC are integrated, making it easier for the control IC to detect the temperature of the SenseFET. When the temperature exceeds approximately 145C, thermal shutdown is activated. VFB 0.70V 0.55V 5. Soft-Start: The FPS has an internal soft-start circuit that slowly increases the feedback voltage, together with the SenseFET current, right after it starts. The typical soft-start time is 15ms, as shown in Figure 19, where progressive increment of the SenseFET current is allowed during the startup phase. Soft-start circuit progressively increases current limits to establish proper working conditions for transformers, inductors, capacitors, and switching devices. It also helps to prevent transformer saturation and reduces the stress on the secondary diode. Ids Vds t Figure 21. © 2007 Fairchild Semiconductor Corporation FSQ100 Rev. 1.0.2 Q R 4 t V (t2 ) −V (t1) ; I DELAY = 5µA, V (t1) = 3V , V (t2 ) = 4.5V I DELAY Figure 18. 400µA FSQ100 — Green Mode Fairchild Power Switch (FPSTM) 4.1 Overload Protection (OLP): Overload is defined as the load current exceeding a pre-set level due to an unexpected event. In this situation, the protection circuit should be activated to protect the SMPS. However, even when the SMPS is operating normally, the over load protection (OLP) circuit can be activated during the load transition. To avoid this undesired operation, the OLP circuit is designed to be activated after a specified time to determine whether it is a transient situation or a true overload situation. If the output consumes more than the maximum power determined by ILIM, the output voltage (VO) decreases below its rating voltage. This reduces the current through the opto-coupler LED, which also reduces the opto-coupler transistor current, thus increasing the feedback voltage (VFB). If VFB exceeds 3V, the feedback input diode is blocked and the 5µA current source (IDELAY) starts to charge CFB slowly up to VCC. In this condition, VFB increases until it reaches 4.5V, when the switching operation is terminated, as shown in Figure 18. The shutdown delay time is the time required to charge CFB from 3V to 4.5V with a 5µA current source. Burst Operation Function www.fairchildsemi.com 9 1. Methods of Reducing Audible Noise Switching mode power converters have electronic and magnetic components that generate audible noise when the operating frequency is in the range of 20~20,000Hz. Even though they operate above 20kHz, they can make noise, depending on the load condition. Designers can employ several methods to reduce noise. Glue or Varnish The most common method involves using glue or varnish to tighten magnetic components. The motion of core, bobbin and coil, and the chattering or magnetostriction of core can cause the transformer to produce audible noise. The use of rigid glue and varnish helps reduce the transformer noise, but can crack the core. This is because sudden changes in the ambient temperature cause the core and the glue to expand or shrink in a different ratio. Figure 22. Equal Loudness Curves Ceramic Capacitor Using a film capacitor instead of a ceramic capacitor as a snubber capacitor is another noise-reduction solution. Some dielectric materials show a piezoelectric effect, depending on the electric field intensity. Hence, a snubber capacitor becomes one of the most significant sources of audible noise. It is possible to use a Zener clamp circuit instead of an RCD snubber for higher efficiency as and lower audible noise. Adjusting Sound Frequency Figure 23. Moving the fundamental frequency of noise out of 2~4kHz range is the third method. Generally, humans are more sensitive to noise in the range of 2~4kHz. When the fundamental frequency of noise is located in this range, the noise is perceived as louder, although the noise intensity level is identical (refer to Figure 22 Equal Loudness Curves). FSQ100 — Green Mode Fairchild Power Switch (FPSTM) Application Tips Typical Feedback Network of FPS™ 2. Reference Materials AN-4134 — Design Guidelines for Off-line Forward Converters using FPS™ AN-4137 — Design Guidelines for Off-line Flyback Converters using FPS™ When FPS acts in burst mode and the burst operation is suspected to be a source of noise, this method may be helpful. If the frequency of burst-mode operation lies in the range of 2~4 kHz, adjusting the feedback loop can shift the burst operation frequency. To reduce the burst operation frequency, increase a feedback gain capacitor (CF), opto-coupler supply resistor (RD), and feedback capacitor (CB); and decrease a feedback gain resistor (RF), as shown in Figure 23. AN-4138 — Design Considerations for Battery Charger Using Green Mode Fairchild Power Switch (FPS™) AN-4140 — Transformer Design Consideration for Offline Flyback Converters Using Fairchild Power Switch (FPS™) AN-4141 — Troubleshooting and Design Tips for Fairchild Power Switch (FPS™) Flyback Applications AN-4147 — Design Guidelines for RCD Snubber of Flyback AN-4148 — Audible Noise Reduction Techniques for FPS™Applications © 2007 Fairchild Semiconductor Corporation FSQ100 Rev. 1.0.2 www.fairchildsemi.com 10 [ 0.400 10.160 0.355 9.017 8 ] 5 PIN 1 INDICATOR 1 ] 4 HALF LEAD 4X 0.005 [0.126] FULL LEAD 4X 0.005 [0.126] MIN [ 0.195 4.965 0.115 2.933 MAX 0.210 [5.334] ] [ 0.325 8.263 0.300 7.628 ] SEATING PLANE [ 0.150 3.811 0.115 2.922 ] 0.015 [0.389] GAGE PLANE [ 0.280 7.112 0.240 6.096 FSQ100 Green Mode Fairchild Power Switch (FPSTM) Physical Dimensions C MIN 0.015 [0.381] 0.100 [2.540] [ 0.022 0.562 0.014 0.358 0.300 [7.618] [ 0.045 1.144 0.030 0.763 ] ] 4X [ ] 4X 0.070 1.778 0.045 1.143 0.10 C 0.430 [10.922] MAX NOTES: A) THIS PACKAGE CONFORMS TO JEDEC MS-001 VARIATION BA B) CONTROLING DIMS ARE IN INCHES C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS. D) DIMENSION S AND TOLERANCES PER ASME Y14.5M -1982 E) DRAWING FILENAME AND REVSION: MKT-N08MREV1. Figure 24. © 2007 Fairchild Semiconductor Corporation FSQ100 Rev. 1.0.2 8-Pin Dual Inline Package (DIP) www.fairchildsemi.com 11 FSQ100 Green Mode Fairchild Power Switch (FPSTM) © 2007 Fairchild Semiconductor Corporation FSQ100 Rev. 1.0.2 www.fairchildsemi.com 12