DATA SHEET
www.onsemi.com
Type-C CC with High Speed
Digital (HSD)
Port Protection Switch
UQFN16 1.8 x 2.6, 0.4P
CASE 523BF
FUSB252
Description
The FUSB252 is an integrated port protection switch
for USB Type−C® applications. This product will protect HSD+/−
and CCx pins when stressed with voltages up to 20 V. Over−Voltage
Protection (OVP) at 5.8 V typical will protect the system for Electrical
Overstress (EOS) damage. With a fully integrated USB 2.0 switch
for HSD+/−, this product can be easily integrated into existing
solutions. The HSD switches can pass USB 2.0 signals
with bandwidth 1 GHz to maintain signal integrity and eye
compliance.
The CC switches have very low RON of 0.3 W to minimize signal
attenuation. The FUSB252 also provides Dead Battery support per
the Type−C specification Additional features include Under−Voltage
Lockout (UVLO) and thermal shutdown.
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Fully Type−C Port Protection
Supports USB Type−C Specification 1.2
VCC 0 V − 5.5 V
20 V DC Protection on VCC
16 V DC Protection on HSD Port
VDD Operating Range, 2.7 V − 5.5 V
Current Capability: 1 A
CC RON: 0.3 W Typical
HSD RON: 5 W Typical
Wide −3 db Bandwidth: 1 GHz
Low Power Operation: ICC = 9 mA Typical
Dead Battery Support (UFP Support when No Power Applied)
CC Over−Voltage Protection: Typical = 5.6 V
This is a Pb−Free Device
MARKING DIAGRAM
UZ&K
&2&Z
UZ
&K
&2
&Z
= Device Code
= 2−Digit Lot Run Traceability Code
= 2−Digit Date Code
= Assembly Location
ORDERING INFORMATION
See detailed ordering and shipping information on page 2 of
this data sheet.
Applications
• Smartphones
• Tablets
• Laptops
© Semiconductor Components Industries, LLC, 2017
March, 2022 − Rev. 2
1
Publication Order Number:
FUSB252/D
FUSB252
VBUS
VBUS
VSYS
Type C
Controller
AP
Charger
VDD
VOCC1
VOCC2
/OE
SEL
HSD1+
HSD1−
HSD2+
HSD2−
Logic &
Control
FUSB252
OVP
CC Protection
VICC1
VICC2
Type C Connector
PMIC
Dead Battery Rd
INTB /
FLAGB
High Speed Digital
Protection MUX
HSD+
HSD−
GND
GND
Figure 1. Typical Application
ORDERING INFORMATION
Part Number
Operating
Temperature Range
FUSB252UMX
−40 to 85°C
Package
16−Lead Ultrathin Molded Leadless
Package (UMLP) 1.8 x 2.6 mm
Top Mark
Shipping†
UZ
5000 / Tape and Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specification Brochure, BRD8011/D.
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2
FUSB252
BLOCK DIAGRAM
VDD
VICC1
VOCC1
CC Protection Switch
& Dead Battery Rd
VOCC2
/OE
INTB/FLAGB
OVP
Logic &
Control
SEL
VICC2
HSD1+
HSD1−
HSD+
HS Digital Switch
HSD2+
HSD2−
HSD−
GND
Figure 2. Block Diagram
REFERENCE SCHEMATIC
VDD
FUSB252
CC1
To Controller
CC2
1 VOCC1
USB TYP−C
13VDD
VICC1 16
2 VOCC2 VICC2 15
/OE
SEL
VIO
7 /OE
6SEL
D1+
D1−
12 HSD1+
D2+
10 HSD2+
D2−
HSD− 4
9 HSD2−
GND GND
5 14
11 HSD1−
INTB/ 8
FLAGB
HSD+ 3
FLAGB
Figure 3. Reference Schematic
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3
GNDA2
RX2P
RX2M
VBUSA2
SBU1
DMA
DPA
CC1
VBUSA1
TX1M
TX1P
GNDA1
GNDB2
TX2P
TX2M
VBUSB1
CC2
DPB
DMB
SBU2
VBUSB2
RX1M
RX1P
GNDB2
FUSB252
PIN CONFIGURATIONS
VICC1 VICC2
16
GND
VVDD
14
13
15
1
V0CC1
VVDD GND
13
12
HSD1+
HSD1+
12
14
VICC2
15
VICC1
16
1
V0CC1
V0CC2
2
11
HSD1−
HSD1−
11
2
V0CC2
HSD+
3
10
HSD2+
HSD2+
10
3
HSD+
HSD−
4
9
HSD2−
9
4
HSD−
5
6
7
GND
SEL
/OE
HSD2−
8
8
INTB/
FLAGB
7
INTB/ /OE
FLAGB
Figure 4. Pin Assignment (Top Through View)
6
5
SEL
GND
Figure 5. Pin Assignment (Bottom View)
PIN DESCRIPTION
Bump
Name
Type
Description
13
VDD
Power
Power
5, 14
GND
Ground
Ground
POWER INTERFACE
USB TYPE−C CONNECTOR INTERFACE INPUT
15, 16
VICC1, 2
Input
Type C CC Interface OVP protection input, Connect to connector
USB TYPE−C CONNECTOR INTERFACE OUTPUT
1, 2
VOCC1, 2
Output
Type C CC Interface output. Connect to controller
USB HIGH SPEED DATA INTERFACE
3
HSD+
I/O
Common High Speed Digital / USB Data Bus
4
HSD−
I/O
Common High Speed Digital / USB Data Bus
12
HSD1+
I/O
Multiplexed Source Input 1
11
HSD1−
I/O
Multiplexed Source Input 1
10
HSD2+
I/O
Multiplexed Source Input 2
9
HSD2−
I/O
Multiplexed Source Input 2
7
/OE
I/O
Switch Enable
6
SEL
I/O
Switch Select
8
INTB/FLAGB
Output
SIGNAL INTERFACE
OVP Interrupt Flag
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4
FUSB252
Table 1. CC SWITCH TRUTH TABLE CONFIGURATION
VDD
VICC Voltage
0 V − UVLO (Not Valid)
0 V − 5.8 V
OFF Dead Battery Rd Inserted
5.8 V to 20 V
OFF Dead Battery Rd Inserted
2.7 V − 5.5 V (Valid)
0 V − 5.8 V
CC Switch Configuration
On
5.8 V to 20 V
OFF (OVP)
Table 2. CC SWITCH TRUTH TABLE CONFIGURATION
/OE
SEL
VDD
HSD+ / HSD−
CC
1
0
Not Valid
X (Open/High−Z)
Dead Battery
0
0
Not Valid
X (Open/High−Z)
Dead Battery
1
X
Valid
X (Open/High−Z)
On
0
0
Valid
HSD1+ / HSD1−
On
0
1
Valid
HSD2+ / HSD2−
On
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5
FUSB252
ABSOLUTE MAXIMUM RATINGS
Symbol
Min
Max
Unit
VVDD
Supply Voltage from VDD
Parameter
−0.5
12.0
V
VVICC
VICCx, to GND
−0.5
24
V
VSW
VHSD±, to GND
−5
16
V
VOCC, VSW
VOCCx VHSDx± to GND
−0.5
6
V
VCONTROL
DC Input Voltage (S, /OE)
−0.5
VVDD
V
ICCSW
DC CC Switch Current
1.25
A
IUSBSW
DC Output Current
100
mA
IIK
TSTORAGE
DC Input Diode Current
−50
Storage Temperature Range
−65
mA
+150
°C
TJ
Maximum Junction Temperature
+150
°C
TL
Lead Temperature (Soldering, 10 seconds)
+260
°C
ESD
IEC 61000−4−2 System ESD
IEC 61000−4−5 Surge ESD
Human Body Model, JEDEC
JESD22−A114
Charged Device Model,
JEDEC LESD22−C101
Connector Pins
(VVDD, VICCx, VHSD±)
Air Gap
15
Contact
8
kV
VICCx to GND
−24
24
V
VHSD± to GND
−16
16
V
Power to GND
4
kV
External Pins to GND
(VHSD±, VICCx)
System Side Pin
(VHSDx±, VOCCx, S, /OE, FLAGB)
2
All Pins
1
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Typ
Max
Unit
2.7
4.2
VVDD
Supply Voltage
5.5
V
VICC
Type C Input Voltage
0
5.5
V
VOCC
Type C Output Voltage
0
5.5
V
ICCSW
Maximum CC Switch Current
1
A
VCNTRL
VSW
TA
Control Input Voltage (SEL, /OE)
−0.5
VVDD
V
HSD/USB Switch I/O Voltage
−0.5
4.5
V
Operating Temperature
−40
+85
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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6
FUSB252
DC CHARACTERISTICS (Unless otherwise specified: Recommended TA and TJ temperature ranges. All typical values are at
TA = 25°C and VDD = 4.2 V unless otherwise specified.)
TA = −40°C to +85°C
TJ = −40°C to +125°C
Symbol
Characteristic
VDD (V)
Conditions
Min
Typ
Max
Unit
BASIC OPERATION DEVICE
ICC
IOFF
Quiescent Supply Current
Power−Off Leakage Current
2.7 to 5.5
/OE = L, IOUT = 0
9
/OE = H, IOUT = 0
9
0
mA
3
mA
mA
BASIC OPERATION CC SWITCH
Dead Battery Supply Current
0 to UVLO
Dead Battery State Supply
Current
15
CC Path On Resistance
2.7 to 5.5
IOUT = 200 mA
350
480
mW
VOV_TRIP
Input OVP Lockout
2.7 to 5.5
VICC Rising
5.65
6.20
V
VOV_HYS
Input OVP Hysteresis
2.7 to 5.5
Under−Voltage Lockout
2.7 to 5.5
ISD(DB)
RON
VICC Falling
VUVLO
TSD
Thermal Shutdown (Note 1)
5.3
0.35
VDD Rising
2.55
VDD Falling
2.5
Shutdown Threshold
150
Return from Shutdown
130
Hysteresis
Rd
Dead Battery Pull−Down Resistance
0 to UVLO
V
2.70
V
°C
20
Dead Battery Resistance
4.08
Voltage on Pin
0.25
5.10
6.12
kW
2.6
V
5.0
V
BASIC OPERATION HSD SWITCH
VOV_TRIP
Input OVP Lockout
2.7 to 5.5
VHSD± Rising
4.4
VHSD± Falling
4.1
VOV_HYS
Input OVP Hysteresis
2.7 to 5.5
0.3
V
VUV_TRIP
Input Under−Voltage Lockout
2.7 to 5.5
−1.2
V
VIH
Input Voltage High
2.7 to 5.5
VIL
Input Voltage Low
2.7 to 5.5
IIN
Control Input Leakage
2.7 to 5.5
IOZ
Off State Leakage
RON
DRON
1.3
V
0.5
VSW = 0 to VDD
V
0.1
mA
2
mA
100
nA
4.2
0 ≤ HSDn ≤ 3.6 V
4.2
0 ≤ HSD1n±,
HSD2n± ≤ 3.6 V
HS Switch On Resistance
4.2
VSW = 0.4 V, ION = −8 mA
5
W
HS Delta RON
4.2
VSW = 0.4 V, ION = −8 mA
0.1
W
1. Guaranteed by characterization, not production tested.
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7
FUSB252
AC CHARACTERISTICS (Unless otherwise specified: Recommended TA and TJ temperature ranges. All typical values are at
TA = 25°C and VDD = 3.8 V unless otherwise specified.)
TA = −40°C to +85°C
TJ = −40°C to +125°C
Symbol
Characteristic
VDD (V)
Conditions
Min
Typ
Max
Unit
0.5
1.0
ms
CC SWITCH TIMING PARAMETER
tOVP
Response Time (Note 2)
tON
Turn−On Time
TMBB
Make−Before−Break
2.7 to 5.5
2.7 to 5.5
IOUT = 0.2 A, CL = 200 pF,
VICCx 5 V to 6 V
VDD Rising 2 V to 3 V
25
ms
VDD Rising 2 V to 3 V
600
ns
100
pF
MHz
CC SWITCH CAPACITANCE
CON
Switch Path On Capacitance (Note 2)
2.7 to 5.5
CC SWITCH BANDWIDTH
BW
PD Traffic Bandwidth (Note 2)
2.7 to 5.5
RL = 50 W, CL = 200 pF
25
HSD SWITCH TIMING PARAMETER
tOVP
Response Time (Note 2)
2.7 to 5.5
IOUT = 0.2 A, VD± 4 V to 5V
0.5
1.0
tON
Turn−On Time, /OE to Output (Note 2)
2.7 to 5.5
RL = 50 W, CL = 5 pF,
VSW = 0.8 V
25
tOFF
Turn−Off Time, /OE to Output (Note 2)
2.7 to 5.5
RL = 50 W, CL = 5 pF,
VSW = 0.8 V
100
tPD
Propagation Delay (Note 2)
2.7 to 5.5
RL = 50 W, CL = 5 pF
0.25
ns
TBBM
Break−Before−Make (Note 2)
2.7 to 5.5
RL = 50 W, CL = 5 pF,
VSWx = 0.8 V SEL = H ↔ L
100
ms
OIRR
Off Isolation
2.7 to 5.5
RL = 50 W, f = 240 MHz
−25
dB
Xtalk
Non−Adjacent Channel Crosstalk
2.7 to 5.5
RL = 50 W, f = 240 MHz
−40
dB
1.5
pF
4
pF
2.5
pF
MHz
ms
ms
400
ns
HSD SWITCH CAPACITANCE
CIN
Control Pin Input Capacitance (Note 2)
0
CON
HSD+ / HSD− On Capacitance (Note 2)
2.7 to 5.5
/OE = L, f = 240 MHz
COFF
HSD1x / HSD2x Off Capacitance
(Note 2)
2.7 to 5.5
/OE = H
2.7 to 5.5
RL = 50 W, CL = 0 pF
1400
2.7 to 5.5
RL = 50 W, CL = 5 pF
560
Skew of Opposite Transitions
of the Same Output (Note 2)
RL = 50 W, CL = 5 pF
25
ps
Total Jitter (Note 2)
RL = 50 W, CL = 5 pF,
tR = tF = 500 ps (10−90%) at
480 Mbps (PRBS = 215 − 1)
200
ps
USB SWITCH BANDWIDTH
BW
−3 db Bandwidth (Note 2)
USB HIGH−SPEED−RELATED
tSK(P)
tJ
2. Guaranteed by characterization, not production tested.
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8
FUSB252
OPERATION AND APPLICATION DESCRIPTION
Out of Spec Surge/Spike Voltage due to Hot Plug
Application Specific Schematic
• Place a 5 V to 6 V rated Zener TVS diode such as
The FUSB252 protects end systems against 20 V DC on
the CC pin, in cases where the FUSB252 is tested to mimic
a hot plug event, a fully charged cable connected to a power
supply set to 20 V is used to zap the VICC pins of the device.
In these cases, the inductance of the cable causes voltage
spikes that are higher than the absolute maximum ratings of
the of the VICC pins. These voltages can cause damage to
the VOCC pins. This scenario does not occur in normal
usage. The Type−C specification prevents the plug from
having 20 V on VBUS from a PD source prior to a PD
contract being completed. When the 20 V potential is on
VBUS and shorted to the CC pin, it causes a detach and the
voltage spikes are less likely to occur. The following
reference circuit is required when the application calls for
additional protection to protect against such event as hot
plug.
•
(CZRF52C5V6 or CD1005−Z5V1) on the VOCC pin,
and a 5 W resistor to device ground to prevent the
FUSB252 from being damaged during these tests.
With this additional protection if is also important to
select the right external VICC IEC TVS for the best
overall performance.
Without the additional protection the device by itself
can withstand up to 9 V under the same hot plug
condition.
VDD
VDD
CC1
CC2
SEL
VICC1
VOCC2
VICC2
/OE
SEL
5.6 V Zener
D1+
D1−
D2+
D2−
IEC TVS
FUSB252
INTB / FLAGB
HSD1+
FLAGB
Type C Connector
/OE
VOCC1
HSD+
HSD1−
HSD−
HSD2+
HSD2−
5W
IEC TVS
GND
Figure 6. Reference Schematic
Over−Voltage Protection
Fault Reporting
When over−voltage event is detected, device will activate
OVP to shutdown the switch within tOVP, as well as signal
the FLAGB to indicate there is OV event to the system.
Upon the detection of an over−voltage event, the
INTB/FLAGB signals the fault by activating LOW.
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9
FUSB252
Type−C Solution Reference
USB Type−C
Connector
VBUS
VBUS
VICC1
VOCC1
VICC2
VOCC2
SBU1
PMIC/
Charger
OVP
VCON N
FUSB302B
I2C
FUSB252
SBU2
D+/D−
AP/MCU
TX1P/M
USB2.0 PHY
RX1P/M
TX2P/M
FUSB340
USB3.0 PHY
RX2P/M
Figure 7. Example of Type−C Solution Reference (SBU)
USB Type−C
Connector
VBUS
VBUS
VICC1
VOCC1
VICC2
VOCC2
DM
PMIC/
Charger
OVP
VCON N
I2C
FUSB302B
FUSB252
DP
AP/MCU
TX1P/M
USB2.0 PHY
RX1P/M
TX2P/M
FUSB340
USB3.0 PHY
RX2P/M
Figure 8. Example of Type−C Solution Reference (USB)
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10
FUSB252
TEST DIAGRAMS
VON
NC
IDn(OFF)
A
HSDn
VSW
Dn
Select
VSW
ION
GND
GND
VSel = 0 or VCC
Select
GND
VSel = 0 or VCC
NOTE:
Each switch port is tested separately.
RON = VON / ION
Figure 9. On Resistance
Figure 10. Off Leakage
tRISE = 2.5 ns
tFALL = 2.5 ns
HSDn
Dn
VCC
VSW
GND
RL
CL
RS
VOUT
Input − V/OE, VSel
10%
GND
GND
NOTE:
90%
Output − VOUT
GND
VCC/2
VCC/2
VOH
VSel
90%
90%
VOL
tON
10%
90%
tOFF
RL , RS, and CL are functions of the application
environment (see AC Tables for specific values) CL
includes test fixture and stray capacitance.
Figure 11. AC Test Circuit Load
Figure 12. Turn−On / Turn−Off Waveforms
tRISE = 500 ps
tFALL = 500 ps
400 mV
Input
50%
+400 mV
50%
90%
0V
tPLH
tPHL
−400 mV
VOH
Output
50%
90%
0V
10%
10%
50%
VOL
Output
tPHL
Figure 13. Propagation Delay (tRtF − 500 ps)
tPLH
Figure 14. Intra−Pair Skew Test tSK(P)
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11
FUSB252
TEST DIAGRAMS (continued)
tRISE = 2.5 ns
VCC
HSDn
Dn
VSW1
0V
VOUT
CL
VSW2
GND
RL
10%
VOUT
GND
GND
90%
VCC/2
Input − VSel
0.9 * Vout
0.9 * Vout
RS
tBMM
NOTE:
VSel
GND
RL , RS, and CL are functions of the application
environment (see AC Tables for specific values)
CL includes test fixture and stray capacitance.
Figure 15. Break−Before−Make Interval Timing
Network Analyzer
RS
VIN
Network Analyzer
RS
RT
VS
GND
VSel
GND
VSel
GND
GND
RT
VOUT
GND
VS
GND
GND
GND
GND
RT
VOUT
GND
GND
NOTE:
VIN
Off isolation = 20 Log (VOUT / VIN)
RS and RT, are functions of the application environment
(see AC Tables for specific values)
NOTE:
RS and RT, are functions of the application environment
(see AC Tables for specific values)
Figure 17. Channel Off Isolation
Figure 16. Bandwidth
Network Analyzer
RS
NC
VIN
GND
VS
VSel
GND
RT
GND
GND
GND
NOTE:
RT
VOUT
RS and RT, are functions of the application environment (see AC
GND
Tables for specific values)
Crosstalk = 20 Log (VOUT / VIN)
Figure 18. Non−Adjacent Channel−to−Channel Crosstalk
Capacitance
Meter
Capacitance
Meter
HSDn
HSDn
S = LOW or HIGH
S = LOW or HIGH
OE = HIGH
OE = LOW
Dn
Dn
Figure 20. Channel On Capacitance
Figure 19. Channel Off Capacitance
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12
FUSB252
USB, USB−C, USB Type−C and the USB logos are registered trademarks of USB Implementers Forum, Inc.
onsemi is licensed by the Philips Corporation to carry the I2C bus protocol.
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13
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
UQFN16 1.8x2.6, 0.4P
CASE 523BF
ISSUE O
DOCUMENT NUMBER:
DESCRIPTION:
98AON13709G
UQFN16 1.8x2.6, 0.4P
DATE 31 OCT 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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