FXL2SD106BQX

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This literature is subject to all applicable copyright laws and is not for resale in any manner. FXL2SD106 Low-Voltage Dual-Supply 6-Bit Voltage Translator with Auto-Direction Sensing Features General Description – Bi-Directional Interface between Two Levels: 1.1V and 3.6V – Fully Configurable: Inputs and Outputs Track VCC Level – Non-Preferential Power-up; Either VCC May Be Powered-up First – Outputs Remain in 3-State until Active VCC Level is Reached – Outputs Switch to 3-State if Either VCC is at GND – Power-Off Protection – Bus hold on Data Inputs Eliminates Need for Pullup Resistors (Do NOT Use Resistors on the A or B Ports) – OE and CLK IN are Referenced to VCCA Voltage – Packaged in 16-Terminal DQFN (2.5mm x 3.5mm) – Direction Control Not Needed – 80 Mbps Throughput Translating between 1.8V and 2.5V – ESD Protection Exceeds: – 12kV HBM (B port I/O to GND) (per JESD22-A114 & Mil Std 883e 3015.7) – 8kV HBM (A port I/O to GND) (per JESD22-A114 & Mil Std 883e 3015.7) – 1kV CDM (per ESD STM 5.3) The FXL2SD106 is a configurable dual-voltage-supply translator designed for both uni-directional and bidirectional voltage translation between two logic levels. The device allows translation between voltages as high as 3.6V to as low as 1.1V. The A port tracks the VCCA level and the B port tracks the VCCB level. This allows for bi-directional voltage translation over a variety of voltage levels: 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V. The device remains in 3-state until both VCC reach active levels, allowing either VCC to be powered-up first. Internal power-down control circuits place the device in 3state if either VCC is removed. The OE input, when low, disables both A and B ports by placing them in a 3-state condition. The FXL2SD106 is designed so that OE and CLK IN are supplied by VCCA. The device senses an input signal on A or B port automatically. The input signal is transferred to the other port. The FXL2SD106 is not designed for SD card applications. The internal bus hold circuitry conflicts with pull-up resistors. SD cards have internal pull-up resistors on the CD/DAT3 pins. Ordering Information Order Number Package Number FXL2SD106BQX MLP16E © 2008 Fairchild Semiconductor Corporation FXL2SD106 • Rev. 1.8.1 Package Description 16-Terminal Depopulated Quad Very-Thin Flat Pack, No Leads (DQFN), JEDEC MO-241, 2.5mm x 3.5mm www.fairchildsemi.com FXL2SD106 — Low-Voltage Dual-Supply 6-Bit Voltage Translator with Auto-Detection Sensing June 2011 Functional Diagram VCCA VCCA VCCB 1 CLK IN 16 2 VCCB OE 15 CLK OUT A0 3 14 B0 A1 4 13 B1 A2 5 12 B2 A3 6 11 B3 A0 – A4 B0 – B4 CLK IN CLK OUT Function Table Control Outputs OE A4 7 10 8 9 OE GND B4 HIGH Logic Level Normal Operation Output Enable Input FXL translators offer an advantage in that either VCC may be powered up first. This benefit derives from the chip design. When either VCC is at 0 volts, outputs are in a high-impedance state. The control input (OE) is designed to track the VCCA supply. A pull-down resistor tying OE to GND should be used to ensure that bus contention, excessive currents, or oscillations do not occur during power-up / power-down. The size of the pull-down resistor is based upon the current-sinking capability of the device driving the OE pin. GND Ground The recommended power-up sequence is the following: B4–B0 B-Side Inputs or 3-State Outputs 1. Apply power to the first VCC. Number Name 1 VCCA 2 CLK IN A-Side Input 3–7 A0–A4 A-Side Inputs or 3-State Outputs 8 OE 9 10–14 16 3-State Power-Up/Power-Down Sequencing Pin Description 15 LOw Logic Level Description A-Side Power Supply 2. Apply power to the second VCC. CLK OUT 3-State Output VCCB B-Side Power Supply 3. Drive the OE input high to enable the device. The recommended power-down sequence is the following: 1. Drive OE input low to disable the device. 2. Remove power from either VCC. 3. Remove power from other VCC. © 2008 Fairchild Semiconductor Corporation FXL2SD106 • Rev. 1.8.1 www.fairchildsemi.com 2 FXL2SD106 — Low-Voltage Dual-Supply 6-Bit Votlage Translator with Auto-Direction Sensing Connection Diagram Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VCCA, VCCB Parameter Rating Supply Voltage –0.5V to +4.6V VI DC Input Voltage I/O Port A I/O Port B OE, CLK IN –0.5V to +4.6V –0.5V to +4.6V –0.5V to +4.6V VO Output Voltage(1) Outputs 3-STATE Outputs Active (An) Outputs Active (Bn, CLK OUT) –0.5V to +4.6V –0.5V to VCCA + 0.5V –0.5V to VCCB + 0.5V IIK DC Input Diode Current at VI  0V –50mA IOK DC Output Diode Current at VO  0V VO  VCC –50mA +50mA IOH / IOL ICC TSTG DC Output Source/Sink Current –50mA / +50mA DC VCC or Ground Current per Supply Pin Storage Temperature Range ±100mA –65°C to +150°C Note: 1. IO Absolute Maximum Rating must be observed. Recommended Operating Conditions(2) The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol VCCA or VCCB Parameter 1.1V to 3.6V Input Voltage Port A Port B OE, CLK IN 0.0V to 3.6V 0.0V to 3.6V 0.0V to VCCA Dynamic Output Current in IOH/IOL with VCC at 3.0V to 3.6V 2.3V to 2.7V 1.65V to 1.95V 1.4V to 1.65V 1.1V to 1.4V Static Output Current IOH/IOL with VCC at 1.1V to 3.6V TA t / V Rating Power Supply Operating Free Air Operating Temperature ±18.0mA ±11.8mA ±7.4mA ±5.0mA ±2.6mA ±20.0µA –40°C to +85°C Maximum Input Edge Rate VCCA/B  1.1V to 3.6V 10ns/V Note: 2. All unused inputs and I/O pins must be held at VCCI or GND. © 2008 Fairchild Semiconductor Corporation FXL2SD106 • Rev. 1.8.1 www.fairchildsemi.com 3 FXL2SD106 — Low-Voltage Dual-Supply 6-Bit VoltageTranslator with Auto-Direction Sensing Absolute Maximum Ratings Symbol VIH VIL VOH (3) VOL(3) II(ODH)(4) II(ODL)(5) Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage VCCA (V) VCCB (V) 1.4–3.6 1.1–3.6 1.1–1.4 1.1–3.6 1.1–3.6 1.4–3.6 1.1–3.6 1.1–1.4 1.4–3.6 1.1–3.6 1.1 –1.4 1.1–3.6 1.1–3.6 1.4–3.6 1.1–3.6 1.1–1.4 1.65–3.6 1.1–3.6 1.1–1.4 1.1–3.6 1.1–3.6 1.65–3.6 1.1–3.6 1.1–1.4 1.65–3.6 1.1–3.6 1.1–1.4 1.1–3.6 1.1–3.6 1.65–3.6 1.1–3.6 1.1–1.4 Bushold Input Overdrive High Current Conditions Data inputs An, CLK IN, OE Data inputs Bn Min. Typ. Max. 0.6 x VCCA Units V 0.9 x VCCA 0.6 x VCCB 0.9 x VCCB Data inputs An, CLK IN, OE 0.35 x VCCA Data inputs Bn 0.35 x VCCB V 0.1 x VCCA 0.1 x VCCB Data outputs An, IHOLD = –20µA 0.75 x VCCA Data outputs Bn, IHOLD = –20µA 0.75 x VCCB V 0.8 0.8 Data outputs An, IHOLD = 20µA 0.3 Data outputs Bn, IHOLD = 20µA 0.3 Data inputs An, Bn 0.2 x VCCA 0.2 x VCCB 3.6 3.6 2.7 2.7 300 1.95 1.95 200 1.6 1.6 120 1.4 1.4 80 450 µA 3.6 3.6 2.7 2.7 -300 1.95 1.95 -200 1.6 1.6 -120 1.4 1.4 -80 1.1–3.6 3.6 OE, CLK IN, VI = VCCA or GND ±1.0 µA 0 3.6 An, VO = 0V to 3.6V ±2.0 µA 3.6 0 Bn, CLK OUT, VO = 0V to 3.6V ±2.0 3.6 3.6 An, Bn, CLK OUT, VO = 0V or 3.6V, OE = VIL ±2.0 3.6 0 An, VO = 0V or 3.6V, OE = Don’t Care ±2.0 0 3.6 Bn, CLK OUT, VO = 0V or 3.6V, OE = Don’t Care ±2.0 Quiescent Supply Current 1.1–3.6 1.1–3.6 VI = VCCI or GND, IO = 0 5.0 µA ICCZ(7) Quiescent Supply Current 1.1–3.6 1.1–3.6 VI = VCCI or GND, IO = 0, OE = VIL 5.0 µA ICCA(7) Quiescent Supply Current 0 1.1–3.6 VI = VCCB or GND; IO = 0 -2.0 µA 1.1–3.6 0 VI = VCCA or GND; IO = 0 2.0 II IOFF IOZ(6) ICCA/B(7)(8) Bushold Input Overdrive Low Current Input Leakage Current Power Off Leakage Current 3-State Output Leakage © 2008 Fairchild Semiconductor Corporation FXL2SD106 • Rev. 1.8.1 Data inputs An, Bn V -450 µA µA www.fairchildsemi.com 4 FXL2SD106 — Low-Voltage Dual-Supply 6-Bit Votlage Translator with Auto-Direction Sensing DC Electrical Characteristics (TA = –40°C to +85°C) Symbol Parameter VCCA (V) VCCB (V) Conditions Max. Units ICCB(7) Quiescent Supply Current 1.1–3.6 0 VI = VCCB or GND; IO = 0 Min. Typ. -2.0 µA 0 1.1–3.6 VI = VCCA or GND; IO = 0 2.0 Notes: 3. This is the output voltage for static conditions. Dynamic drive specifications are given in “Dynamic Output Electrical Characteristics.” 4. An external driver must source at least the specified current to switch LOW-to-HIGH. 5. An external driver must source at least the specified current to switch HIGH-to-LOW. 6. “Don’t Care” indicates any valid logic level. 7. VCCI is the VCC associated with the input side. 8. Reflects current per supply, VCCA or VCCB. Dynamic Output Electrical Characteristics(9) A Port (An) Output Load: CL = 15pF, RL  1M TA = -40°C to +85°C, VCCA = Symbol Parameter 3.0V to 3.6V 2.3V to 2.7V Typ. Typ. Max. Max. 1.65V to 1.95V Typ. trise(10) Output Rise Time A Port 3.0 3.5 tfall(11) Output Fall Time A Port 3.0 3.5 IOHD(10) Dynamic Output Current High -18.0 -11.8 -7.4 IOLD(11) Dynamic Output Current Low +18.0 +11.8 +7.4 Max. 1.4V to 1.6V Typ. 1.1V to 1.3V Max. Typ. Units 4.0 5.0 7.5 ns 4.0 5.0 7.5 ns -5.0 -2.6 mA +5.0 +2.6 mA B Port (Bn, CLK OUT) Output Load: CL = 15pF, RL  1M TA = -40°C to +85°C, VCCB = Symbol Parameter 3.0V to 3.6V 2.3V to 2.7V Typ. Typ. Max. Max. 1.65V to 1.95V Typ. trise(10) Output Rise Time B Port 3.0 3.5 tfall(11) Output Fall Time B Port 3.0 3.5 IOHD(10) Dynamic Output Current High -18.0 -11.8 -7.4 IOLD(11) Dynamic Output Current Low +18.0 +11.8 +7.4 Max. 1.4V to 1.6V Typ. 1.1V to 1.3V Max. Typ. Units 4.0 5.0 7.5 ns 4.0 5.0 7.5 ns -5.0 -2.6 mA +5.0 +2.6 mA Notes: 9. Dynamic Output Characteristics are guaranteed, but not tested. 10. See Figure 5. 11. See Figure 6. © 2008 Fairchild Semiconductor Corporation FXL2SD106 • Rev. 1.8.1 www.fairchildsemi.com 5 FXL2SD106 — Low-Voltage Dual-Supply 6-Bit Votlage Translator with Auto-Direction Sensing DC Electrical Characteristics (TA = –40°C to +85°C) (Continued) VCCA = 3.0V to 3.6V TA = -40°C to +85°C, VCCB = Symbol tPLH, tPHL 3.0V–3.6V 2.3V–2.7V 1.65V–1.95V 1.4V–1.6V Min. Max. Min. Max. Min. Max. Min. Max. Typ. Units A to B 0.2 3.5 0.3 3.9 0.5 5.4 0.6 6.8 22.0 ns B to A 0.2 3.5 0.2 3.8 0.3 5.0 0.5 Parameter 1.1V–1.3V 6.0 15.0 ns tPLH, tPHL CLK IN to CLK OUT 3.0 3.5 4.5 6.0 15.0 ns tPZL, tPZH OE to A, OE to B 1.7 1.7 1.7 1.7 1.7 µs A Port, B Port 0.5 0.5 0.5 1.0 1.0 ns tskew (12) VCCA = 2.3V to 2.7V TA = -40°C to +85°C, VCCB = Symbol tPLH, tPHL 3.0V–3.6V 2.3V–2.7V 1.65V–1.95V 1.4V–1.6V Min. Max. Min. Max. Min. Max. Min. Max. Typ. Units A to B 0.2 3.8 0.4 4.2 0.5 5.6 0.8 6.9 22.0 ns B to A 0.3 3.9 0.4 4.2 0.5 5.5 0.5 6.5 15.0 ns Parameter 1.1V–1.3V tPLH, tPHL CLK IN to CLK OUT 3.5 4.0 4.5 6.5 15.0 ns tPZL, tPZH OE to A, OE to B 1.7 1.7 1.7 1.7 1.7 µs A Port, B Port 0.5 0.5 0.5 1.0 1.0 ns 3.0V–3.6V 2.3V–2.7V 1.65V–1.95V 1.4V–1.6V Min. Max. Min. Max. Min. Max. Min. Max. Typ. Units A to B 0.3 5.0 0.5 5.5 0.8 6.7 0.9 7.5 22.0 ns B to A 0.5 5.4 0.5 5.6 0.8 6.7 1.0 tskew(12) VCCA = 1.65V to 1.95V TA = -40°C to +85°C, VCCB = Symbol tPLH, tPHL Parameter tPLH, tPHL CLK IN to CLK OUT 4.5 tPZL, tPZH OE to A, OE to B 1.7 A Port, B Port 0.5 tskew(12) 1.1V–1.3V 7.0 15.0 ns 6.3 6.7 15.0 ns 1.7 1.7 1.7 1.7 µs 0.5 0.5 1.0 1.0 ns 4.5 VCCA = 1.4V to 1.6V TA = -40°C to +85°C, VCCB = Symbol tPLH, tPHL 3.0V–3.6V 2.3V–2.7V 1.65V–1.95V 1.4V–1.6V 1.1V–1.3V Min. Max. Min. Max. Min. Max. Min. Max. Typ. Units A to B 0.5 6.0 0.5 6.5 1.0 7.0 1.0 8.5 22.0 ns B to A 0.6 6.8 0.8 6.9 0.9 7.5 1.0 8.5 15.0 ns Parameter tPLH, tPHL CLK IN to CLK OUT 6.0 6.5 6.7 8.5 15.0 ns tPZL, tPZH OE to A, OE to B 1.7 1.7 1.7 1.7 1.7 µs A Port, B Port 1.0 1.0 1.0 1.0 1.0 ns tskew(12) Note: 12. Skew is the variation of propagation delay between output signals and applies only to output signals on the same port (An or Bn) and switching with the same polarity (Low-to-High or High-to-Low). See Figure 8. © 2008 Fairchild Semiconductor Corporation FXL2SD106 • Rev. 1.8.1 www.fairchildsemi.com 6 FXL2SD106 — Low-Voltage Dual-Supply 6-Bit VoltageTranslator with Auto-Direction Sensing AC Characteristics TA = -40°C to +85°C, VCCB = 3.0V to 3.6V 2.3V to 2.7V 1.65V to 1.95V 1.4V to 1.6V 1.1V to 1.3V VCCA Min. Min. Min. Min. Typ. Units VCCA = 3.0V to 3.6V 100 100 80 60 20 Mbps VCCA = 2.3V to 2.7V 100 100 80 60 20 Mbps VCCA =1.65V to 1.95V 80 80 60 40 20 Mbps VCCA = 1.4V to 1.6V 60 60 40 40 20 Mbps Typ. Typ. Typ. Typ. Typ. 20 20 20 20 20 VCCA = 1.1V to 1.3V Mbps Note: 13. Maximum data rate is guaranteed but not tested. 14. Maximum data rate is specified in megabits per second. See Figure 7. It is equivalent to two times the F-toggle frequency, specified in megahertz. For example, 100 Mbps is equivalent to 50 MHz. Capacitance TA = +25°C Symbol Parameter Conditions Typical Units CIN Input Capacitance, OE, CLK IN VccA = VccB = GND 4 pF CI/O Input/Output Capacitance VccA = VccB = 3.3V, OE = VccA 5 pF VccA = VccB = 3.3V, Vi = 0V or Vcc, f = 10MHz 25 CPD An Bn, CLK OUT Power Dissipation Capacitance © 2008 Fairchild Semiconductor Corporation FXL2SD106 • Rev. 1.8.1 6 pF www.fairchildsemi.com 7 FXL2SD106 — Low-Voltage Dual-Supply 6-Bit Votlage Translator with Auto-Direction Sensing Maximum Data Rate(13)(14) FXL2SD106 — Low-Voltage Dual-Supply 6-Bit Votlage Translator with Auto-Direction Sensing VCC TEST SIGNAL DUT C1 R1 Output Enable Control Test Input Signal tPLH, tPHL Data Pulses VCCA tPZL 0V Low to High Switch tPZH VCCI Low to High Switch Figure 1. AC Test Circuit AC Load Table © 2008 Fairchild Semiconductor Corporation FXL2SD106 • Rev. 1.8.1 VCCO Cl Rl 1.2V ± 0.1V 15pF 1M 1.5V ± 0.1V 15pF 1M 1.8V ± 0.15V 15pF 1M 2.5V ± 0.2V 15pF 1M 3.3 ± 0.3V 15pF 1M www.fairchildsemi.com 8 Vmi VCCI OUTPUT CONTROL GND tpxx tpxx DATA OUT VCCA Vmi GND tPZL Vmo VCCO DATA OUT VY VOL Input tR = tF = 2.0ns, 10% to 90% Input tR = tF = 2.5ns, 10% to 90%, @ Vi = 3.0V to 3.6V only Input tR = tF = 2.0ns, 10% to 90% Figure 2. Waveform for Inverting and Non-inverting Functions OUTPUT CONTROL Input tR = tF = 2.5ns, 10% to 90%, @ Vi = 3.0V to 3.6V only Figure 3. 3-STATE Output Low Enable Time for Low Voltage Logic Symbol VCCA Vmi GND tPZH DATA OUT VOH Vx Vcc Vmi(15) VCCI / 2 Vmo VCCO / 2 VX 0.9 x VCCO VY 0.1 x VCCO Note: 15. VCCI = VCCA for control pin OE or Vmi = (VCCA / 2). Input tR = tF = 2.0ns, 10% to 90% Input tR = tF = 2.5ns, 10% to 90%, @ Vi = 3.0V to 3.6V only Figure 4. 3-STATE Output High Enable Time for Low Voltage Logic trise VOH VOH tfall 80% x VCCO 80% x VCCO VOUT VOUT 20% x VCCO 20% x VCCO VOL VOL Time Time IOHD ≈ (CL +CI/O) x ΔVOUT (20% – 80%) x VCCO = (CL +CI/O) x Δt tRISE IOLD ≈ (CL +CI/O) x Figure 5. Active Output Rise Time and Dynamic Output Current High Figure 6. Active Output Fall Time and Dynamic Output Current Low Vmo Vmo GND tskew VCCI VCCI/2 VCCO DATA OUTPUT tW DATA IN ΔVOUT (80% – 20%) x VCCO = (CL +CI/O) x tFALL Δt tskew VCCI/2 GND DATA OUTPUT Max. data rate, f = 1/tW Figure 7. Maximum Data Rate VCCO Vmo Vmo GND tskew = (tpHLmax – tpHLmin) or (tpLHmax – tpLHmin) Figure 8. Output Skew Time © 2008 Fairchild Semiconductor Corporation FXL2SD106 • Rev. 1.8.1 www.fairchildsemi.com 9 FXL2SD106 — Low-Voltage Dual-Supply 6-Bit VoltageTranslator with Auto-Direction Sensing DATA IN FXL2SD106 — Low-Voltage Dual-Supply 6-Bit VoltageTranslator with Auto-Direction Sensing Physical Dimensions Figure 9. 16-Terminal Depopulated Quad, Very-Thin Flat Pack, No Leads (DQFN), JEDEC MO-241 2.5mm x 3.5mm Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ For current tape and reel specifications, visit Fairchild Semiconductor’s packaging area: http://www.fairchildsemi.com/ms/MS/MS-522.pdf © 2008 Fairchild Semiconductor Corporation FXL2SD106 • Rev. 1.8.1 www.fairchildsemi.com 10 FXL2SD106 — Low-Voltage Dual-Supply 6-Bit Voltage Translator with Auto-Direction Sensing 11 www.fairchildsemi.com © 2008 Fairchild Semiconductor Corporation FXL2SD106 • Rev. 1.8.1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. 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