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FXL2T245
Low-Voltage, Dual-Supply, 2-Bit, Signal Translator
with Configurable Voltage Supplies and Signal Levels
and 3-State Outputs
Features
Description
Bi-Directional Interface between any 2 Levels from
1.1 V to 3.6 V
Fully Configurable, Inputs Track VCC Level
Outputs Remain in 3-State until Active VCC Level is
Reached
The FXL2T245 is a configurable, dual-voltage-supply
translator designed for uni-directional and bi-directional
voltage translation between two logic levels. The device
allows translation between voltages as high as 3.6 V to
as low as 1.1 V. The A port tracks the VCCA level and the
B port tracks the VCCB level. This allows for bi-directional
voltage translation over a variety of voltage levels:
1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3.3 V.
Outputs Switch to 3-State if either VCC is at GND
Packaged in 10-Lead MicroPak
(1.6 mm x 2.1 mm) Package
ESD Protection Exceeds:
Non-Preferential Power-up Sequencing; either VCC
maybe Powered-up First
Power-Off Protection
Control Inputs (T/R, OE) Levels are Referenced to
VCCA Voltage
The device remains in 3-state until both VCCs reach
active levels, allowing either VCC to be powered-up first.
Internal power-down control circuits place the device in
3-state if either VCC is removed.
The Transmit / Receive (T/R) input determines the
direction of data flow through the device. The OE input,
when HIGH, disables both the A and B ports by placing
them in a 3-state condition. The FXL2T245 is designed
so control pins T/R and OE are supplied by VCCA.
- 4 kV HBM ESD JESD22-A114 & Mil Std 883e
3015.7)
- 8kV HBM I/O to GND ESD (per JESD22-A114 &
Mil Std 883e 3015.7)
- 1 kV CDM ESD (per ESD STM 5.3)
- 200 V MM ESD (per JESD22-A115 & ESD
STM5.2)
Ordering Information
Part Number
Operating
Temperature Range
FXL2T245L10X
-40°C to +85°C
© 2005 Fairchild Semiconductor Corporation
FXL2T245 • Rev. 1.0.2
Package
10-Lead, MicroPak™, JEDEC MO255,1.6 x 2.1 mm
Packing
Method
Tape and Reel
www.fairchildsemi.com
FXL2T245 — Low Voltage Dual Supply 2-Bit Signal Translator with Configurable Voltage Supplies
April 2014
FXL2T245 — Low Voltage Dual Supply 2-Bit Signal Translator with Configurable Voltage Supplies
Pin Configuration
Figure 1.
Pin Assignments
Pin Descriptions
Pin#
Pin Name
Description
1
VCCA
2
A0
Side A Inputs or 3-State Outputs
3
A1
Side A Inputs or 3-State Outputs
Transmit/Receive Input
Side A Power Supply
4
T/R
5, 6
GND
Ground
7
O/E
Output Enable Input
8
B1
Side B Inputs or 3- State Outputs
9
B0
Side B Inputs or 3-State Outputs
10
VCCB
Side B Power Supply
Truth Table
Inputs
OE
Outputs
T/R
LOW
LOW
Bus B Data to Bus A
LOW
HIGH
Bus A Data to Bus B
Notes:
1. LOW = low voltage level.
2. HIGH = high voltage level.
© 2005 Fairchild Semiconductor Corporation
FXL2T245 • Rev. 1.0.2
www.fairchildsemi.com
2
Power-Up / Power-Down Sequencing
Due to the chip design, the FXL2T245 translator offers
the advantage of either VCC being powered up first.
When either VCC is at 0 V, outputs are in a highimpedance state. The control inputs (T/R and OE) are
designed to track the VCCA supply. A pull-up resistor
tying OE to VCCA should be used to ensure that bus
contention, excessive currents, or oscillations do not
occur during power-up/power-down. The size of the pullup resistor is based upon the current-sinking capability
of the OE driver.
The recommended power-down sequence is:
1.
Drive OE input HIGH to disable the device.
2.
Remove power from either VCC.
3.
Remove power from the other VCC.
The recommended power-up sequence is:
1.
Apply power to either VCC.
2.
Apply power to the T/R input (logic HIGH for A-to-B
operation; logic LOW for B-to-A operation) and to
the respective data inputs (A port or B port). This
may occur at the same time as step 1.
3.
Apply power to the other VCC.
4.
Drive the OE input LOW to enable the device.
© 2005 Fairchild Semiconductor Corporation
FXL2T245 • Rev. 1.0.2
www.fairchildsemi.com
3
FXL2T245 — Low Voltage Dual Supply 2-Bit Signal Translator with Configurable Voltage Supplies
Functional Description
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
VCCA
VCCB
VI
VO
IIK
IOK
IOH/IOL
ICC
TSTG
ESD
Parameter
Conditions
Min.
-0.5
4.6
-0.5
4.6
I/O Port A
-0.5
4.6
I/O Port B
-0.5
4.6
Control Inputs (T/R, OE)
-0.5
4.6
Output 3-State
-0.5
4.6
Output Active (An)
-0.5 to VCCA
0.5
Output Active (Bn)
-0.5 to VCCB
0.5
Supply Voltage
DC Input Voltage
Output Voltage
(3)
DC Input Diode Current
DC Output Diode Current
Max. Unit
VI < 0 V
-50
VO < 0 V
-50
VO > VCC
+50
V
V
V
mA
mA
DC Output Source/Sink Current
±50
mA
DC VCC or Ground Current per Supply Pin
±100
mA
+150
°C
Storage Temperature Range
Electrostatic Discharge
Capability
-65
Human Body Model,
JESD22-A114, Mil Std 883e 3015.7
All Pins
4
I/O to GND
8
Charged Device Model, JESD22-C101,STM 5.3
kV
1
Machine Model, JESD22-A115,STM 5.2
200
V
Note:
3. I/O absolute maximum ratings must be observed.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance. Fairchild does not recommend exceeding them or
designing to Absolute Maximum Ratings.
Symbol
VCC
VI
IOH/IOL
Parameter
Power Supply
Input Voltage
Output Current
Conditions
Operating VCCA or VCCB
Min.
Max.
Unit
V
1.1
3.6
Port A
0
3.6
Port B
0
3.6
Control Inputs (T/R, OE)
0
VCCA
VCC
3.0 V to 3.6 V
±24
2.3 V to 2.7 V
±18
1.65 V to 1.95 V
±6
1.40 V to 1.65 V
V/t
Operating Temperature, Free Air
Minimum Input Edge Rate
±0.5
-40
VCCA/B =1.1 V to 3.6 V
mA
±2
1.1 V to 1.4 V
TA
V
+85
°C
10
ns/V
Note:
4. All unused inputs must be held at VCCI or GND.
© 2005 Fairchild Semiconductor Corporation
FXL2T245 • Rev. 1.0.2
www.fairchildsemi.com
4
FXL2T245 — Low Voltage Dual Supply 2-Bit Signal Translator with Configurable Voltage Supplies
Absolute Maximum Ratings
Symbol
Parameter
Conditions
VCCO (V)
Data Inputs An, Bn
VIH
HIGH Level
(5)
Input
1.10 to 3.60
Control Pins /OE, T/R
(Referenced to VCCA)
VCCI (V)
Min.
2.70 to 3.60
2.00
2.30 to 2.70
1.60
1.65 to 2.30
0.65 x VCCI
1.40 to 1.65
0.65 x VCCI
1.10 to 1.40
0.90 x VCCI
2.70 to 3.60
2.00
2.30 to 2.70
1.60
1.65 to 2.30
0.65 x VCCA
1.40 to 1.65
0.65 x VCCA
1.10 to 1.40
0.90 x VCCA
2.70 to 3.60
Data Inputs An, Bn
VIL
LOW Level
(5)
Input
1.10 to 3.60
Control Pins /OE, T/R
(Referenced to VCCA)
VOH
VOL
HIGH Level
(6)
Output
LOW Level
(6)
Output
Max.
Unit
V
0.80
2.30 to 2.70
0.70
1.65 to 2.30
0.35 x VCCI
1.40 to 1.65
0.35 x VCCI
1.10 to 1.40
0.10 x VCCI
2.70 to 3.60
0.80
2.30 to 2.70
0.70
1.65 to 2.30
0.35 x VCCI
1.40 to 1.65
0.35 x VCCI
1.10 to 1.40
0.10 x VCCI
IOH = -100 µA
1.10 to 3.60
1.10 to 3.60
VCC0 - 0.20
IOH = -12 mA
2.70
2.70
2.20
IOH = -18 mA
3.00
3.00
2.40
IOH = -24 mA
3.00
3.00
2.20
IOH = -6 mA
2.30
2.30
2.00
IOH = -12 mA
2.30
2.30
1.80
IOH = -18 mA
2.30
2.30
1.70
IOH = -6 mA
1.65
1.65
1.25
IOH = -2 mA
1.40
1.40
1.05
IOH = -0.5 mA
1.10
1.10
0.75 x VCC0
IOL = 100 µA
1.10 to 3.60
1.10 to 3.60
0.20
IOL = 12 mA
2.70
2.70
0.40
IOL = 18 mA
3.00
3.00
0.40
IOL = 24 mA
3.00
3.00
0.55
IOL = 12 mA
2.30
2.30
0.40
IOL = 18 mA
2.30
2.30
0.60
IOL = 6 mA
1.65
1.65
0.30
IOL = 2 mA
1.40
1.40
0.35
IOL = 0.5 mA
1.10
1.10
0.30 x VCC0
V
V
V
Continued on the following page…
© 2005 Fairchild Semiconductor Corporation
FXL2T245 • Rev. 1.0.2
www.fairchildsemi.com
5
FXL2T245 — Low Voltage Dual Supply 2-Bit Signal Translator with Configurable Voltage Supplies
Electrical Characteristics
Symbol
IL
IOFF
IOZ
Parameter
Power Off
Leakage
Current
3-State Output
Leakage
(0 ≤ VO ≤ 3.6 V,
VI=VIH or VIL)
ICCA/B
VCCI (V)
3.60
An,
VI or VO=0 V to 3.6 V
Bn,
VI or VO=0 V to 3.6 V
An, Bn, /OE=VIH
Quiescent
Supply
(8)
Current
Min.
Max.
Unit
1.10 to 3.60
±1.0
µA
3.60
0
±10
µA
0
3.60
±10
3.60
3.60
±10
Bn, /OE= Don’t Care
(7)
3.60
0
±10
An, /OE= Don’t Care
(7)
0
3.60
±10
1.10 to 3.60
1.10 to 3.60
20
1.10 to 3.60
1.10 to 3.60
20
1.10 to 3.60
0
-10
0
1.10 to 3.60
10
0
1.10 to 3.60
-10
1.10 to 3.60
0
10
3.60
3.60
500
VI=VCCI or GND; IO=0
ICCZ
ICCB
VCCO (V)
Input Leakage
Current, Control VI=VCCA or GND
Pins
ICCA/B
ICCA
Conditions
VI=VCCA or GND; IO=0
VI=VCCB or GND; IO=0
Increase in ICC
per Input; Other
VIH=3.0 V
Inputs at VCC or
GND
µA
µA
µA
Notes:
5. VCCI = the VCC associated with the data input under test.
6. VCCO = the VCC associated with the output under test.
7. Don’t care = any valid logic level.
8. Reflects current per supply, VCCA or VCCB.
© 2005 Fairchild Semiconductor Corporation
FXL2T245 • Rev. 1.0.2
www.fairchildsemi.com
6
FXL2T245 — Low Voltage Dual Supply 2-Bit Signal Translator with Configurable Voltage Supplies
Electrical Characteristics
TA= -40 to +85°C
Symbol
Parameter
VCCB=3.0 V
to 3.6 V
VCCB=2.3 V
to 2.7 V
VCCB=1.65 V
to 1.95 V
VCCB=1.4 V
to 1.6 V
VCCB=1.1 V
to 1.3V
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Propagation
Delay A to B
0.2
3.5
0.3
3.9
0.5
5.4
0.6
6.8
1.4
22.0
Propagation
Delay B to A
0.2
3.5
0.2
3.8
0.3
4.0
0.5
4.3
0.8
13.0
Output Enable
/OE to B
0.5
4.0
0.7
4.4
1.0
5.9
1.0
6.4
1.5
17.0
Output Enable
/OE to A
0.5
4.0
0.5
4.0
0.5
4.0
0.5
4.0
0.5
4.0
Output Disable
/OE to B
0.2
3.8
0.2
4.0
0.7
4.8
1.5
6.2
2.0
17.0
Output Disable
/OE to A
0.2
3.7
0.2
3.7
0.2
3.7
0.2
3.7
0.2
3.7
Propagation
Delay A to B
0.2
3.8
0.4
4.2
0.5
5.6
0.8
6.9
1.4
22.0
Propagation
Delay B to A
0.3
3.9
0.4
4.2
0.5
4.5
0.5
4.8
1.0
7.0
Output Enable
/OE to B
0.6
4.2
0.8
4.6
1.0
6.0
1.0
6.8
1.5
17.0
Output Enable
/OE to A
0.6
4.5
0.6
4.5
0.6
4.5
0.6
4.5
0.6
4.5
Output Disable
/OE to B
0.2
4.1
0.2
4.3
0.7
4.8
1.5
6.7
2.0
17.0
Output Disable
/OE to A
0.2
4.0
0.2
4.0
0.2
4.0
0.2
4.0
0.2
4.0
Propagation
Delay A to B
0.3
4.0
0.5
4.5
0.8
5.7
0.9
7.1
1.5
22.0
Propagation
Delay B to A
0.5
5.4
0.5
5.6
0.8
5.7
1.0
6.0
1.2
8.0
Output Enable
/OE to B
0.6
5.2
0.8
5.4
1.2
6.9
1.2
7.2
1.5
18.0
Output Enable
/OE to A
1.0
6.7
1.0
6.7
1.0
6.7
1.0
6.7
1.0
6.7
Output Disable
/OE to B
0.2
5.1
0.2
5.2
0.8
5.2
1.5
7.0
2.0
17.0
Output Disable
/OE to A
0.5
5.0
0.5
5.0
0.5
5.0
0.5
5.0
0.5
5.0
Unit
VCCA=3.0 V to 3.6 V
tPLH, tPHL
tPZH, tPZL
tPHZ, tPLZ
ns
ns
ns
VCCA=2.3 V to 2.7 V
tPLH, tPHL
tPZH, tPZL
tPHZ, tPLZ
ns
ns
ns
VCCA=1.65 V to 1.95 V
tPLH, tPHL
tPZH, tPZL
tPHZ, tPLZ
ns
ns
ns
Continued on the following page…
© 2005 Fairchild Semiconductor Corporation
FXL2T245 • Rev. 1.0.2
www.fairchildsemi.com
7
FXL2T245 — Low Voltage Dual Supply 2-Bit Signal Translator with Configurable Voltage Supplies
AC Electrical Characteristics
TA= -40 to +85°C
Symbol
VCCB=3.0 V
to 3.6 V
Parameter
VCCB=2.3 V
to 2.7 V
VCCB=1.65 V
to 1.95 V
VCCB=1.4 V
to 1.6 V
VCCB=1.1 V
to 1.3V
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Min.
Max.
Propagation
Delay A to B
0.5
4.3
0.5
4.8
1.0
6.0
1.0
7.3
1.5
22.0
Propagation
Delay B to A
0.6
6.8
0.8
6.9
0.9
7.1
1.0
7.3
1.3
9.5
Output Enable
/OE to B
1.1
7.5
1.1
7.6
1.3
7.7
1.4
7.9
2.0
20.0
Output Enable
/OE to A
1.0
7.5
1.0
7.5
1.0
7.5
1.0
7.5
1.0
7.5
Output Disable
/OE to B
0.4
6.1
0.4
6.2
0.9
6.2
1.5
7.5
2.0
18.0
Output Disable
/OE to A
1.0
6.0
1.0
6.0
1.0
6.0
1.0
6.0
1.0
6.0
Propagation
Delay A to B
0.8
13.0
1.0
7.0
1.2
8.0
1.3
9.5
2.0
24.0
Propagation
Delay B to A
1.4
22.0
1.4
22.0
1.5
22.0
1.5
22.0
2.0
24.0
Output Enable
/OE to B
1.0
12.0
1.0
9.0
2.0
10.0
2.0
11.0
2.0
24.0
Output Enable
/OE to A
2.0
22.0
2.0
22.0
2.0
22.0
2.0
22.0
2.0
22.0
Output Disable
/OE to B
1.0
15.0
0.7
7.0
1.0
8.0
2.0
10.0
2.0
20.0
Output Disable
/OE to A
2.0
15.0
2.0
12.0
2.0
12.0
2.0
12.0
2.0
12.0
Unit
VCCA=1.4 V to 1.6 V
tPLH, tPHL
tPZH, tPZL
tPHZ, tPLZ
ns
ns
ns
VCCA=1.1 V to 1.3 V
tPLH, tPHL
tPZH, tPZL
tPHZ, tPLZ
ns
ns
ns
Capacitance
Symbol
Parameter
Conditions
TA=+25°C
Typical
Unit
CIN
Input Capacitance (Pins O/E, TR)
VCCA=VCCB=3.3 V, VI=0V or VCCA/B
4
pF
CI/O
Input / Output Capacitance An, Bn Ports VCCA=VCCB=3.3 V, VI=0V or VCCA/B
5
pF
CPD
Power Dissipation Capacitance
20
pF
© 2005 Fairchild Semiconductor Corporation
FXL2T245 • Rev. 1.0.2
VCCA=VCCB=3.3 V, VI=0V or VCC, f=10 MHz
www.fairchildsemi.com
8
FXL2T245 — Low Voltage Dual Supply 2-Bit Signal Translator with Configurable Voltage Supplies
AC Electrical Characteristics
Figure 2. AC Test Circuit
Test
Switch
tPLH,tPHL
tPLZ,tPZL
tPHZ,tPZH
Open
VCC0 • 2 at VCCO=3.3 ±0.3 V, 2.5 V ±0.2 V, 1.8 V ±0.15 V, 1.5 V ±0.1 V, 1.2 V ±0.1 V
GND
Table 1.
AC Load Table
VCC0
CL
RL
Rtr1
1.2 V ±0.1 V
15 pF
2 k
2 k
1.5 V ±0.1 V
15 pF
2 k
2 k
1.8 V ±0.15 V
15 pF
2 k
2 k
2.5 V ±0.2 V
15 pF
2 k
2 k
3.3 V ±0.3 V
15 pF
2 k
2 k
Note:
9. Input tR=tF=2.0 ns, 10% to 90%.
10. Input tR-tF=2.5 ns, 10% to 90%, at VI=3.0 V to
3.6 V only.
Figure 3. Waveform for Inverting and
Non-Inverting Functions
Note:
11. Input tR=tF=2.0 ns, 10% to 90%.
12. Input tR-tF=2.5 ns, 10% to 90%, at VI=3.0 V to 3.6 V only.
Figure 4. 3-State Output Low Enable and Disable for
Low Voltage Logic
Notes:
13. Input tR=tF=2.0 ns, 10% to 90%.
14. Input tR-tF=2.5 ns, 10% to 90%, at VI=3.0 V to 3.6 V only.
Figure 5. 3-State Output High Enable and Disable for Low Voltage Logic
VCC
Symbol
VMI
3.3 V ± 0.3 V
2.5 V ± 0.2 V
1.8 V ± 0.15 V
1.5 V ± 0.1 V
1.2 V ± 0.1 V
VCCI/2
VCCI/2
VCCI/2
VCCI/2
VCCI/2
VMO
VCCO/2
VCCO/2
VCCO/2
VCCO/2
VCCO/2
VX
VOH - 0.3 V
VOH – 0.15 V
VOH – 0.15 V
VOH – 0.1 V
VOH – 0.1 V
VY
VOL + 0.3 V
VOL + 0.15 V
VOL + 0.15 V
VOL + 0.1 V
VOL + 0.1 V
Note:
15. For VMI VCCO=VCCA for control pins T/R and OE or VCCA/2.
© 2005 Fairchild Semiconductor Corporation
FXL2T245 • Rev. 1.0.2
www.fairchildsemi.com
9
FXL2T245 — Low Voltage Dual Supply 2-Bit Signal Translator with Configurable Voltage Supplies
AC Loadings and Waveforms
0.05 C
2.10
2X
A
1.62
B
KEEPOUT ZONE, NO TRACES
OR VIAS ALLOWED
(0.11)
0.56
1.12
1.60
PIN1 IDENT IS
2X LONGER THAN
OTHER LINES
0.05 C
(0.35) 10X
(0.25) 10X
0.50
2X
TOP VIEW
RECOMMENDED LAND PATTERN
0.50±0.05
0.20±0.05
0.025±0.025
0.05 C
(0.10±0.10)
0.30±0.05
SIDE VIEW
C
0.15±0.05
2.10±0.05
DETAIL A
0.30±0.05
D
0.60±0.05
(0.36) 2X
(0.09±0.09) 10X
1
0.20±0.05
4
10
(0.31)
9
0.50
(0.20±0.20)
DETAIL A 2X SCALE
1.62
NOTES:
A. PACKAGE CONFORMS TO JEDEC
0.56
REGISTRATION MO-255, VARIATION UABD .
B. DIMENSIONS ARE IN MILLIMETERS.
0.30±0.05 1.60±0.05 C. DIMENSIONS AND TOLERANCES PER
5
9X
ASME Y14.5M, 2009.
D. PRESENCE OF CENTER PAD IS PACKAGE
6
SUPPLIER DEPENDENT. IF PRESENT IT IS
NOT
INTENDED TO BE SOLDERED AND HAS A
0.20±0.05
9X
BLACK OXIDE FINISH.
E. DRAWING FILENAME: MKT-MAC10Arev6.
0.10
C A B
F. DIMENSIONS WITHIN ( ) ARE UNCONTROLLED
0.05
C
ALL FEATURES
BOTTOM VIEW
Figure 6.
10-Lead, MicroPak™, JEDEC MO255,1.6 x 2.1 mm
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner
without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or
obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions,
specifically the warranty therein, which covers Fairchild products.
Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:
http://www.fairchildsemi.com/dwg/MA/MAC10A.pdf.
For current packing container specifications, visit Fairchild Semiconductor’s online packaging area:
http://www.fairchildsemi.com/packing_dwg/PKG-MAC10A.pdf.
© 2005 Fairchild Semiconductor Corporation
FXL2T245 • Rev. 1.0.2
www.fairchildsemi.com
10
FXL2T245 — Low Voltage Dual Supply 2-Bit Signal Translator with Configurable Voltage Supplies
Physical Dimensions
FXL2T245 — Low Voltage Dual Supply 2-Bit Signal Translator with Configurable Voltage Supplies
11
www.fairchildsemi.com
© 2005 Fairchild Semiconductor Corporation
FXL2T245 • Rev. 1.0.2
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