FXLP4555MPX

FXLP4555 1.8V / 3.0V SIM Card Power Supply and Level Shifter Features Description    Supports 1.8V or 3.0V SIM Cards  ESD Protection: 8kV (Human Body Model, According to ISO-7816 Specifications)   Supports Clock  5MHz The FXLP4555 is a level-shifter analog circuit designed to translate the voltages between a SIM card and an external baseband. A built-in LDO-type DC-DC converter allows the FXLP4555 to drive 1.8V and 3.0V SIM cards. The device fulfills the ISO7816-3 smart-card interface standard as well as GSM 11.11 (11.12 and 11.18) and 3G mobile requirements (IMT-2000/3G UICC standard). The EN pin enables a low-current Shutdown Mode that extends battery life. The card power supply voltage (VCC_C) is selected using a single pin (VSEL).  Low-Profile 3x3mm MLP-16 Package LDO Supplies >50mA Under 1.8V and 3.0V Built-in Pull-up Resistor for I/O Pin in Both Directions Supports “Clock Stop” Power Management per ISO7816-3 Specifications Applications  SIM Card Interface Circuit for 2G, 2.5G, and 3G Mobile Phones    Identification Module Smart Card Readers Wireless PC Cards Ordering Information Part Number FXLP4555MPX Operating Temperature Range Top Mark -40 to +85°C FXLP 4555 © 2010 Fairchild Semiconductor Corporation FXLP4555 • Rev. 1.0.0 Package 16-Lead,MLP,Quad,JEDEC MO-220,3MM Square Packing Method 3000 Units on Tape & Reel www.fairchildsemi.com FXLP4555 — 1.8V / 3.0V SIM Card Power Supply and Level Shifter May 2011 Figure 1. Typical Application Functional Block Diagram VBAT 5 EN 1 VSEL 2 LDO: 1.8V/3V at 50mA 7 VCC_C 9 RST_C GND VCCA VCCA 3 VCC_C Unidirectional Driver RST_H 14 FXLP4555 — 1.8V / 3.0V SIM Card Power Supply and Level Shifter Application Diagram GND Unidirectional Driver CLK_H 13 11 CLK_C GND I/O_H 15 18K Bidirectional NpassGate With Edge Rate Accelerators 14K 8 I/O_C GND 10 GND Figure 2. © 2010 Fairchild Semiconductor Corporation FXLP4555 • Rev. 1.0.0 Block Diagram www.fairchildsemi.com 2 16 EN 1 VSEL 2 VCCA 3 NC 4 15 14 13 12 NC 11 CLK_C FXLP4555 Exposed DAP (GND) 10 GND 9 RST_C 5 6 7 8 Figure 3. Pin Assignments (Top View) Pin Definitions Pin Name Type Description 1 EN INPUT Power-Down Mode. EN=LOW → low-current Shutdown Mode activated. EN=HIGH → normal operation. A LOW level on this pin resets the SIM interface, switching off the VCC_C. 2 VSEL INPUT The signal present on this pin programs the SIM_VCC value: VSEL=LOW → SIM_VCC=1.8V; VSEL=HIGH → SIM_VCC=3V. 3 VCCA 4 NC 5 VBAT 6 NC POWER Connected to the baseband power supply; this pin configures the level shifter input stage to accept signals from the baseband. A 0.1µF capacitor is used to bypass the power supply voltage. When VCCA is below 1.1V (typical), the VCC_C (SIM Card VCC) is disabled and FXLP4555 enters Shutdown Mode. FXLP4555 — 1.8V / 3.0V SIM Card Power Supply and Level Shifter Pin Configuration No connect. It is recommended to solder to PCB GND. POWER LDO converter supply input. The input voltage ranges from 2.7V to 5.5V. This pin needs to be bypassed by a 0.1µF capacitor. No connect. It is recommended to solder to PCB GND. 7 VCC_C POWER Connected to the SIM card power supply pin. An internal LDO converter is programmable by the external baseband to supply either 1.8V or 3.0V output voltage. An external 1.0µF minimum ceramic capacitor must be connected across VCC_C and GND. During a normal operation, the VCC_C voltage can be set to 1.8V, followed by a 3.0V value, or can start directly at either of these values. 8 I/O_C INPUT/ OUTPUT Handles the connection to the serial I/O of the card connector. A bi-directional level translator adapts the serial I/O signal between the card and the baseband. A 14kΩ (typical) pull-up resistor provides a high-impedance state for the SIM card I/O link. 9 RST_C OUTPUT Connected to the RESET pin of the card connector. A level translator adapts the external reset (RST) signal to the SIM card. 10 GND GROUND Ground reference for the integrated circuit and associated signals. Care must be taken to avoid voltage spikes when the device operates in normal operation. 11 CLK_C OUTPUT Connected to the CLOCK pin of the card connector. The CLOCK (CLK) signal comes from the external clock generator; the internal level shifter adapts the voltage defined for the VCC_C. 12 NC 13 CLK_H No connect. It is recommended to solder to PCB GND. INPUT © 2010 Fairchild Semiconductor Corporation FXLP4555 • Rev. 1.0.0 The clock signal, coming from the external controller, must have a duty cycle within the range defined by the specification (typically 50%). The built-in level shifter translates the input signal to the external SIM card CLK input. www.fairchildsemi.com 3 Pin Name Type 14 RST_H INPUT 15 I/O_H INPUT/ OUTPUT 16 NC 17 Exposed DAP Description The RESET signal present at this pin is connected to the SIM card through the internal level shifter, which translates the level according to the VCC_C programmed value. This pin is connected to the baseband. A bidirectional level translator adapts the serial I/O signal between the smart card and the baseband. A built-in constant 18kΩ (typical) resistor provides a high-impedance state when not activated. No connect. It is recommended to solder to pcb GND. Ground © 2010 Fairchild Semiconductor Corporation FXLP4555 • Rev. 1.0.0 Must be soldered to PCB ground plane. FXLP4555 — 1.8V / 3.0V SIM Card Power Supply and Level Shifter Pin Definitions (Continued) www.fairchildsemi.com 4 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA=+25°C. Symbol Parameter Min. Typ. Max. Unit VBAT LDO Power Supply Voltage -0.5 VBAT 6.0 V VCCA Power Supply from Baseband Side -0.5 VCCA 6.0 V VCC_C External Card Power Supply -0.5 VCC_C 6.0 V VIN Digital Input Pin Voltage -0.5 VIN VCCA+0.5, but 30pF (33pF Capacitor Connected on the Board) © 2010 Fairchild Semiconductor Corporation FXLP4555 • Rev. 1.0.0 FXLP4555 — 1.8V / 3.0V SIM Card Power Supply and Level Shifter Application Information Basic I/O Line Interface Figure 11. Typical Schmitt Trigger Characteristics www.fairchildsemi.com 10 Input Schmitt Triggers Printed Circuit Board (PCB) Layout All the logic input pins (except I/O_H and I/O_C) have built-in Schmitt trigger circuits to prevent uncontrolled operation. Typical dynamic characteristics of the related pins are depicted in Figure 11. Careful layout routing should be applied to achieve efficient operating of the device in its mobile or portable environment and to fully exploit its performance. The bypass capacitors must be connected as close as possible to the device pins (VCC_C, VCCA, or VBAT) to reduce possible parasitic behaviors (ripple and noise). It is recommended to use ceramic capacitors. The output signal is guaranteed to go HIGH when the input voltage is above 0.7 x VDD and go LOW when the input voltage is below 0.4V. See Electrical Characteristics section. The exposed pad should be connected to ground as well as the unconnected pins (NC). A relatively large ground plane is recommended. Shutdown Operating To save power, it is possible to put the FXLP4555 in Shutdown Mode by setting the pin EN LOW. The device enters Shutdown Mode automatically when VCCA goes lower than 1.1V typically. Clock Stop Section 6.3.2 of ISO7816-3 identifies the “Power Management” feature of Clock Stop. For cards supporting Clock Stop, when the interface device expects no transmission from the card and when I/O has remained at state H for at least 1,860 clock cycles (delay tg), then according to Figure 13, the interface device may stop the clock on CLK (at time te) while the SIM card VCC remains powered and RST at state H. ESD Protection The FXLP4555 SIM interface features an HBM ESD voltage protection in excess of 7kV for all the SIM pins (IO_C, CLK_C, RST_C, VCC_C and GND). All the other pins (Host side) sustain at least 2kV. The HBM ESD voltage required by the ISO7816 standard is 4kV. Figure 12. FXLP4555 — 1.8V / 3.0V SIM Card Power Supply and Level Shifter Applications Information (Continued) Clock Stop The FXLP4555 supports the above description of Clock Stop per ISO7816-3 specifications. When the clock is stopped (from time te to time tf), CLK shall be maintained either at state H or at state L, according to the clock stop indicator X defined in section 8.3 of the ISO7816-3 specification. At time tf, the interface device restarts the clock and the information exchange on I/O may continue after at least 700 clock cycles (at time tf + th). © 2010 Fairchild Semiconductor Corporation FXLP4555 • Rev. 1.0.0 www.fairchildsemi.com 11 FXLP4555 — 1.8V / 3.0V SIM Card Power Supply and Level Shifter Physical Dimensions Figure 13. 16-Lead, Molded Leadless Package (MLP), QUAD, JEDEC MO-220, 3mm Square Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/MLP16B.html. For current tape and reel specifications, visit Fairchild Semiconductor’s online packaging area: http://www.fairchildsemi.com/packaging/3x3MLP16_Pack_TNR.pdf. © 2010 Fairchild Semiconductor Corporation FXLP4555 • Rev. 1.0.0 www.fairchildsemi.com 12 FXLP4555 — 1.8V / 3.0V SIM Card Power Supply and Level Shifter © 2010 Fairchild Semiconductor Corporation FXLP4555 • Rev. 1.0.0 www.fairchildsemi.com 13