HGTG18N120BN
Data Sheet
December 2001
54A, 1200V, NPT Series N-Channel IGBT
Features
The HGTG18N120BN is a Non-Punch Through (NPT) IGBT
design. This is a new member of the MOS gated high
voltage switching IGBT family. IGBTs combine the best
features of MOSFETs and bipolar transistors. This device
has the high input impedance of a MOSFET and the low
on-state conduction loss of a bipolar transistor.
• 54A, 1200V, TC = 25oC
• 1200V Switching SOA Capability
• Typical Fall Time . . . . . . . . . . . . . . . . 140ns at TJ = 150oC
• Short Circuit Rating
• Low Conduction Loss
The IGBT is ideal for many high voltage switching
applications operating at moderate frequencies where low
conduction losses are essential, such as: AC and DC motor
controls, power supplies and drivers for solenoids, relays
and contactors.
• Avalanche Rated
• Temperature Compensating SABER™ Model
www.fairchildsemi.com
Packaging
Formerly Developmental Type TA49288.
JEDEC STYLE TO-247
Ordering Information
E
PART NUMBER
PACKAGE
C
BRAND
G
HGTG18N120BN
TO-247
G18N120BN
NOTE: When ordering, use the entire part number.
Symbol
C
G
E
FAIRCHILD SEMICONDUCTOR IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS
4,364,073
4,417,385
4,430,792
4,443,931
4,466,176
4,516,143
4,532,534
4,587,713
4,598,461
4,605,948
4,620,211
4,631,564
4,639,754
4,639,762
4,641,162
4,644,637
4,682,195
4,684,413
4,694,313
4,717,679
4,743,952
4,783,690
4,794,432
4,801,986
4,803,533
4,809,045
4,809,047
4,810,665
4,823,176
4,837,606
4,860,080
4,883,767
4,888,627
4,890,143
4,901,127
4,904,609
4,933,740
4,963,951
4,969,027
©2001 Fairchild Semiconductor Corporation
HGTG18N120BN Rev. B
HGTG18N120BN
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified
Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .BVCES
Collector Current Continuous
At TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC25
At TC = 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IC110
Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ICM
Gate to Emitter Voltage Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGES
Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VGEM
Switching Safe Operating Area at TJ = 150oC (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . SSOA
Power Dissipation Total at TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Power Dissipation Derating TC > 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Forward Voltage Avalanche Energy (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAV
Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
Maximum Lead Temperature for Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Short Circuit Withstand Time (Note 3) at VGE = 15V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .tSC
Short Circuit Withstand Time (Note 3) at VGE = 12V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .tSC
HGTG18N120BN
1200
UNITS
V
54
26
160
±20
±30
100A at 1200V
390
3.12
125
-55 to 150
260
8
15
A
A
A
V
V
W
W/oC
mJ
oC
oC
µs
µs
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Pulse width limited by maximum junction temperature.
2. ICE = 25A, L = 400µH, TJ = 25oC.
3. VCE(PK) = 960V, TJ = 125oC, RG = 3Ω.
Electrical Specifications
TC = 25oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Collector to Emitter Breakdown Voltage
BVCES
IC = 250µA, VGE = 0V
1200
-
-
V
Emitter to Collector Breakdown Voltage
BVECS
IC = 10mA, VGE = 0V
15
-
-
V
-
-
250
µA
-
250
-
µA
-
-
3
mA
-
2.45
2.7
V
-
3.8
4.2
V
6.0
7.0
-
V
-
-
±250
nA
100
-
-
A
-
10.5
-
V
VGE = 15V
-
165
200
nC
VGE = 20V
-
220
250
nC
-
23
28
ns
-
17
22
ns
-
170
200
ns
-
90
140
ns
-
0.8
1.0
mJ
Collector to Emitter Leakage Current
Collector to Emitter Saturation Voltage
Gate to Emitter Threshold Voltage
Gate to Emitter Leakage Current
ICES
VCE(SAT)
VGE(TH)
IGES
VCE = 1200V
IC = 18A,
VGE = 15V
TC = 25oC
TC = 125oC
TC = 150oC
TC = 25oC
TC = 150oC
IC = 150µA, VCE = VGE
VGE = ±20V
Switching SOA
SSOA
TJ = 150oC, RG = 3Ω, VGE = 15V,
L = 200µH, VCE(PK) = 1200V
Gate to Emitter Plateau Voltage
VGEP
IC = 18A, VCE = 600V
On-State Gate Charge
Current Turn-On Delay Time
Current Rise Time
Current Turn-Off Delay Time
Current Fall Time
QG(ON)
td(ON)I
trI
td(OFF)I
tfI
IC = 18A,
VCE = 600V
IGBT and Diode at TJ = 25oC
ICE = 18A
VCE = 960V
VGE = 15V
RG = 3Ω
L = 1mH
Test Circuit (Figure 18)
Turn-On Energy (Note 5)
EON1
Turn-On Energy (Note 5)
EON2
-
1.9
2.4
mJ
Turn-Off Energy (Note 4)
EOFF
-
1.8
2.2
mJ
©2001 Fairchild Semiconductor Corporation
HGTG18N120BN Rev. B
HGTG18N120BN
Electrical Specifications
TC = 25oC, Unless Otherwise Specified (Continued)
PARAMETER
SYMBOL
Current Turn-On Delay Time
td(ON)I
Current Rise Time
trI
Current Turn-Off Delay Time
td(OFF)I
Current Fall Time
tfI
TEST CONDITIONS
IGBT and Diode at TJ = 150oC
ICE = 18A
VCE = 960V
VGE = 15V
RG = 3Ω
L = 1mH
Test Circuit (Figure 18)
MIN
TYP
MAX
UNITS
-
21
26
ns
-
17
22
ns
-
205
240
ns
-
140
200
ns
-
0.85
1.1
mJ
Turn-On Energy (Note 5)
EON1
Turn-On Energy (Note 5)
EON2
-
3.7
4.9
mJ
Turn-Off Energy (Note 4)
EOFF
-
2.6
3.1
mJ
Thermal Resistance Junction To Case
RθJC
-
-
0.32
oC/W
NOTES:
4. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending
at the point where the collector current equals zero (ICE = 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement
of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss.
5. Values for two Turn-On loss conditions are shown for the convenience of the circuit designer. EON1 is the turn-on loss of the IGBT only. EON2 is
the turn-on loss when a typical diode is used in the test circuit and the diode is at the same TJ as the IGBT. The diode type is specified in Fig. 18.
Unless Otherwise Specified
VGE = 15V
50
40
30
20
10
0
25
50
75
100
125
150
120
TJ = 150oC, RG = 3Ω, VGE = 15V, L = 200µH
100
80
60
40
20
0
0
TC , CASE TEMPERATURE (oC)
tSC , SHORT CIRCUIT WITHSTAND TIME (µs)
fMAX, OPERATING FREQUENCY (kHz)
TC = 75oC, VGE = 15V, IDEAL DIODE
100
50
1
5
10
20
VGE
15V
12V
15V
12V
30
ICE, COLLECTOR TO EMITTER CURRENT (A)
FIGURE 3. OPERATING FREQUENCY vs COLLECTOR TO
EMITTER CURRENT
©2001 Fairchild Semiconductor Corporation
600
800
1000
1400
1200
FIGURE 2. MINIMUM SWITCHING SAFE OPERATING AREA
TJ = 150oC, RG = 3Ω, L = 1mH, V CE = 960V
fMAX1 = 0.05 / (td(OFF)I + td(ON)I)
TC
fMAX2 = (PD - PC) / (EON2 + EOFF)
o
PC = CONDUCTION DISSIPATION 75oC
75 C
(DUTY FACTOR = 50%)
110oC
RØJC = 0.32oC/W, SEE NOTES
110oC
400
VCE , COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 1. DC COLLECTOR CURRENT vs CASE
TEMPERATURE
10
200
40
30
300
VCE = 960V, RG = 3Ω, TJ = 125oC
25
250
ISC
200
20
150
15
tSC
100
10
5
12
13
14
15
16
50
ISC, PEAK SHORT CIRCUIT CURRENT (A)
ICE , DC COLLECTOR CURRENT (A)
60
ICE , COLLECTOR TO EMITTER CURRENT (A)
Typical Performance Curves
VGE , GATE TO EMITTER VOLTAGE (V)
FIGURE 4. SHORT CIRCUIT WITHSTAND TIME
HGTG18N120BN Rev. B
HGTG18N120BN
Unless Otherwise Specified (Continued)
80
60
TC = 25oC
TC = -55oC
40
TC = 150oC
20
DUTY CYCLE < 0.5%, VGE = 12V
PULSE DURATION = 250µs
0
0
2
4
6
8
10
ICE, COLLECTOR TO EMITTER CURRENT (A)
ICE, COLLECTOR TO EMITTER CURRENT (A)
Typical Performance Curves
100
TC = 150oC
60
40
20
DUTY CYCLE < 0.5%, VGE = 15V
PULSE DURATION = 250µs
0
0
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
6
8
10
4.5
RG = 3Ω, L = 1mH, VCE = 960V
EOFF , TURN-OFF ENERGY LOSS (mJ)
EON2 , TURN-ON ENERGY LOSS (mJ)
4
FIGURE 6. COLLECTOR TO EMITTER ON-STATE VOLTAGE
10
TJ = 150oC, VGE = 12V, VGE = 15V
8
6
4
2
TJ = 25oC, VGE = 12V, VGE = 15V
RG = 3Ω, L = 1mH, VCE = 960V
4.0
TJ = 150oC, VGE = 12V OR 15V
3.5
3.0
2.5
2.0
TJ = 25oC, VGE = 12V OR 15V
1.5
1.0
0.5
0
5
10
15
20
25
30
35
5
40
ICE , COLLECTOR TO EMITTER CURRENT (A)
40
10
20
25
30
35
40
FIGURE 8. TURN-OFF ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
120
RG = 3Ω, L = 1mH, VCE = 960V
RG = 3Ω, L = 1mH, VCE = 960V
100
35
15
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 7. TURN-ON ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
TJ = 25oC, TJ = 150oC, VGE = 12V
trI , RISE TIME (ns)
tdI , TURN-ON DELAY TIME (ns)
2
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 5. COLLECTOR TO EMITTER ON-STATE VOLTAGE
12
TC = 25oC
TC = -55oC
80
30
25
20
TJ = 25oC, TJ = 150oC, VGE = 12V
80
60
40
20
TJ = 25oC OR TJ = 150oC, VGE = 15V
TJ = 25oC, TJ = 150oC, VGE = 15V
15
0
5
10
15
20
25
30
35
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 9. TURN-ON DELAY TIME vs COLLECTOR TO
EMITTER CURRENT
©2001 Fairchild Semiconductor Corporation
40
5
10
15
20
25
30
35
40
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 10. TURN-ON RISE TIME vs COLLECTOR TO
EMITTER CURRENT
HGTG18N120BN Rev. B
HGTG18N120BN
Typical Performance Curves
250
RG = 3Ω, L = 1mH, VCE = 960V
RG = 3Ω, L = 1mH, VCE = 960V
225
300
200
tfI , FALL TIME (ns)
td(OFF)I , TURN-OFF DELAY TIME (ns)
350
Unless Otherwise Specified (Continued)
VGE = 12V, VGE = 15V, TJ = 150oC
250
200
175
TJ = 150oC, VGE = 12V OR 15V
150
125
100
75
150
VGE = 12V, VGE = 15V, TJ = 25oC
25
100
5
10
15
25
20
TJ = 25oC, VGE = 12V OR 15V
50
30
35
5
40
20
DUTY CYCLE < 0.5%, VCE = 20V
PULSE DURATION = 250µs
150
100
TC = 25oC
50
TC = 150oC
15
TC = -55oC
6
15
VCE = 1200V
40
VCE = 800V
10
VCE = 400V
5
8
7
9
10
11
12
13
14
15
0
50
5
CIES
4
3
CRES
COES
0
10
15
20
VCE , COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 15. CAPACITANCE vs COLLECTOR TO EMITTER
VOLTAGE
©2001 Fairchild Semiconductor Corporation
25
ICE, COLLECTOR TO EMITTER CURRENT (A)
FREQUENCY = 1MHz
5
200
150
FIGURE 14. GATE CHARGE WAVEFORMS
6
1
100
QG , GATE CHARGE (nC)
FIGURE 13. TRANSFER CHARACTERISTIC
C, CAPACITANCE (nF)
35
IG(REF) = 2mA, RL = 33.3Ω, TC = 25oC
VGE, GATE TO EMITTER VOLTAGE (V)
0
30
0
0
2
25
20
FIGURE 12. FALL TIME vs COLLECTOR TO EMITTER
CURRENT
VGE, GATE TO EMITTER VOLTAGE (V)
ICE, COLLECTOR TO EMITTER CURRENT (A)
FIGURE 11. TURN-OFF DELAY TIME vs COLLECTOR TO
EMITTER CURRENT
200
10
ICE , COLLECTOR TO EMITTER CURRENT (A)
ICE , COLLECTOR TO EMITTER CURRENT (A)
30
DUTY CYCLE < 0.5%, TC = 110oC
PULSE DURATION = 250µs
25
VGE = 15V OR 12V
20
VGE = 10V
15
10
5
0
0
1
2
3
4
5
VCE , COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 16. COLLECTOR TO EMITTER ON-STATE VOLTAGE
HGTG18N120BN Rev. B
HGTG18N120BN
ZθJC , NORMALIZED THERMAL RESPONSE
Typical Performance Curves
Unless Otherwise Specified (Continued)
100
0.5
0.2
0.1
10-1
0.05
0.02
t1
DUTY FACTOR, D = t1 / t2
0.01
PEAK TJ = (PD X ZθJC X RθJC) + TC
SINGLE PULSE
10-2
10-5
PD
10-4
10-3
10-2
t2
10-1
100
t1 , RECTANGULAR PULSE DURATION (s)
FIGURE 17. NORMALIZED TRANSIENT THERMAL RESPONSE, JUNCTION TO CASE
Test Circuit and Waveforms
HGTG18N120BND
90%
10%
VGE
EON2
EOFF
L = 1mH
VCE
RG = 3Ω
90%
+
-
ICE
VDD = 960V
10%
td(OFF)I
tfI
trI
td(ON)I
FIGURE 18. INDUCTIVE SWITCHING TEST CIRCUIT
©2001 Fairchild Semiconductor Corporation
FIGURE 19. SWITCHING TEST WAVEFORMS
HGTG18N120BN Rev. B
HGTG18N120BN
Handling Precautions for IGBTs
Operating Frequency Information
Insulated Gate Bipolar Transistors are susceptible to
gate-insulation damage by the electrostatic discharge of
energy through the devices. When handling these devices,
care should be exercised to assure that the static charge
built in the handler’s body capacitance is not discharged
through the device. With proper handling and application
procedures, however, IGBTs are currently being extensively
used in production by numerous equipment manufacturers in
military, industrial and consumer applications, with virtually
no damage problems due to electrostatic discharge. IGBTs
can be handled safely if the following basic precautions are
taken:
Operating frequency information for a typical device
(Figure 3) is presented as a guide for estimating device
performance for a specific application. Other typical
frequency vs collector current (ICE) plots are possible using
the information shown for a typical unit in Figures 5, 6, 7, 8, 9
and 11. The operating frequency plot (Figure 3) of a typical
device shows fMAX1 or fMAX2; whichever is smaller at each
point. The information is based on measurements of a
typical device and is bounded by the maximum rated
junction temperature.
1. Prior to assembly into a circuit, all leads should be kept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as “ECCOSORBD™ LD26” or equivalent.
2. When devices are removed by hand from their carriers,
the hand being used should be grounded by any suitable
means - for example, with a metallic wristband.
3. Tips of soldering irons should be grounded.
4. Devices should never be inserted into or removed from
circuits with power on.
5. Gate Voltage Rating - Never exceed the gate-voltage
rating of VGEM. Exceeding the rated VGE can result in
permanent damage to the oxide layer in the gate region.
6. Gate Termination - The gates of these devices are
essentially capacitors. Circuits that leave the gate
open-circuited or floating should be avoided. These
conditions can result in turn-on of the device due to
voltage buildup on the input capacitor due to leakage
currents or pickup.
7. Gate Protection - These devices do not have an internal
monolithic Zener diode from gate to emitter. If gate
protection is required an external Zener is recommended.
©2001 Fairchild Semiconductor Corporation
fMAX1 is defined by fMAX1 = 0.05/(td(OFF)I+ td(ON)I).
Deadtime (the denominator) has been arbitrarily held to 10%
of the on-state time for a 50% duty factor. Other definitions
are possible. td(OFF)I and td(ON)I are defined in Figure 19.
Device turn-off delay can establish an additional frequency
limiting condition for an application other than TJM. td(OFF)I
is important when controlling output ripple under a lightly
loaded condition.
fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON2). The
allowable dissipation (PD) is defined by PD = (TJM - TC)/RθJC.
The sum of device switching and conduction losses must
not exceed PD . A 50% duty factor was used (Figure 3) and
the conduction losses (PC) are approximated by
PC = (VCE x ICE)/2 .
EON2 and EOFF are defined in the switching waveforms
shown in Figure 19. EON2 is the integral of the
instantaneous power loss (ICE x VCE) during turn-on and
EOFF is the integral of the instantaneous power loss
(ICE x VCE) during turn-off. All tail losses are included in
the calculation for EOFF; i.e., the collector current equals
zero (ICE = 0).
HGTG18N120BN Rev. B
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E2CMOSTM
EnSignaTM
FACT™
FACT Quiet Series™
FAST
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
OPTOLOGIC™
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER
SMART START™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
TruTranslation™
UHC™
UltraFET
VCX™
STAR*POWER is used under license
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FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into
support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose
be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance
support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4