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HUFA76409D3

HUFA76409D3

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    TO-251-3

  • 描述:

    MOSFET N-CH 60V 18A IPAK

  • 数据手册
  • 价格&库存
HUFA76409D3 数据手册
HUFA76409D3, HUFA76409D3ST Data Sheet December 2001 17A, 60V, 0.071 Ohm, N-Channel, Logic Level UltraFET Power MOSFETs Packaging JEDEC TO-251AA DRAIN (FLANGE) JEDEC TO-252AA DRAIN (FLANGE) SOURCE DRAIN GATE GATE SOURCE HUFA76409D3ST HUFA76409D3 Features • Ultra Low On-Resistance - rDS(ON) = 0.063Ω, VGS = 10V - rDS(ON) = 0.071Ω, VGS = 5V • Simulation Models - Temperature Compensated PSPICE® and SABER™ Electrical Models - Spice and SABER Thermal Impedance Models - www.onsemi.com • Peak Current vs Pulse Width Curve Symbol • UIS Rating Curve • Switching Time vs RGS Curves D Ordering Information G PART NUMBER HUFA76409D3 S HUFA76409D3ST Absolute Maximum Ratings PACKAGE TO-251AA BRAND 76409D TO-252AA 76409D TC = 25oC, Unless Otherwise Specified HUFA76409D3, HUFA76409D3SS UNITS Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS 60 V Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR 60 V Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS ±16 V Drain Current Continuous (TC = 25oC, VGS = 5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Continuous (TC = 25oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Continuous (TC = 135oC, VGS = 5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Continuous (TC = 135oC, VGS = 4.5V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM 17 18 8 8 Figure 4 A A A A Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . UIS Figures 6, 17, 18 Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 0.327 W W/oC Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG -55 to 175 oC Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief TB334. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 300 260 oC oC NOTE: 1. TJ = 25oC to 150oC. CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. This product has been designed to meet the extreme test conditions and environment demanded by the automotive industry. For a copy of the requirements, see AEC Q101 at: http://www.aecouncil.com/ ©2001 Semiconductor Components Industries, LLC. October-2017, Rev. 1 Publication Order Number: HUFA76409D3ST/D HUFA76409D3, HUFA76409D3ST Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS ID = 250µA, VGS = 0V (Figure 12) 60 - - V ID = 250µA, VGS = 0V , T C = -40oC (Figure 12) 55 - - V VDS = 55V, VGS = 0V - - 1 µA VDS = 50V, VGS = 0V, TC = 150oC - - 250 µA VGS = ±16V - - ±100 nA OFF STATE SPECIFICATIONS Drain to Source Breakdown Voltage Zero Gate Voltage Drain Current Gate to Source Leakage Current BVDSS IDSS IGSS ON STATE SPECIFICATIONS Gate to Source Threshold Voltage VGS(TH) VGS = VDS, ID = 250µA (Figure 11) 1 - 3 V Drain to Source On Resistance rDS(ON) ID = 18A, VGS = 10V (Figures 9, 10) - 0.052 0.063 Ω ID = 8A, VGS = 5V (Figure 9) - 0.060 0.071 Ω ID = 8A, VGS = 4.5V (Figure 9) - 0.064 0.075 Ω TO-251AA, TO-252AA - - 3.06 oC/W - - 100 oC/W THERMAL SPECIFICATIONS Thermal Resistance Junction to Case RθJC Thermal Resistance Junction to Ambient RθJA SWITCHING SPECIFICATIONS (VGS = 4.5V) Turn-On Time Turn-On Delay Time tON td(ON) - 153 ns 13 - ns tr - 89 - ns - 22 - ns tf - 37 - ns tOFF - - 89 ns - - 59 ns - 5.3 - ns - 34 - ns Fall Time Turn-Off Time - td(OFF) Rise Time Turn-Off Delay Time VDD = 30V, ID = 8A VGS = 4.5V, RGS = 22Ω (Figures 15, 21, 22) SWITCHING SPECIFICATIONS (VGS = 10V) Turn-On Time Turn-On Delay Time Rise Time tON td(ON) tr Turn-Off Delay Time Fall Time Turn-Off Time VDD = 30V, ID = 18A VGS = 10V, RGS = 24Ω (Figures 16, 21, 22) td(OFF) - 41 - ns tf - 50 - ns tOFF - - 136 ns GATE CHARGE SPECIFICATIONS Total Gate Charge Qg(TOT) VGS = 0V to 10V Gate Charge at 5V Qg(5) VGS = 0V to 5V Qg(TH) VGS = 0V to 1V VDD = 30V, ID = 8A, Ig(REF) = 1.0mA - 12 15 nC - 6.8 8.2 nC - 0.54 0.65 nC Gate to Source Gate Charge Qgs - 1.7 - nC Gate to Drain “Miller” Charge Qgd - 3 - nC Threshold Gate Charge (Figures 14, 19, 20) CAPACITANCE SPECIFICATIONS Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS VDS = 25V, VGS = 0V, f = 1MHz (Figure 13) - 485 - pF - 130 - pF - 28 - pF MIN TYP MAX UNITS Source to Drain Diode Specifications PARAMETER Source to Drain Diode Voltage Reverse Recovery Time Reverse Recovered Charge SYMBOL VSD TEST CONDITIONS ISD = 8A - - 1.25 V ISD = 4A - - 1.0 V trr ISD = 8A, dISD/dt = 100A/µs - - 70 ns QRR ISD = 8A, dISD/dt = 100A/µs - - 165 nC www.onsemi.com 2 HUFA76409D3, HUFA76409D3ST Typical Performance Curves 20 1.0 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER 1.2 0.8 0.6 0.4 VGS = 10V 15 VGS = 4.5V 10 5 0.2 0 0 0 25 50 75 100 125 150 175 25 50 TC , CASE TEMPERATURE (oC) 75 100 125 150 175 TC, CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 2 ZθJC, NORMALIZED THERMAL IMPEDANCE 1 DUTY CYCLE - DESCENDING ORDER 0.5 0.2 0.1 0.05 0.02 0.01 PDM 0.1 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZθJC x RθJC + TC SINGLE PULSE 0.01 10-5 10-4 10-3 10-2 10-1 100 101 t, RECTANGULAR PULSE DURATION (s) FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE IDM, PEAK CURRENT (A) 200 TC = 25oC FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS: 100 175 - TC I = I25 150 VGS = 5V TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION 10 10-5 10-4 10-3 10-2 t, PULSE WIDTH (s) FIGURE 4. PEAK CURRENT CAPABILITY www.onsemi.com 3 10-1 100 101 HUFA76409D3, HUFA76409D3ST Typical Performance Curves (Continued) 60 If R = 0 tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD) If R ≠ 0 tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1] IAS, AVALANCHE CURRENT (A) ID, DRAIN CURRENT (A) 100 100µs 10 10 1ms OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 1 10ms SINGLE PULSE TJ = MAX RATED TC = 25oC 0.1 STARTING TJ = 25oC STARTING TJ = 150oC 1 1 10 100 0.01 0.1 1 tAV, TIME IN AVALANCHE (ms) VDS, DRAIN TO SOURCE VOLTAGE (V) 10 100 NOTE: Refer to ON Semiconductor Application Notes AN9321 and AN9322. FIGURE 5. FORWARD BIAS SAFE OPERATING AREA FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY 20 20 VGS = 10V 15 10 TJ = 25oC 5 TJ = 175oC 15 VGS = 3.5V 10 VGS = 3V 5 TJ = -55oC PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX TC = 25oC 0 0 2.0 1.0 3.0 4.0 5.0 0 1 2 3 VDS, DRAIN TO SOURCE VOLTAGE (V) VGS, GATE TO SOURCE VOLTAGE (V) FIGURE 7. TRANSFER CHARACTERISTICS 4 FIGURE 8. SATURATION CHARACTERISTICS 2.5 80 ID = 17A PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX TC = 25oC NORMALIZED DRAIN TO SOURCE ON RESISTANCE rDS(ON), DRAIN TO SOURCE ON RESISTANCE (mΩ) VGS = 4V VGS = 5V ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX VDD = 15V 70 ID = 12A ID = 7A 60 50 PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX 2.0 1.5 1.0 VGS = 10V, ID = 18A 0.5 40 2 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) -80 10 FIGURE 9. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (oC) FIGURE 10. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE www.onsemi.com 4 200 HUFA76409D3, HUFA76409D3ST Typical Performance Curves (Continued) 1.2 1.2 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE NORMALIZED GATE THRESHOLD VOLTAGE VGS = VDS, ID = 250µA 1.0 0.8 0.6 1.1 1.0 0.9 0.4 -80 -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (oC) -80 200 -40 0 40 80 120 160 200 TJ , JUNCTION TEMPERATURE (oC) FIGURE 11. NORMALIZED GATE THRESHOLD VOLTAGE vs JUNCTION TEMPERATURE FIGURE 12. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE 10 VGS , GATE TO SOURCE VOLTAGE (V) 2000 CISS = CGS + CGD 1000 C, CAPACITANCE (pF) ID = 250µA COSS ≅ CDS + CGD 100 VGS = 0V, f = 1MHz CRSS = CGD 8 6 4 2 0 60 1.0 10 VDS , DRAIN TO SOURCE VOLTAGE (V) WAVEFORMS IN DESCENDING ORDER: ID = 17A ID = 12A ID = 7A 0 10 0.1 VDD = 30V FIGURE 13. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 3 6 9 Qg, GATE CHARGE (nC) 12 15 NOTE: Refer to ON Semiconductor Application Notes AN7254 and AN7260. FIGURE 14. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT 100 150 VGS = 10V, VDD = 30V, ID = 18A 120 SWITCHING TIME (ns) SWITCHING TIME (ns) VGS = 4.5V, VDD = 30V, ID = 8A tr 90 60 tf td(OFF) 30 80 60 tf 40 tr td(OFF) 20 td(ON) td(ON) 0 0 0 10 20 30 40 50 0 RGS, GATE TO SOURCE RESISTANCE (Ω) FIGURE 15. SWITCHING TIME vs GATE RESISTANCE 10 20 30 40 RGS, GATE TO SOURCE RESISTANCE (Ω) FIGURE 16. SWITCHING TIME vs GATE RESISTANCE www.onsemi.com 5 50 HUFA76409D3, HUFA76409D3ST Test Circuits and Waveforms VDS BVDSS L tP VARY tP TO OBTAIN REQUIRED PEAK IAS + RG VDS IAS VDD VDD - VGS DUT tP 0V IAS 0 0.01Ω tAV FIGURE 17. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 18. UNCLAMPED ENERGY WAVEFORMS VDS VDD RL Qg(TOT) VDS VGS = 10V VGS Qg(5) + VDD VGS = 5V VGS DUT VGS = 1V Ig(REF) 0 Qg(TH) Qgs Qgd Ig(REF) 0 FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS VDS tON tOFF td(ON) td(OFF) tr RL VDS tf 90% 90% + VGS VDD - 10% 10% 0 DUT 90% RGS VGS VGS 0 10% FIGURE 21. SWITCHING TIME TEST CIRCUIT 50% 50% PULSE WIDTH FIGURE 22. SWITCHING TIME WAVEFORM www.onsemi.com 6 HUFA76409D3, HUFA76409D3ST PSPICE Electrical Model .SUBCKT HUFA76409D 2 1 3 ; rev 23 August 1999 CA 12 8 6.30e-10 CB 15 14 6.30e-10 CIN 6 8 4.60e-10 DBODY 7 5 DBODYMOD DBREAK 5 11 DBREAKMOD DPLCAP 10 5 DPLCAPMOD LDRAIN DPLCAP DRAIN 2 5 10 5 51 ESLC 11 - RDRAIN 6 8 EVTHRES + 19 8 + LGATE GATE 1 MMED 16 6 8 8 MMEDMOD MSTRO 16 6 8 8 MSTROMOD MWEAK 16 21 8 8 MWEAKMOD + 50 - IT 8 17 1 EVTEMP RGATE + 18 22 9 20 21 EBREAK 17 18 DBODY - 16 MWEAK 6 MMED MSTRO RLGATE LSOURCE CIN 8 SOURCE 3 7 RSOURCE RBREAK 17 18 RBREAKMOD 1 RDRAIN 50 16 RDRAINMOD 1.88e-2 RGATE 9 20 3.76 RLDRAIN 2 5 10 RLGATE 1 9 37.3 RLSOURCE 3 7 34.3 RSLC1 5 51 RSLCMOD 1e-6 RSLC2 5 50 1e3 RSOURCE 8 7 RSOURCEMOD 2.40e-2 RVTHRES 22 8 RVTHRESMOD 1 RVTEMP 18 19 RVTEMPMOD 1 S1A S1B S2A S2B DBREAK + RSLC2 ESG LDRAIN 2 5 1.00e-9 LGATE 1 9 3.73e-9 LSOURCE 3 7 3.43e-9 RLDRAIN RSLC1 51 EBREAK 11 7 17 18 66.55 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTHRES 6 21 19 8 1 EVTEMP 20 6 18 22 1 RLSOURCE S1A 12 S2A 13 8 14 13 S1B CA RBREAK 15 17 18 RVTEMP S2B 13 CB 6 8 EGS - 6 12 13 8 S1AMOD 13 12 13 8 S1BMOD 6 15 14 13 S2AMOD 13 15 14 13 S2BMOD 19 - IT 14 + + VBAT 5 8 EDS - + 8 22 RVTHRES VBAT 22 19 DC 1 ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*43),3))} .MODEL DBODYMOD D (IS = 3.84e-13 RS = 1.56e-2 TRS1 = -1.0e-3 TRS2 = 7.0e-6 CJO = 6.4e-10 TT = 5.10e-8 XTI =4.35 M = 0.52) .MODEL DBREAKMOD D (RS = 3.70e- 1TRS1 = 9.10e- 4TRS2 = -1e-6) .MODEL DPLCAPMOD D (CJO = 3.70e-1 0IS = 1e-3 0N = 10 M = 0.79) .MODEL MMEDMOD NMOS (VTO = 2.08 KP = 3.2 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 3.76) .MODEL MSTROMOD NMOS (VTO = 2.40 KP = 28 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u) .MODEL MWEAKMOD NMOS (VTO = 1.80 KP = 0.08 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 37.6 RS = 0.1) .MODEL RBREAKMOD RES (TC1 = 1.13e- 3TC2 = -3.00e-7) .MODEL RDRAINMOD RES (TC1 = 9.80e-3 TC2 = 2.85e-5) .MODEL RSLCMOD RES (TC1 = 5.00e-3 TC2 = 5.05e-6) .MODEL RSOURCEMOD RES (TC1 = 1.5e-3 TC2 = 1e-6) .MODEL RVTHRESMOD RES (TC1 = -1.48e-3 TC2 = -8.30e-6) .MODEL RVTEMPMOD RES (TC1 = -1.68e- 3TC2 = 8e-7) .MODEL S1AMOD VSWITCH (RON = 1e-5 .MODEL S1BMOD VSWITCH (RON = 1e-5 .MODEL S2AMOD VSWITCH (RON = 1e-5 .MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 ROFF = 0.1 ROFF = 0.1 ROFF = 0.1 VON = -5 VOFF= -2.8) VON = -2.8 VOFF= -5) VON = -0.5 VOFF= 0.5) VON = 0.5 VOFF= -0.5) .ENDS NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley. www.onsemi.com 7 HUFA76409D3, HUFA76409D3ST SABER Electrical Model REV 23 August 1999 template HUFA76409d n2,n1,n3 electrical n2,n1,n3 { var i iscl d..model dbodymod = (is = 3.84e-13, cjo = 6.40e-10, tt = 5.10e-8, xti = 4.35, m = 0.52) d..model dbreakmod = () d..model dplcapmod = (cjo = 3.70e-10, is = 1e-30, m = 0.79) m..model mmedmod = (type=_n, vto = 2.08, kp = 3.2, is = 1e-30, tox = 1) m..model mstrongmod = (type=_n, vto = 2.40, kp = 28, is = 1e-30, tox = 1) m..model mweakmod = (type=_n, vto = 1.80, kp = 0.08, is = 1e-30, tox = 1) sw_vcsp..model s1amod = (ron = 1e-5, roff = 0.1, von = -5, voff = -2.8) DPLCAP sw_vcsp..model s1bmod = (ron =1e-5, roff = 0.1, von = -2.8, voff = -5) 10 sw_vcsp..model s2amod = (ron = 1e-5, roff = 0.1, von = -0.5, voff = 0.5) sw_vcsp..model s2bmod = (ron = 1e-5, roff = 0.1, von = 0.5, voff = -0.5) c.ca n12 n8 = 6.30e-10 c.cb n15 n14 = 6.30e-10 c.cin n6 n8 = 4.60e-10 DRAIN 2 RSLC1 51 RLDRAIN RDBREAK RSLC2 72 ISCL RDRAIN 6 8 ESG EVTHRES + 19 8 + i.it n8 n17 = 1 LGATE GATE 1 EVTEMP RGATE + 18 22 9 20 MWEAK MSTRO CIN DBODY EBREAK + 17 18 MMED m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u 71 11 16 6 RLGATE res.rbreak n17 n18 = 1, tc1 = 1.13e-3, tc2 = -3.00e-7 res.rdbody n71 n5 = 1.56e-2, tc1 = -1.0e-3, tc2 = 7.00e-6 res.rdbreak n72 n5 = 3.70e-1, tc1 = 9.10e-4, tc2 = -1e-6 res.rdrain n50 n16 = 1.88e-2, tc1 = 9.80e-3, tc2 = 2.85e-5 res.rgate n9 n20 = 3.76 res.rldrain n2 n5 = 10 res.rlgate n1 n9 = 37.3 res.rlsource n3 n7 = 34.3 res.rslc1 n5 n51= 1e-6, tc1 = 5.00e-3, tc2 = 5.05e-6 res.rslc2 n5 n50 = 1e3 res.rsource n8 n7 = 2.40e-2, tc1 = 1.5e-3, tc2 =1e-6 res.rvtemp n18 n19 = 1, tc1 = -1.68e-3, tc2 = 8.00e-7 res.rvthres n22 n8 = 1, tc1 = -1.48e-3, tc2 = -8.30e-6 21 RDBODY DBREAK 50 - d.dbody n7 n71 = model=dbodymod d.dbreak n72 n11 = model=dbreakmod d.dplcap n10 n5 = model=dplcapmod l.ldrain n2 n5 = 1.00e-9 l.lgate n1 n9 = 3.73e-9 l.lsource n3 n7 = 3.43e-9 LDRAIN 5 - 8 LSOURCE 7 RSOURCE RLSOURCE S1A 12 S2A 14 13 13 8 S1B CA RBREAK 15 17 18 RVTEMP S2B 13 + 6 8 EGS 19 CB + - - IT 14 VBAT 5 8 EDS - + 8 22 RVTHRES spe.ebreak n11 n7 n17 n18 = 66.55 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1 spe.esg n6 n10 n6 n8 = 1 spe.evtemp n20 n6 n18 n22 = 1 spe.evthres n6 n21 n19 n8 = 1 sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod v.vbat n22 n19 = dc=1 equations { i (n51->n50) +=iscl iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/43))** 3)) } } www.onsemi.com 8 SOURCE 3 HUFA76409D3, HUFA76409D3ST SPICE Thermal Model th JUNCTION REV 10 September 1999 HUFA76409T CTHERM1 th 6 9.50e-4 CTHERM2 6 5 2.40e-3 CTHERM3 5 4 3.90e-3 CTHERM4 4 3 4.10e-3 CTHERM5 3 2 5.60e-3 CTHERM6 2 tl 4.00e-2 RTHERM1 RTHERM1 th 6 2.00e-2 RTHERM2 6 5 1.10e-1 RTHERM3 5 4 2.75e-1 RTHERM4 4 3 5.53e-1 RTHERM5 3 2 7.25e-1 RTHERM6 2 tl 7.56e-1 RTHERM2 CTHERM1 6 CTHERM2 5 RTHERM3 CTHERM3 SABER Thermal Model SABER thermal model HUFA76409T template thermal_model th tl thermal_c th, tl { ctherm.ctherm1 th 6 = 9.50e-4 ctherm.ctherm2 6 5 = 2.40e-3 ctherm.ctherm3 5 4 = 3.90e-3 ctherm.ctherm4 4 3 = 4.10e-3 ctherm.ctherm5 3 2 = 5.60e-3 ctherm.ctherm6 2 tl = 4.00e-2 rtherm.rtherm1 th 6 = 2.00e-2 rtherm.rtherm2 6 5 = 1.10e-1 rtherm.rtherm3 5 4 = 2.75e-1 rtherm.rtherm4 4 3 = 5.53e-1 rtherm.rtherm5 3 2 = 7.25e-1 rtherm.rtherm6 2 tl = 7.56e-1 } 4 RTHERM4 CTHERM4 3 RTHERM5 CTHERM5 2 RTHERM6 CTHERM6 tl www.onsemi.com 9 CASE ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. 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