IMH20TR1G

IMH20TR1G Dual Bias Resistor Transistor NPN Surface Mount • Low VCC (sat) 80 mV max at IC/IB = 50 mA/2.5 mA • High Current: IC = 600 mA max • This is a Pb−Free Device http://onsemi.com MAXIMUM RATINGS (TA = 25°C) Rating Symbol Value Unit V(BR)CBO 30 Vdc Collector−Emitter Voltage V(BR)CEO 15 Vdc Emitter−Base Voltage V(BR)EBO 5.0 Vdc IC 600 mAdc Collector−Base Voltage (6) (4) Collector Current − Continuous (5) Q1 R1 (2) (1) (3) THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Power Dissipation* PD 300 mW Junction Temperature TJ 150 °C Storage Temperature Tstg −55 to +150 °C R1 Q2 SC−74 MARKING DIAGRAM *Total for both Transistors. 6 Q1 + Q2: NPN 1 ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic Symbol Min Max Unit Collector−Emitter Breakdown Voltage (IC = 1.0 mAdc, IB = 0) V(BR)CEO 15 − Vdc Collector−Base Breakdown Voltage (IC = 50 Adc, IE = 0) V(BR)CBO 30 − Vdc Emitter−Base Breakdown Voltage (IE = 50 Adc, IC = 0) V(BR)EBO 5.0 − Vdc Collector−Base Cutoff Current (VCB = 20 Vdc, IE = 0) ICBO − 0.5 Adc Emitter−Base Cutoff Current (VEB = 4.0 V, IC = 0) IEBO − 0.5 Adc DC Current Gain (Note 1) (VCE = 5.0 Vdc, IC = 50 mAdc) hFE 100 600 − VCE(sat) − 80 mV R1 1.54 2.86 k
Collector−Emitter Saturation Voltage (IC = 50 mAdc, IB = 2.5 mAdc) Input Resistance H20 M SC−74R 318AA Style 21 H20 = Specific Device Code M = Date Code ORDERING INFORMATION Device Package Shipping† IMH20TR1G SC−74R 3000/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 1. Pulse Test: Pulse Width ≤ 300 s, D.C. ≤ 2%.  Semiconductor Components Industries, LLC, 2004 January, 2004 − Rev. 0 Publication Order Number: IMH20TR1G/D MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SC−74R CASE 318AA−01 ISSUE B 6 1 DATE 27 MAY 2005 SCALE 2:1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. D HE 4 5 3 2 6 E 1 b e c A 0.05 (0.002) L A1 q DIM A A1 b c D E e L HE q MIN 0.90 0.01 0.25 0.10 2.90 1.30 0.85 0.20 2.50 0° MILLIMETERS NOM MAX 1.00 1.10 0.06 0.10 0.37 0.50 0.18 0.26 3.00 3.10 1.50 1.70 0.95 1.05 0.40 0.60 2.75 3.00 10° − INCHES NOM 0.039 0.002 0.015 0.007 0.118 0.059 0.037 0.016 0.108 − MAX 0.043 0.004 0.020 0.010 0.122 0.067 0.041 0.024 0.118 10° GENERIC MARKING DIAGRAM* SOLDERING FOOTPRINT* 2.4 0.094 XXXM 0.95 0.037 1.9 0.074 0.95 0.037 0.7 0.028 1.0 0.039 MIN 0.035 0.001 0.010 0.004 0.114 0.051 0.034 0.008 0.099 0° SCALE 10:1 XXX M G = Specific Device Code = Date Code = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. STYLE 20: PIN 1. COLLECTOR 1 2. BASE 2 3. EMITTER 2 4. COLLECTOR 2 5. BASE 1 6. EMITTER 1 DOCUMENT NUMBER: DESCRIPTION: STYLE 21: PIN 1. COLLECTOR 1 2. EMITTER 2 3. BASE 2 4. COLLECTOR 2 5. EMITTER 1 6. BASE 1 98AON13505D SC−74R Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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