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IRFM120A
Advanced Power MOSFET
FEATURES
IEEE802.3af Compatible
BVDSS = 100 V
! Avalanche Rugged Technology
RDS(on) = 0.2 !
! Rugged Gate Oxide Technology
! Lower Input Capacitance
ID = 2.3 A
! Improved Gate Charge
! Extended Safe Operating Area
SOT-223
! Lower Leakage Current : 10 #A (Max.) @ VDS = 100V
! Lower RDS(ON) : 0.155 ! (Typ.)
2
1
3
1. Gate 2. Drain 3. Source
Absolute Maximum Ratings
Symbol
VDSS
ID
Characteristic
Value
Drain-to-Source Voltage
Units
V
100
Continuous Drain Current (TA=25%)
2.3
Continuous Drain Current (TA=70%)
1.84
&
A
IDM
Drain Current-Pulsed
VGS
Gate-to-Source Voltage
EAS
Single Pulsed Avalanche Energy
'
IAR
Avalanche Current
&
2.3
A
EAR
Repetitive Avalanche Energy
&
0.24
mJ
dv/dt
Peak Diode Recovery dv/dt
(
6.5
V/ns
2.4
W
0.019
W/%
PD
TJ , TSTG
TL
Total Power Dissipation (TA=25%) *
Linear Derating Factor *
Operating Junction and
18
A
"20
V
123
mJ
- 55 to +150
Storage Temperature Range
%
Maximum Lead Temp. for Soldering
300
Purposes, 1/8” from case for 5-seconds
Thermal Resistance
Symbol
R$JA
Characteristic
Junction-to-Ambient *
Typ.
Max.
Units
--
52
%/W
* When mounted on the minimum pad size recommended (PCB Mount).
Rev. C
N-CHANNEL
POWER MOSFET
IRFM120A
Electrical Characteristics (TA=25% unless otherwise specified)
Symbol
Characteristic
BVDSS
Drain-Source Breakdown Voltage
.BV/.TJ
VGS(th)
IGSS
IDSS
Min. Typ. Max. Units
Breakdown Voltage Temp. Coeff.
Gate Threshold Voltage
Gate-Source Leakage , Forward
Gate-Source Leakage , Reverse
Drain-to-Source Leakage Current
Static Drain-Source
RDS(on)
On-State Resistance
100
--
--
--
0.12
--
V/%
2.0
--
4.0
V
--
--
100
--
--
-100
--
--
1
--
--
10
VGS=20V
VGS=-20V
-
VDS=30V
#A
VDS=100V
VDS=80V,TA=125%
--
--
0.2
)
VGS=10V,ID=1.15A
+
S
VDS=40V,ID=1.15A
+
3.12
--
Ciss
Input Capacitance
--
370
480
Coss
Output Capacitance
--
95
110
Crss
Reverse Transfer Capacitance
--
38
45
td(on)
Turn-On Delay Time
--
14
40
Rise Time
--
14
40
Turn-Off Delay Time
--
36
90
Fall Time
--
28
70
Qg
Total Gate Charge
--
16
22
Qgs
Gate-Source Charge
--
2.7
--
Gate-Drain(“Miller”) Charge
--
7.8
--
Qgd
VDS=5V,ID=250#A
100
--
tf
See Fig 7
--
Forward Transconductance
td(off)
nA
VGS=0V,ID=250#A
ID=250#A
--
gfs
tr
V
Test Condition
pF
VGS=0V,VDS=25V,f =1MHz
See Fig 5
VDD=50V,ID=9.2A,
ns
RG=18)
See Fig 13
+,
VDS=80V,VGS=10V,
nC
ID=9.2A
See Fig 6 & Fig 12 + ,
Source-Drain Diode Ratings and Characteristics
Symbol
Characteristic
IS
Continuous Source Current
Min. Typ. Max. Units
--
--
2.3
ISM
Pulsed-Source Current
&
--
--
18
VSD
Diode Forward Voltage
+
--
--
1.5
trr
Reverse Recovery Time
--
98
Qrr
Reverse Recovery Charge
--
0.34
A
Test Condition
Integral reverse pn-diode
in the MOSFET
V
TJ=25%,IS=2.3A,VGS=0V
--
ns
TJ=25%,IF=9.2A
--
#C
diF/dt=100A/#s
Notes ;
& Repetitive Rating : Pulse Width Limited by Maximum Junction Temperature
' L=35mH, IAS=2.3A, VDD=25V, RG=27), Starting TJ =25%
( ISD*9.2A, di/dt*300A/#s, VDD*BVDSS , Starting TJ =25%
+ Pulse Test : Pulse Width = 250#s, Duty Cycle * 2%
, Essentially Independent of Operating Temperature
- Adjusted for Cisco
+
N-CHANNEL
POWER MOSFET
IRFM120A
Fig 1. Output Characteristics
Fig 2. Transfer Characteristics
VGS
15V
10 V
8.0 V
7.0 V
6.0 V
5.5V
5.0 V
Bottom : 4.5V
101
101
ID , Drain Current [A]
ID , Drain Current [A]
Top :
100
@ Notes :
1. 250 "s Pulse Test
2. TA = 25 oC
150 oC
100
25 oC
@ Notes :
1. VGS = 0 V
2. VDS = 40 V
3. 250 "s Pulse Test
- 55 oC
-1
10-1
100
10
101
2
4
6
8
10
VGS , Gate-Source Voltage [V]
VDS , Drain-Source Voltage [V]
Fig 3. On-Resistance vs. Drain Current
Fig 4. Source-Drain Diode Forward Voltage
IDR , Reverse Drain Current [A]
RDS(on) , [ #]
Drain-Source On-Resistance
0.4
VGS = 10 V
0.3
0.2
VGS = 20 V
0.1
o
@ Note : TJ = 25 C
0.0
0
10
20
30
101
100
25 oC
10-1
0.4
40
@ Notes :
1. VGS = 0 V
2. 250 "s Pulse Test
150 oC
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
ID , Drain Current [A]
VSD , Source-Drain Voltage [V]
Fig 5. Capacitance vs. Drain-Source Voltage
Fig 6. Gate Charge vs. Gate-Source Voltage
600
Ciss= Cgs+ Cgd ( Cds= shorted )
Coss= Cds+ Cgd
Crss= Cgd
400
C oss
200
00
10
@ Notes :
1. VGS = 0 V
2. f = 1 MHz
C rss
101
VDS , Drain-Source Voltage [V]
VDS = 20 V
10
VGS , Gate-Source Voltage [V]
Capacitance [pF]
C iss
VDS = 50 V
VDS = 80 V
5
@ Notes : ID = 9.2 A
0
0
5
10
15
QG , Total Gate Charge [nC]
20
N-CHANNEL
POWER MOSFET
IRFM120A
Fig 7. Breakdown Voltage vs. Temperature
Fig 8. On-Resistance vs. Temperature
3.0
RDS(on) , (Normalized)
Drain-Source On-Resistance
BVDSS , (Normalized)
Drain-Source Breakdown Voltage
1.2
1.1
1.0
0.9
0.8
-75
@ Notes :
1. VGS = 0 V
2. ID = 250 "A
-50
-25
0
25
50
75
100
125
150
2.5
2.0
1.5
1.0
@ Notes :
1. VGS = 10 V
2. ID = 4.6 A
0.5
0.0
-75
175
-50
-25
TJ , Junction Temperature [oC]
0
25
50
75
100
125
150
175
TJ , Junction Temperature [oC]
Fig 9. Max. Safe Operating Area
Fig 10. Max. Drain Current vs. Ambient Temperature
101
100 "s
1 ms
10 "s
10 ms
100 ms
100
DC
10-1
@ Notes :
1. TA = 25 oC
2.0
1.5
1.0
0.5
2. TJ = 150 oC
3. Single Pulse
10-2 -1
10
100
101
0.0
25
102
50
75
100
Thermal Response
Fig 11. Thermal Response
102
D=0.5
1
10
0.2
@ Notes :
1. Z!J A (t)=52 o C/W Max.
2. Duty Factor, D=t1 /t2
3. TJ M -TA =PD M *Z!J A (t)
0.1
0.05
100
0.02
0.01
PDM
!
t1
t2
single pulse
10- 1
10- 5
10- 4
10- 3
125
TA , Ambient Temperature [oC]
VDS , Drain-Source Voltage [V]
Z JA(t) ,
ID , Drain Current [A]
Operation in This Area
is Limited by R DS(on)
ID , Drain Current [A]
2.5
102
10- 2
10- 1
100
t1 , Square Wave Pulse Duration
101
102
[sec]
103
150
N-CHANNEL
POWER MOSFET
IRFM120A
Fig 12. Gate Charge Test Circuit & Waveform
* Current Regulator ”
VGS
Same Type
as DUT
50K!
Qg
200nF
12V
10V
300nF
VDS
Qgs
VGS
Qgd
DUT
3mA
R1
R2
Current Sampling (IG)
Resistor
Current Sampling (ID)
Resistor
Charge
Fig 13. Resistive Switching Test Circuit & Waveforms
RL
Vout
Vout
90%
VDD
Vin
( 0.5 rated VDS )
RG
DUT
Vin
10%
10V
td(on)
tr
td(off)
t on
tf
t off
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
BVDSS
1
EAS = ---- LL IAS2 -------------------2
BVDSS -- VDD
LL
VDS
Vary tp to obtain
required peak ID
BVDSS
IAS
ID
RG
C
DUT
ID (t)
VDD
VDS (t)
VDD
10V
tp
tp
Time
N-CHANNEL
POWER MOSFET
IRFM120A
Fig 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
+
VDS
--
IS
L
Driver
VGS
RG
VGS
VGS
( Driver )
Same Type
as DUT
VDD
• dv/dt controlled by /G
• IS controlled by Duty Factor 0?
Gate Pulse Width
D = -------------------------Gate Pulse Period
10V
IFM , Body Diode Forward Current
IS
( DUT )
di/dt
IRM
Body Diode Reverse Current
VDS
( DUT )
Body Diode Recovery dv/dt
Vf
Body Diode
Forward Voltage Drop
VDD
6.70
6.20
0.10
B
C B
3.10
2.90
3.25
4
1.90
A
3.70
3.30
1
6.10
1.90
3
0.84
0.60
2.30
2.30
0.95
4.60
0.10
C B
LAND PATTERN RECOMMENDATION
SEE DETAIL A
1.80 MAX
C
0.08
C
0.10
0.00
10°
5°
GAGE
PLANE
R0.15±0.05
R0.15±0.05
10° TYP
0°
0.25
SEATING
PLANE
10°
5°
0.60 MIN
1.70
DETAIL A
SCALE: 2:1
0.35
0.20
7.30
6.70
NOTES: UNLESS OTHERWISE SPECIFIED
A) DRAWING BASED ON JEDEC REGISTRATION
TO-261C, VARIATION AA.
B) ALL DIMENSIONS ARE IN MILLIMETERS.
C) DIMENSIONS DO NOT INCLUDE BURRS
OR MOLD FLASH. MOLD FLASH OR BURRS
DOES NOT EXCEED 0.10MM.
D) DIMENSIONING AND TOLERANCING PER
ASME Y14.5M-2009.
E) LANDPATTERN NAME: SOT230P700X180-4BN
F) DRAWING FILENAME: MKT-MA04AREV3
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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