LA6585MC-AH

LA6585MC BTL Driver Single‐phase Full‐wave for Motor Driver Monolithic Digital IC Overview www.onsemi.com The LA6585MC is single-phase bipolar fan motor is driven, through BTL output linear drive, at high efficiency, low power, and low sound by suppressing the reactive power. Lock protection, rotary signal circuits are incorporated, which is optimum for the notebook PC, consumer equipment power supply, car audio system, CPU cooler, etc. that require high reliability and low noise. 10 1 SOIC−10 NB CASE 751BQ Functions and Features • Pre-driver for Single-phase Full-wave Drive • Single-phase Full-wave Linear Drive by BTL Output • • • • • • • MARKING DIAGRAM (Gain Resistance 1 kW−360 kW, 51 dB): No Switching Noise, which is Optimum for Equipment Requiring Silence, such as Consumer Equipment Power Supply, Car Audio System, etc. Low-voltage Operation Possible, with Wide Operating Voltage Range (2.2 to 14.0 V) Low Saturation Output (Upper + Lower Saturation Voltage: VOsat (Total) = 1.2 V Typ, IO = 250 mA): High Coil Efficiency with Low Current Drain. Additionally, IC itself Generates only Small Heat Built-in Lock Protection and Automatic Reset Circuits Built-in FG & RD Outputs Built-in Hall bias (VHB = 1.5 V) Thermal Protection Circuit: When the Large Current Flows due to Output Short-circuit and the IC Chip Temperature Exceeds 180°C, this Protective Circuit Suppresses the Drive Current to Prevent Burn and Damage to IC. Extra-small & High Heat Capacity Package 10 1 A6585 A L Y W G A6585 ALYWX G = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package PIN ASSIGNMENT 1 10 In+ RD HB FG IN− VCC CT OUT2 OUT1 GND 5 (Top View) 6 ORDERING INFORMATION See detailed ordering and shipping information on page 5 of this data sheet. © Semiconductor Components Industries, LLC, 2013 March, 2018 − Rev. 1 1 Publication Order Number: LA6585MC/D LA6585MC SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS (TA = 25°C) Symbol VCC max Pd max Parameter Conditions Ratings Supply Voltage Allowable Power Dissipation Mounted on a specified board (Note 1) Unit 15 V 750 mW IOUT max Output Current 0.7 A VOUT max Output Withstand Voltage 15 V VRD/FG max RD/FG Output Pin Output Withstand Voltage 15 V IRD/FG max RD/FG Output Current 10 mA IB max 10 mA Topr Operating Temperature HB Output Current −30 to +90 °C Tstg Storage Temperature −55 to +150 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Mounted on a specified board: 114.3 mm × 76.1 mm × 1.6 mm glass epoxy. OPERATING CONDITIONS (TA = 25°C) Symbol VCC VICM Parameter Conditions Supply Voltage Common-phase Input Voltage Range of Hall Input Ratings Unit 2.2 to 14.0 V 0 to VCC−1.5 V Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. ELECTRICAL CHARACTERISTICS (TA = 25°C, VCC = 12 V, unless otherwise specified) Symbol ICC1 Parameter Circuit Current ICC2 Conditions During drive (CT = L) During lock protection (CT = H) Min Typ Max Unit 3 6 9 mA 2.5 5 7.5 mA ICT1 Lock Detection Capacitor Charge Current 0.9 1.2 1.5 mA ICT2 Capacitor Discharge Current 0.10 0.18 0.25 mA RCT Capacitor Charge and Discharge Current Ratio 5 6.5 8 − VCT1 CT Charge Voltage 1.3 1.5 1.7 V VCT2 CT Discharge Voltage 0.3 0.5 0.7 V VOL OUT Output L Saturation Voltage IO = 200 mA − 0.25 0.45 V VOH OUT Output H Saturation Voltage IO = 200 mA − 0.95 1.2 V VHN Hall Input Sensitivity Zero peak value (including offset and hysteresis) − 7 15 mV VHB RCD = ICT1/ICT2 Hall Bias Voltage IHB = 5 mA 1.3 1.5 1.7 V VFG/RD FG/RD Output Pin L Voltage IRD/FG = 5 mA − 0.15 0.3 V IFG/RDL FG/RD Output Pin Leak Current VRD/FG = 15 V − 1 30 mA Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. www.onsemi.com 2 LA6585MC TRUTH TABLE IN− IN+ CT OUT1 OUT2 FG RD Mode H L L H L L L During rotation L H L H H − − Off Off − H During overheat protection H Allowable Power Dissipation, Pd max − mW 1000 800 750 Specified board: 114.3 × 76.1 × 1.6 mm glass epoxy board 600 400 360 200 0 −30 0 30 60 90 Ambient Temperature, TA − 5C Figure 1. Pd max − TA www.onsemi.com 3 120 LA6585MC BLOCK DIAGRAM VCC 1.5VRG HB IN+ OUT1 H OUT2 IN− GND FG Control circuit Charge discharge RD Discharge pulse CT = 0.47 to 1 mF Figure 2. Block Diagram www.onsemi.com 4 LA6585MC APPLICATION CIRCUIT Di *4 Cr *1 VCC R2 *2 RD FG HB H IN− OUT1 IN+ OUT2 HB R1 *3 *5 CT GND H IN− IN+ On board element Figure 3. Sample Application Circuit *3: To obtain Hall bias from the HB pin, carry out constant-voltage bias at about 1.5 V, which enables the Hall element to generate the stable Hall output satisfactory in temperature characteristics. Adjustment of the Hall output amplitude is made with R1. (When VCC = 12 V, the step *2 above proves advantageous for IC heat generation.) *4: Keep this open when not using. *5: When the wiring from the Hall output to IC Hall input is long, noise may be carried through the wiring. In this case, insert the capacitor as shown in the figure. *1: When the breakdown protective DI at reverse connection is to be used, it is necessary to insert the capacitor Cr to secure the regenerative current route. Similarly, Cr must be provided to enhance the reliability when there is no capacitor near the fan power line. *2: To obtain Hall bias from VCC, carry out bias to VCC with resister R2 as shown in the figure. Linear driving is made through voltage control of the coil by amplifying the Hall output. When the Hall element output is large, the startup performance and efficiency are improved. Adjustment of the Hall element can reduce the noise further. ORDERING INFORMATION Package Wire Bond Shipping† (Qty / Packing) LA6585MC−AH SOIC−10 NB (Pb−Free / Halogen Free) Au wire 2,000 / Tape & Reel LA6585MC−AH−M SOIC−10 NB (Pb−Free / Halogen Free) Au wire 2,000 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 5 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOIC−10 NB CASE 751BQ ISSUE B 10 1 SCALE 1:1 DATE 26 NOV 2013 2X 0.10 C A-B D D A 2X F 0.10 C A-B 10 6 H E 1 5 0.20 C 10X B 2X 5 TIPS L2 b 0.25 A3 L DETAIL A M C SEATING PLANE C A-B D TOP VIEW 10X h 0.10 C 0.10 C X 45 _ M A e A1 C SIDE VIEW SEATING PLANE DETAIL A END VIEW DIM A A1 A3 b D E e H h L L2 M 10 1.00 PITCH 1 6.50 10X 1.18 1 DIMENSION: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON52341E SOIC−10 NB MILLIMETERS MIN MAX 1.25 1.75 0.10 0.25 0.17 0.25 0.31 0.51 4.80 5.00 3.80 4.00 1.00 BSC 5.80 6.20 0.37 REF 0.40 0.80 0.25 BSC 0_ 8_ GENERIC MARKING DIAGRAM* RECOMMENDED SOLDERING FOOTPRINT* 10X 0.58 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.10mm TOTAL IN EXCESS OF ’b’ AT MAXIMUM MATERIAL CONDITION. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.15mm PER SIDE. DIMENSIONS D AND E ARE DETERMINED AT DATUM F. 5. DIMENSIONS A AND B ARE TO BE DETERMINED AT DATUM F. 6. A1 IS DEFINED AS THE VERTICAL DISTANCE FROM THE SEATING PLANE TO THE LOWEST POINT ON THE PACKAGE BODY. XXXXX ALYWX G XXXXX = Specific Device Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G”, may or not be present. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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