LB11852FV
Monolithic Digital IC
For Fan Motor
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Single-phase Full-wave Pre-driver
with Speed Control Function
Overview
The LB11852FV is a single-phase bipolar driving motor pre-driver with a speed control function based on speed
feedback. With a small number of external parts, a highly efficient and very quiet variable-speed drive fan motor with
low power consumption and high rotational accuracy can be implemented. The LB11852FV, integrated in a miniature
package, is best suited for driving small fan motors requiring speed control.
Features
Single-phase full-wave driving pre-driver
With a PMOS-NMOS device used as the external power transistor, low saturation output and a single-phase
full-wave drive enable a high-efficiency drive with low power consumption.
Speed control circuit incorporated
Compared with open-loop control, a closed-loop control function that uses speed feedback to control the speed
makes it possible to improve the rotational speed accuracy and reduce the variations in the rotational speed
caused by fluctuations in the supply voltage or load. The separately excited upper direct PWM method is
featured as the variable speed system.
Variable speed control is possible with external PWM input or analog voltage input
The speed control input signal is compatible with PWM duty ratio and analog voltages.
Soft start circuit incorporated
Minimum speed setting pin
The minimum speed can be set using an external resistor.
Current limiting circuit incorporated
Chopper type current limit at startup or lock.
Reactive current cut circuit incorporated
Reactive current before phase changeover is cut, ensuring highly silent and low power-consumption drive.
Automatic resetting type constraint circuit incorporated
FG (rotational speed detection) output
SSOP20J (225 mil)
ORDERING INFORMATION
See detailed ordering and shipping information on page 13 of this data sheet.
© Semiconductor Components Industries, LLC, 2017
August 2017 - Rev. 2
1
Publication Order Number :
LB11852FV/D
LB11852FV
Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter
Symbol
Conditions
Ratings
Unit
VCC pin maximum supply voltage
VCC max
18
V
OUTN pin maximum output current
IOUTN max
20
mA
OUTP pin maximum Sink current
IOUTP max
20
mA
OUT pin output withstand voltage
VOUT max
18
V
CTL, C pin withstand voltage
CTL, C max
7
V
LIM pin withstand voltage
LIM max
7
V
FG output pin output withstand voltage
FG max
19
V
FG output current
FG max
10
mA
10
mA
5VREG pin maximum output current
Allowable power dissipation
I5VREG max
Pd max
Mounted on a specified board *1
0.8
W
Operating temperature
Topr
-30 to 95
C
Storage temperature
Tstg
-55 to 150
C
*1 Mounted on a specified board : 114.3mm76.1mm1.6mm, glass epoxy
*2 Tj max = 150°C. Use the device in a condition that the chip temperature does not exceed Tj = 150°C during operation.
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
Recommended Operating Conditions at Ta = 25C
Parameter
Symbol
Conditions
Ratings
Unit
VCC supply voltage 1
VCC1
VCC pin
VCC supply voltage 2
VCC2
VCC -5VREG
4.5 to 5.5
V
CTL input voltage range
VCTL
0 to 5VREG
V
LIM input voltage range
VLIM
0 to 5VREG
V
Hall input common phase input
VICM
0.2 to 3
V
5.5 to 16
V
voltage range
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended
Operating Ranges limits may affect device reliability.
Electrical Characteristics at Ta 25C, VCC = 12V, unless otherwise specified
Parameter
Circuit current
5VREG voltage
Symbol
Conditions
ICC1
During drive
ICC2
During lock protection
5VREG
Ratings
min
typ
12
I5VREG = 5mA
Unit
max
15
mA
mA
12
15
4.8
5.0
5.2
V
mV
Current limiting voltage
VLIM
190
210
230
CPWM pin H level voltage
VCRH
2.8
3.0
3.2
V
CPWM pin L level voltage
VCRL
0.9
1.1
1.3
V
CPWM pin charge current
ICPWM1
VCPWM = 0.5V
24
30
36
A
CPWM pin discharge current
ICPWM2
VCPWM = 3.5V
21
27
33
CPWM oscillation frequency
FPWM
CT pin H level voltage
VCTH
CT pin L level voltage
VCTL
CT pin charge current
ICT1
VCT = 2V
CT pin discharge current
ICT2
CT pin charge/discharge current ratio
RCT
C = 220pF
30
A
kHz
2.8
3.0
3.2
V
0.9
1.1
1.3
V
1.6
2.0
2.5
μA
VCT = 2V
0.16
0.20
0.25
ICT1/ICT2
8
10
12
μA
times
OUTN pin output H voltage
VONH
IO = 10mA
VCC-0.85
VCC-1.0
V
OUTN pin output L voltage
VONL
IO = 10mA
0.9
1.0
V
OUTP pin output L voltage
VOPL
IO = 10mA
0.5
0.65
V
VHN
IN+, IN- differential voltage
15
25
mV
Hall input sensitivity
(including offset and hysteresis)
Continued on next page.
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2
LB11852FV
Continued from preceding page.
Parameter
Symbol
Conditions
FG output L voltage
VFGL
IFG = 5mA
FG pin leak current
IFGL
VFG = 19V
EO pin output H voltage
VEOH
IEO1 = -0.2mA
EO pin output L voltage
VEOL
IEO1 = 0.2mA
RC pin output H voltage
RC pin output L voltage
Ratings
min
typ
Unit
max
0.15
0.30
V
30
A
VREG-1.2
VREG-0.8
V
0.8
1.1
V
VRCH
3.2
3.45
3.7
V
VRCL
0.7
0.8
1.05
V
VRCCLP
1.3
1.5
1.7
V
CTL pin input H voltage
VCTLH
2.0
VREG
V
CTL pin input L voltage
VCTLL
0
1.0
V
CTL pin input open voltage
VCTLO
VREG-0.5
VREG
V
CTL pin H input H current
ICTLH
VFGIN = 5VREG
10
A
CTL pin L input L current
ICTLL
VFGIN = 0V
RC pin clamp voltage
C pin output H voltage
C pin output L voltage
-10
0
-120
-90
A
VCH
VREG-0.3
VREG-0.1
V
2.0
VCL
1.8
2.2
V
LIM pin input bias current
IBLIM
-1
1
A
LIM pin common phase input voltage
VILIM
2.0
VREG
V
1.6
A
VREG
V
range
SOFT pin charge current
ICSOFT
1.0
SOFT pin operating voltage range
VISOFT
2.0
1.3
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be
indicated by the Electrical Characteristics if operated under different conditions.
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3
LB11852FV
Package Dimensions
unit : mm
SSOP20J (225mil)
CASE 565AP
ISSUE A
SOLDERING FOOTPRINT*
GENERIC
MARKING DIAGRAM*
5.80
1.0
(Unit: mm)
0.32
XXXXXXXXXX
YMDDD
0.50
XXXXX = Specific Device Code
Y = Year
M = Month
DDD = Additional Traceability Data
NOTE: The measurements are not to guarantee but for reference only.
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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4
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ ”,
may or may not be present.
LB11852FV
Pd max -- Ta
Allowable power dissipation, Pd max – W
1.0
0.8
When mounted on the thermal
resistance evaluation board
0.80
0.6
0.4
Independent IC
0.35
0.30
0.2
0.13
0
– 30
0
30
60
90
120
Ambient temperature, Ta – °C
Truth table
Lock protection CPWM = H
IN-
IN+
H
L
L
H
H
L
L
H
CT
L
H
OUT1P
OUT1N
OUT2P
OUT2N
FG
Mode
L
L
OFF
H
L
OUT1 2 drive
OFF
H
L
L
OFF
OUT2 1 drive
OFF
L
OFF
H
L
OFF
H
OFF
L
OFF
Lock protection
Speed control CT = L
EO
CPWM
L
H
H
L
IN-
IN+
OUT1P
OUT1N
OUT2P
OUT2N
Mode
H
L
L
L
OFF
H
OUT1 2 drive
L
H
OFF
H
L
L
OUT2 1 drive
H
L
OFF
L
OFF
H
L
H
OFF
H
OFF
L
Pin Assignment
OUT2P 1
20 OUT1P
OUT2N 2
19 OUT1N
VCC 3
18 SGND
SENCE 4
17 5VREG
C 5
16 EO
CTL 6
15 EI
RC 7
14 LIM
SOFT 8
13 CT
CPWM 9
12 IN+
FG 10
11 IN-
Top view
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5
Regeneration mode
VCC
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6
CTL
signal
CTL
C
SOFT
LIM
RC
5VREG
VCC
CTL
VREF
1shot
multi
VREG
EI
EDEG
Thermal shat down
FG
EO
F
G
5VREG
IN+
HALL
CT
IN-
CPW
M
Oscillation
CONTROL
CIRCUIT
Discharge circuit
SENSE
5VREG
GND
OUT2
P
OUT2
N
OUT1
P
OUT1
N
LB11852FV
Block Diagram
LB11852FV
Sample Application Circuit
*3
1μF/25V
Rp = 1kΩ
1
3
2
100Ω
4
RF
1μF/25V
RFG =
10kΩ to 100kΩ
*2
VCC
*8
5VREG
SENSE
RC
LIM
SOFT
OUT1P
1
OUT1N
2
OUT2P
3
OUT2N
4
CT
EL
SGND
*1
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7
H
IN+
CTL
EO
5VREG
*4
IN-
C
CTLsignal
*7
*5
CP = 1μF
*6
CP = 220pF
30kHz
CPWM
LB11852FV
Description of Pre-driver Bock
*1 : Power-GND wiring
The SGND is connected to the control circuit power supply system.
*2 : Power stabilization capacitor
For the power stabilization capacitor on the signal side, use a capacitor of 0.1F or more. Connect the capacitor
between VCC and GND with a thick and along the shortest possible route.
*3 : Power-side power stabilization capacitor
For the power-side power stabilization capacitor, use a capacitor of 1F or more. Connect the capacitor between the
power-side power supply and GND with a thick and along the shortest possible route.
*4 : IN+, IN- pins
Hall signal input pins
Wiring should be short to prevent noise from being carried.
If noise is carried, insert a capacitor between the IN+ and IN- pins.
The Hall input circuit functions as a comparator with hysteresis (15mV).
It also has a soft switch zone with 30mV (input signal difference voltage).
It is also recommended that the Hall input level should be a minimum of 100mV (p-p).
*5 : CPWM pin
Pin to connect the capacitor used to generate the PWM basic frequency
Use of CP = 200pF causes oscillation at f = 30kHz, which is the basic frequency of PWM.
As this is also used for the current limiter reset signal, a capacitor must be connected even if the speed is not going to
be controlled.
*6 : CT pin
Pin to connect the capacitor used for lock detection
The constant-current charging and constant-current discharging circuits incorporated cause locking when the pin
voltage reaches 3.0V, and releasing the lock protection when it drops to 1.0V.
Connect this pin to the GND when it is not to be used (locking not necessary).
*7 : SENSE pin
Current limiter detection pin
When the pin voltage exceeds 0.21V, the current limiter is activated, and operation enters lower regeneration mode.
Connect this pin to the GND when it is not to be used.
*8 : FG pin
Rotational speed detection pin
This is an open collector output that can detect the rotational speed using the FG output corresponding to the phase
changeover.
Keep this pin open when it is not to be used.
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LB11852FV
Description of Speed Control Block
1. Speed control diagram
The slope is determined by the RC pin constant.
(RPM)
CR time constant large
CR time constant small
Rotational speed
Minimum speed
Determined by LIM pin voltage
0%
Minimum speed setting rotation
Small ← CTL signal (PWMDUTY) → Large
Large ← EO pin voltage (V)
→ Small
Variable speed
On-duty small
100%
Full speed
On-duty large
CTL pin
5VREG
LIM voltage
EO pin
EO voltage
0V
2. Timing at startup (soft start)
VCC pin
CTL pin
Stop
Full speed
Soft start
The slope changes depending on the
capacitance of the SOFT pin
(large capacitance large slope).
SOFT pin
Stop
Full speed
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LB11852FV
2. Supplementary description of operations
By inputting the duty pulses, a feedback loop is formed inside the LB11852 IC to establish the FG period (rotational
speed of the motor) that corresponds to the control voltage of the pulses.
LB11852
FG
CTL
Signal
CTL
Speed
control block
Closed
Pre-driver
block
Feed-Back
Loop
CONTROL
SIGNAL
The operation inside the IC is as flows. pulse signals are created from the edges of the FG signals as shown in the
figure below, and using these signals as a reference, waveforms with a pulse width determined by the CR time constant
are generated using a one-shot multivibrator. These pulse waveforms are then integrated to control the duty ratio of the
pre-driver output as the control voltage.
FG
Edge pulse
Slope determined
by CR time
constant
RC pin
One-shot
multivibrator
output
TRC (sec) = 1.15RC
By changing the pulse width as determined by the CR time constant, the VCTL versus rotational speed slope can be
adjusted as shown in the speed control diagram in the previous section.
However, since pulses that are determined by the CR time constant are used, the CR variations are output as-is as the
speed control error.
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LB11852FV
4. Procedure for calculating the constant
RC pin
The slope shown in the speed control diagram is determined by the constant of the RC pin.
(RPM)
Motor
at maximum speed
0%
CTL Duty(%)
100%
1) Obtain the FG signal frequency fFG (Hz) at the maximum rotational speed of the motor
(with two FG pulses per rotation).
fFG (Hz) = 2 rpm/60 (1)
2) Obtain the time constant of the components connected to the RC pin
(use the duty ratio (example : 100% = 1.0 or 60% = 0.6) as the CTL duty ratio for achieving the maximum rotational
speed).
R C = Duty ratio/ (3.3 1.1 fFG) (2)
3) Obtain the resistance and the capacitance of the capacitor.
Based on the discharge capability of the RC pin, the capacitance of the capacitor which can be used is in the range of
0.01F to 0.015F.
Therefore, obtain the appropriate resistance from the result of (2) above using the formula in (3) or (4) below.
R = (R C)/0.01F (3)
R = (R C)/0.015F (4)
The temperature characteristics of the curve are determined by the temperature characteristics of the capacitor of the
RC pin. To minimize the variations in the rotational speed caused by temperature, a capacitor with excellent
temperature characteristics must be used.
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LB11852FV
LIM pin
The minimum speed is determined by the voltage of the LIM pin.
(RPM)
Maximum speed 10000
8000
6000
4000
Minimum
speed setup
2000
0%
5V
CTL Duty(%)
CVO pin voltage (V)
100%
2V
1) Obtain the ratio of the minimum speed required to the maximum speed.
Ra = Minimum/maximum speed (1)
In the example shown in the figure above : Ra = minimum/maximum speed = 3000/10000 = 0.3
2) Obtain the product of the duty ratio at which the maximum speed is achieved and the value in formula (1).
Ca = Maximum speed duty ratio Ra (2)
In the example given : Ca = maximum speed duty ratio Ra = 0.8 0.3 = 0.24
3) Obtain the required LIM pin voltage.
LIM = 5 - (3 Ca) (3)
In the example given : LIM = 5 - (3 Ca) = 5 - (3 0.24) 4.3V
4) Divide the resistance of 5VREG to generate the LIM voltage.
In the example given, the voltage is 4.3V so the resistance ratio is 1 : 6.
The resistance is 10k between 5VREG and LIM and 62k between LIM and GND.
5VREG
LIM
VREF
SOFT
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LB11852FV
C pin
In order to connect a capacitor capable of smoothing the pin voltage to the C pin, the correlation given in the following
equation must be satisfied when f (Hz) serves as the input frequency of the CTL pin. (R is incorporated inside the IC,
and it is 180k (typ.).)
1/f = t CR
The higher the capacitance of the capacitor, the slower the response to changes in the input signals.
5VREF
A capacitor capable of the smoothing
pin voltage is connected here
1/f = t < CR
Inverted waveform of CTL pin input
(same frequency)
C pin
CTL pin
CTL circuit
VREF circuit
180kΩ
ORDERING INFORMATION
Device
LB11852FV-TLM-H
Package
SSOP20J (225mil)
(Pb-Free / Halogen Free)
Shipping (Qty / Packing)
LB11852FV-TLM-E
SSOP20J (225mil)
(Pb-Free)
2000 / Tape & Reel
LB11852FV-W-AH
SSOP20J (225mil)
(Pb-Free / Halogen Free)
2000 / Tape & Reel
2000 / Tape & Reel
† For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel
Packaging Specifications Brochure, BRD8011/D. http://www.onsemi.com/pub_link/Collateral/BRD8011-D.PDF
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