LC75834E, LC75834W, LC75834JE
1/4-Duty General-Purpose
LCD Driver
Overview
The LC75834E, LC75834W, and LC75834JE are 1/4 duty general-purpose
LCD drivers that can be used for frequency display in electronic tuners under
the control of a microcontroller. The LC75834E and LC75834W can drive an
LCD with up to 136 segments directly, the LC75834JE can drive an LCD with
up to 120 segments directly. The LC75834E and LC75834W and LC75834JE
can also control up to 8 general-purpose output ports. Since the LC75834E,
LC75834W, and LC75834JE use separate power supply systems for the LCD
drive block and the logic block, the LCD driver block power-supply voltage
can be set to any voltage in the range 2.7 to 6.0 V, regardless of the logic block
power-supply voltage.
Features
• Supports both 1/4 duty 1/2 bias and 1/4 duty 1/3 bias LCD drive under serial
data control.
LC75834E, LC75834W : up to 136 segments
LC75834JE
: up to 120 segments
(without the S9, S18, S27, S34 segment output pins from the LC75834E,
LC75834W)
• Serial data input supports CCB* format communication with the system
controller.
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PQFP48 14x14 / QIP48E
[LC75834E]
SPQFP48 7x7 / SQFP48
[LC75834W]
• Serial data control of the power-saving mode based backup function and all
the segments forced off function
• Serial data control of switching between the segment output port and the
general-purpose output port functions
• High generality, since display data is displayed directly without decoder
intervention.
PQFP44 10x10 / QIP44M
[LC75834JE]
• Independent VLCD for the LCD driver block
(VLCD can be set to any voltage in the range 2.7 to 6.0 V, regardless of the
logic block power-supply voltage.)
• The INH pin can force the display to the off state.
• RC oscillator circuit
* Computer Control Bus (CCB) is an ON Semiconductor’s original bus format and
the bus addresses are controlled by ON Semiconductor.
ORDERING INFORMATION
See detailed ordering and shipping information on page 22 of this data sheet.
© Semiconductor Components Industries, LLC, 2017
July 2017 - Rev. 1
1
Publication Order Number :
LC75834E_W_JE/D
LC75834E, LC75834W, LC75834JE
Specifications
Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V
Parameter
Symbol
Maximum supply voltage
Conditions
Ratings
Unit
VDD max
VDD
–0.3 to +7.0
V
VLCD max
–0.3 to +7.0
V
VIN 1
VLCD
CE, CL, DI, INH
VIN 2
OSC
VIN 3
VLCD 1, VLCD 2
Input voltage
Output voltage
Output current
Allowable power dissipation
VOUT 1
OSC
VOUT 2
S1 to S34, COM1 to COM4, P1 to P8
IOUT 1
S1 to S34
–0.3 to +7.0
V
–0.3 to VDD + 0.3
V
–0.3 to VLCD + 0.3
V
–0.3 to VDD + 0.3
V
–0.3 to VLCD + 0.3
300
V
μA
IOUT 2
COM1 to COM4
3
mA
IOUT 3
P1 to P8
5
mA
Pd max
Ta = 85°C
150
mW
Operating temperature
Topr
–40 to +85
°C
Storage temperature
Tstg
–55 to +125
°C
Note: The LC75834JE do not have the S9, S18, S27 S34 output pins.
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
Allowable Operating Ranges at Ta = –40 to +85°C, VSS = 0 V
Parameter
Supply voltage
Input voltage
Input high level voltage
Input low level voltage
Symbol
Conditions
Ratings
min
typ
max
Unit
VDD
VDD
2.7
6.0
V
VLCD
VLCD
2.7
6.0
V
VLCD1
VLCD1
2/3 VLCD
VLCD
V
VLCD2
VLCD2
1/3 VLCD
VLCD
V
6.0
V
VIH
VIL
CE, CL, DI, INH
0.8 VDD
CE, CL, DI, INH
0
Recommended external resistance
ROSC
Recommended external capacitance
COSC
OSC
Guaranteed oscillation range
fOSC
OSC
OSC
0.2 VDD
680
25
50
V
k
43
pF
100
kHz
Data setup time
tds
CL, DI: Figure 2
160
Data hold time
tdh
CL, DI: Figure 2
160
ns
CE wait time
tcp
CE, CL: Figure 2
160
ns
CE setup time
tcs
CE, CL: Figure 2
160
ns
CE hold time
tch
CE, CL: Figure 2
160
ns
High level clock pulse width
tøH
CL: Figure 2
160
ns
Low level clock pulse width
tøL
CL: Figure 2
160
ns
ns
Rise time
tr
CE, CL, DI: Figure 2
160
Fall time
tf
CE, CL, DI: Figure 2
160
INH switching time
tc
INH, CE: Figure 3
10
ns
ns
μs
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended
Operating Ranges limits may affect device reliability.
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2
LC75834E, LC75834W, LC75834JE
Electrical Characteristics for the Allowable Operating Ranges
Parameter
Symbol
Conditions
Hysteresis
VH
CE, CL, DI, INH
Input high level current
IIH
CE, CL, DI, INH; VI = 6.0 V
Input low level current
Output high level voltage
Output low level voltage
Output middle level voltage*1
Oscillator frequency
Current drain
IIL
Ratings
min
typ
Unit
max
0.1 VDD
CE, CL, DI, INH; VI = 0 V
V
5.0
μA
–5.0
μA
VOH 1
S1 to S34; IO = –20 μA
VLCD – 0.9
V
VOH 2
COM1 to COM4; IO = –100 μA
VLCD – 0.9
V
VOH 3
P1 to P8; IO = –1 mA
VLCD – 0.9
VOL 1
S1 to S34; IO = 20 μA
0.9
V
VOL 2
COM1 to COM4; IO = 100 μA
0.9
V
VOL 3
P1 to P8; IO = 1 mA
0.9
V
VMID 1
COM1 to COM4; 1/2 bias,
IO = ±100 μA
1/2 VLCD – 0.9
1/2 VLCD + 0.9
V
VMID 2
S1 to S34; 1/3 bias,
IO = ±20 μA
2/3 VLCD – 0.9
2/3 VLCD + 0.9
V
VMID 3
S1 to S34; 1/3 bias,
IO = ±20 μA
1/3 VLCD – 0.9
1/3 VLCD + 0.9
V
VMID 4
COM1 to COM4; 1/3 bias,
IO = ±100 μA
2/3 VLCD – 0.9
2/3 VLCD + 0.9
V
VMID 5
COM1 to COM4; 1/3 bias,
IO = ±100 μA
1/3 VLCD – 0.9
1/3 VLCD + 0.9
V
fOSC
OSC; ROSC = 43 k , COSC = 680 pF
IDD 1
VDD; power saving mode
IDD 2
ILCD 1
VDD; VDD = 6.0 V, output open, fosc = 50 k Hz
VLCD; power saving mode
ILCD 2
VLCD; VLCD = 6.0 V, output open
1/2 bias, fosc = 50 k Hz
ILCD 3
VLCD; VLCD = 6.0 V, output open
1/3 bias, fosc = 50 k Hz
40
V
50
60
kHz
5
μA
460
μA
5
μA
100
200
μA
60
120
μA
230
Note: *1 Excluding the bias voltage generation divider resistors built in the VLCD1 and VLCD2. (See Figure 1.)
The LC75834JE do not have the S9, S18, S27, S34 output pins.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be
indicated by the Electrical Characteristics if operated under different conditions.
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3
LC75834E, 75834W, 75834JE
VLCD
VLCD1
To the common segments drivers
VLCD2
Except these resistors
VSS
Figure 1
1. When CL is stopped at the low level
VIH
CE
VIL
tøH
CL
tr
DI
tøL
VIH
50%
VIL
tf
tcp
tcs
tch
VIH
VIL
tds
tdh
2. When CL is stopped at the high level
VIH
CE
VIL
tøL
tøH
CL
tf
VIH
50%
VIL
tr
tcp
tcs
tch
VIH
VIL
DI
tds
tdh
Figure 2
Page 4
LC75834E, 75834W, 75834JE
25
24
LC75834E
LC75834W
48
1
13
12
S24
S23
S22
S21
S20
S19
S18
S17
S16
S15
S14
S13
COM4
VDD
VLCD
VLCD1
VLCD2
VSS
OSC
INH
CE
CL
DI
33
34
23
22
LC75834JE
44
1
12
11
S24
S23
S22
S21
S20
S19
S17
S16
S15
S14
S13
P1/S1
P2/S2
P3/S3
P4/S4
P5/S5
P6/S6
P7/S7
P8/S8
S10
S11
S12
36
37
P1/S1
P2/S2
P3/S3
P4/S4
P5/S5
P6/S6
P7/S7
P8/S8
S9
S10
S11
S12
COM3
COM4
VDD
VLCD
VLCD1
VLCD2
VSS
OSC
INH
CE
CL
DI
COM3
COM2
COM1
S33
S32
S31
S30
S29
S28
S26
S25
COM2
COM1
S34
S33
S32
S31
S30
S29
S28
S27
S26
S25
Pin Assignments
COMMON
DRIVER
S2/P2
S1/P1
S9
S8/P8
S34
S33
COM1
COM2
COM4
COM3
Block Diagram
SEGMENT DRIVER & LATCH
INH
OSC
CLOCK
GENERATOR
SHIFT REGISTER
VDD
VLCD
VLCD1
ADDRESS
DETECTOR
VLCD2
CE
CL
DI
VSS
Note: The LC75834JE do not have the S9, S18, S27, S34 output pins.
Page 5
LC75834E, 75834W, 75834JE
Pin Functions
Pin No.
Active
I/O
Handling
when unused
Segment outputs for displaying the display data transferred by serial data
input. The pins S1/P1 to S8/P8 can be used as general-purpose output ports
when so set up by the control data.
—
O
Open
31
32
33
34
Common driver outputs.
The frame frequency fO is given by: fO = (fOSC/512) Hz.
—
O
Open
44
40
Oscillator connection
An oscillator circuit is formed by connecting an external resistor and capacitor
to this pin.
—
I/O
VDD
46
47
48
42
43
44
Serial data transfer inputs. These
pins are connected to the control
microprocessor.
I
GND
L
I
GND
Pin
LC75834E,
75834W
LC75834JE
S1/P1 to
S8/P8
S9 to S34
1 to 8
1 to 8
9 to 34
9 to 30
COM1
COM2
COM3
COM4
35
36
37
38
OSC
CE
CL
DI
Function
CE: Chip enable
CL: Synchronization clock
DI: Transfer data
H
—
INH
45
41
Display off control input
•INH = low (VSS): Off
S1/P1 to S8/P8 = Low
(These pins are forcible set to the segment output port
function and fixed at the VSS level.)
S9 to S34 = Low (VSS),
COM1 to COM4 = Low (VSS)
•INH = high (VDD): On
Note that serial data transfers can be performed when the
display is forced off by this pin.
VLCD1
41
37
Used to apply the LCD drive 2/3 bias voltage externally. This pin must be
connected to VLCD2 when 1/2 bias drive is used.
—
I
Open
VLCD2
42
38
Used to apply the LCD drive 1/3 bias voltage externally. This pin must be
connected to VLCD1 when 1/2 bias drive is used.
—
I
Open
VDD
39
35
Logic block power supply. Provide a voltage in the range 2.7 to 6.0 V.
—
—
—
VLCD
40
36
LCD driver block power supply. Provide a voltage in the range 2.7 to 6.0 V.
—
—
—
VSS
43
39
Ground pin. Connect to ground.
—
—
—
Note: The LC75834JE do not have the S9, S18, S27, S34 output pins.
Page 6
LC75834E, 75834W, 75834JE
Serial Data Transfer Format
1. When CL is stopped at the low level
CE
CL
DI
0
1
1
0
0
0
1
0
D1
D2
D3
D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36
0
0
0
P0
P1
P2
P3
DR
SC
BU
0
0
B0 B1 B2 B3 A0 A1 A2 A3
CCB address
8 bits
0
1
1
0
0
Display data
36 bits
0
1
0
D37
D38 D39
Control data
10 bits
D61 D62 D63 D64 D65 D66 D67 D68 D69 D70 D71 D72
0
0
0
0
0
0
0
DD
2 bits
0
0
0
0
1
B0 B1 B2 B3 A0 A1 A2 A3
Display data
36 bits
CCB address
8 bits
0
1
1
0
0
0
1
0
D73
D74 D75
Fixed data
10 bits
D97 D98 D99 D100 D101 D102 D103 D104 D105 D106 D107 D108
0
0
0
0
0
0
0
DD
2 bits
0
0
0
1
0
B0 B1 B2 B3 A0 A1 A2 A3
CCB address
8 bits
0
1
1
0
0
Fixed data
10 bits
Display data
36 bits
0
1
0
D109
D110 D111
D133 D134 D135 D136
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DD
2 bits
0
0
0
0
1
1
B0 B1 B2 B3 A0 A1 A2 A3
CCB address
8 bits
Display data
28 bits
Fixed data
18 bits
DD
2 bits
Note: DD ... Direction data
Page 7
LC75834E, 75834W, 75834JE
2. When CL is stopped at the high level
CE
CL
DI
0
1
1
0
0
0
1
B0 B1 B2 B3 A0 A1 A2
0
D1
D2
D3
D25 D26 D27 D28 D29 D30 D31 D32 D33 D34 D35 D36
1
1
0
0
0
1
B0 B1 B2 B3 A0 A1 A2
1
1
0
0
0
0
D37 D38 D39
1
1
0
0
0
0
0
0
0
1
CCB address
8 bits
P2
P3
DR
SC
BU
0
0
DD
2 bits
0
0
0
0
0
0
Fixed data
10 bits
0
1
0
D73 D74 D75
D97 D98 D99 D100 D101 D102 D103 D104 D105 D106 D107 D108
0
0
0
0
0
0
DD
2 bits
0
0
0
0
1
0
A3
Display data
36 bits
B0 B1 B2 B3 A0 A1 A2
P1
Control data
10 bits
D61 D62 D63 D64 D65 D66 D67 D68 D69 D70 D71 D72
CCB address
8 bits
1
P0
Display data
36 bits
B0 B1 B2 B3 A0 A1 A2
0
0
A3
CCB address
8 bits
0
0
Display data
36 bits
CCB address
8 bits
0
0
A3
0
D109 D110 D111
D133 D134 D135 D136
0
Fixed data
10 bits
0
0
0
0
0
0
0
0
0
0
0
0
0
DD
2 bits
0
0
0
0
1
1
A3
Display data
28 bits
Fixed data
18 bits
DD
2 bits
Note: DD ... Direction data
• CCB address...............46H
• D1 to D136.................Display data (At the LC75834JE, the display data D33 to D36, D69 to D72, D105 to D108,
D133 to D136 must be set to 0.
• P0 to P3 ......................Segment output port/general-purpose output port switching control data
• DR ..............................1/2 bias drive or 1/3 bias drive switching control data
• SC...............................Segments on/off control data
• BU ..............................Normal mode/power-saving mode control data
Page 8
LC75834E, 75834W, 75834JE
Serial Data Transfer Examples
• At the LC75834E and LC75834W when109 or more segments are used, at the LC75834JE when 97 or more segments
are used,192 bits of serial data must be sent.
48 bits
8 bits
0
1
1
0
0
0
1
0
D1
D2
D3
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
0
0
0
P0
P1
P2
P3
DR
SC
BU
0
0
D37
D38
D39
D61
D62
D63
D64
D65
D66
D67
D68
D69
D70
D71
D72
0
0
0
0
0
0
0
0
0
0
0
1
D73
D74
D75
D97
D98
D99 D100 D101 D102 D103 D104 D105 D106 D107 D108
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
1
1
B0 B1 B2 B3 A0 A1 A2 A3
0
1
1
0
0
0
1
0
B0 B1 B2 B3 A0 A1 A2 A3
0
1
1
0
0
0
1
0
B0 B1 B2 B3 A0 A1 A2 A3
0
1
1
0
0
0
1
0
D109 D110 D111
D133 D134 D135 D136
0
0
0
0
0
0
0
0
B0 B1 B2 B3 A0 A1 A2 A3
Note: At the LC75834JE, the display data D33 to D36, D69 to D72, D105 to D108, D133 to D136 must be set to 0.
• At the LC75834E and LC75834W when used with less than 109 segments, at the LC75834JE when used with less than
97 segments, transfer either 48 bits, 96 bits or 144 bits of serial data depending on the number of segments used.
However, the serial data shown in the figure below (the display data D1 to D36 and the control data) must be sent.
8 bits
0
1
1
0
0
48 bits
0
1
0
D1
D2
D3
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
0
0
0
P0
P1
P2
P3
DR
SC
BU
0
0
B0 B1 B2 B3 A0 A1 A2 A3
Note: At the LC75834JE, the display data D33 to D36 must be set to 0.
Control Data Functions
1. P0 to P3: Segment output port/general-purpose output port switching control data.
These control data bits switch the S1/P1 to S8/P8 output pins between their segment output port and general-purpose
output port functions.
Control data
Output pin states
P0
P1
P2
P3
S1/P1
S2/P2
S3/P3
S4/P4
S5/P5
S6/P6
S7/P7
S8/P8
0
0
0
0
S1
S2
S3
S4
S5
S6
S7
S8
0
0
0
1
P1
S2
S3
S4
S5
S6
S7
S8
0
0
1
0
P1
P2
S3
S4
S5
S6
S7
S8
0
0
1
1
P1
P2
P3
S4
S5
S6
S7
S8
0
1
0
0
P1
P2
P3
P4
S5
S6
S7
S8
0
1
0
1
P1
P2
P3
P4
P5
S6
S7
S8
0
1
1
0
P1
P2
P3
P4
P5
P6
S7
S8
0
1
1
1
P1
P2
P3
P4
P5
P6
P7
S8
1
0
0
0
P1
P2
P3
P4
P5
P6
P7
P8
Note: Sn (n = 1 to 8): Segment output ports
Pn (n = 1 to 8): General-purpose output ports
Page 9
LC75834E, 75834W, 75834JE
Also note that when the general-purpose output port function is selected, the output pins and the display data will
have the correspondences listed in the tables below.
Output pin
Corresponding display data
Output pin
Corresponding display data
S1/P1
D1
S5/P5
D17
S2/P2
D5
S6/P6
D21
S3/P3
D9
S7/P7
D25
S4/P4
D13
S8/P8
D29
For example, if the output pin S4/P4 has the general-purpose output port function selected, it will output a high level
(VLCD) when the display data D13 is 1, and will output a low level (VSS) when D13 is 0.
2. DR: 1/2 bias drive or 1/3 bias drive switching control data
This control data bit selects either 1/2 bias drive or 1/3 bias drive.
DR
Drive type
0
1/3 bias drive
1
1/2 bias drive
3. SC: Segments on/off control data
This control data bit controls the on/off state of the segments.
SC
Display state
0
On
1
Off
However, note that when the segments are turned off by setting SC to 1, the segments are turned off by outputting
segment off waveforms from the segment output pins.
4. BU: Normal mode/power-saving mode control data
This control data bit selects either normal mode or power-saving mode.
BU
Mode
0
Normal mode
1
Power saving mode (The OSC pin oscillator is stopped, and the common and segment output pins go to the VSS level. However, the
S1/P1 to S8/P8 output pins that are set to be general-purpose output ports by the control data P0 to P3 can be used as generalpurpose output ports.)
Page 10
LC75834E, 75834W, 75834JE
Display Data to Segment Output Pin Correspondence
Segment
output pin
COM1
COM2
COM3
COM4
Segment
output pin
COM1
COM2
COM3
COM4
S1/P1
D1
D2
D3
D4
S18
D69
D70
D71
D72
S2/P2
D5
D6
D7
D8
S19
D73
D74
D75
D76
S3/P3
D9
D10
D11
D12
S20
D77
D78
D79
D80
S4/P4
D13
D14
D15
D16
S21
D81
D82
D83
D84
S5/P5
D17
D18
D19
D20
S22
D85
D86
D87
D88
S6/P6
D21
D22
D23
D24
S23
D89
D90
D91
D92
S7/P7
D25
D26
D27
D28
S24
D93
D94
D95
D96
S8/P8
D29
D30
D31
D32
S25
D97
D98
D99
D100
S9
D33
D34
D35
D36
S26
D101
D102
D103
D104
S10
D37
D38
D39
D40
S27
D105
D106
D107
D108
S11
D41
D42
D43
D44
S28
D109
D110
D111
D112
S12
D45
D46
D47
D48
S29
D113
D114
D115
D116
S13
D49
D50
D51
D52
S30
D117
D118
D119
D120
S14
D53
D54
D55
D56
S31
D121
D122
D123
D124
S15
D57
D58
D59
D60
S32
D125
D126
D127
D128
S16
D61
D62
D63
D64
S33
D129
D130
D131
D132
S17
D65
D66
D67
D68
S34
D133
D134
D135
D136
Note: This applies to the case where the S1/P1 to S8/P8 output pins are set to be segment output ports.
The LC75834JE do not have the S9, S18, S27, S34 output pins.
For example, the table below lists the segment output states for the S11 output pin.
Display data
D41
D42
D43
D44
Segment output pin (S11) state
0
0
0
0
The LCD segments corresponding to COM1 to COM4 are off.
0
0
0
1
The LCD segment corresponding to COM4 is on.
0
0
1
0
The LCD segment corresponding to COM3 is on.
0
0
1
1
The LCD segments corresponding to COM3 and COM4 are on.
0
1
0
0
The LCD segment corresponding to COM2 is on.
0
1
0
1
The LCD segments corresponding to COM2 and COM4 are on.
0
1
1
0
The LCD segments corresponding to COM2 and COM3 are on.
0
1
1
1
The LCD segments corresponding to COM2, COM3 and COM4 are on.
1
0
0
0
The LCD segment corresponding to COM1 is on.
1
0
0
1
The LCD segments corresponding to COM1 and COM4 are on.
1
0
1
0
The LCD segments corresponding to COM1 and COM3 are on.
1
0
1
1
The LCD segments corresponding to COM1, COM3 and COM4 are on.
1
1
0
0
The LCD segments corresponding to COM1 and COM2 are on.
1
1
0
1
The LCD segments corresponding to COM1, COM2 and COM4 are on.
1
1
1
0
The LCD segments corresponding to COM1 to COM3 are on.
1
1
1
1
The LCD segments corresponding to COM1 to COM4 are on.
Page 11
LC75834E, 75834W, 75834JE
1/4 Duty, 1/2 Bias Drive Technique
fosc
[Hz]
512
COM1
VLCD
VLCD1, VLCD2
0V
COM2
VLCD
VLCD1, VLCD2
0V
COM3
VLCD
VLCD1, VLCD2
0V
COM4
VLCD
VLCD1, VLCD2
0V
LCD driver output when all LCD
segments corresponding to COM1,
COM2, COM3, and COM4 are turned off.
VLCD
VLCD1, VLCD2
0V
LCD driver output when only LCD
segments corresponding to COM1 are
on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when only LCD
segments corresponding to COM2 are
on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when LCD segments
corresponding to COM1 and COM2
are on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when only LCD
segments corresponding to COM3 are
on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when LCD
segments corresponding to COM1 and
COM3 are on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when LCD
segments corresponding to COM2 and
COM3 are on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when LCD segments
corresponding to COM1, COM2, and
COM3 are on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when only LCD
segments corresponding to COM4 are
on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when LCD segments
corresponding to COM2 and COM4 are
on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when all LCD
segments corresponding to COM1,
COM2, COM3, and COM4 are on.
VLCD
VLCD1, VLCD2
0V
1/4 Duty, 1/2 Bias Waveforms
Page 12
LC75834E, 75834W, 75834JE
1/4 Duty, 1/3 Bias Drive Technique
fosc
[Hz]
512
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
COM1
COM2
COM3
COM4
LCD driver output when all LCD
segments corresponding to COM1,
COM2, COM3, and COM4 are turned off.
LCD driver output when only LCD
segments corresponding to COM1 are
on.
LCD driver output when only LCD
segments corresponding to COM2 are
on.
LCD driver output when LCD segments
corresponding to COM1 and COM2 are
on.
LCD driver output when only LCD
segments corresponding to COM3 are
on.
LCD driver output when LCD segments
corresponding to COM1 and COM3 are
on.
LCD driver output when LCD segments
corresponding to COM2 and COM3 are
on.
LCD driver output when LCD segments
corresponding to COM1, COM2, and
COM3 are on.
LCD driver output when only LCD
segments corresponding to COM4 are
on.
LCD driver output when LCD segments
corresponding to COM2 and COM4 are
on.
LCD driver output when all LCD
segments corresponding to COM1,
COM2, COM3, and COM4 are on.
1/4 Duty, 1/3 Bias Waveforms
Page 13
LC75834E, 75834W, 75834JE
The INH pin and Display Control
Since the IC internal data (the display data and the control data) is undefined when power is first applied, applications
should set the INH pin low at the same time as power is applied to turn off the display (LC75834E, LC75834W: This
sets the S1/P1 to S8/P8, S9 to S34, and COM1 to COM4 to the VSS level. LC75834JE: This sets the S1/P1 to S8/P8, S10
to S17, S19 to S26, S28 to S33, and COM1 to COM4 to the VSS level.) and during this period send serial data from the
controller. The controller should then set the INH pin high after the data transfer has completed. This procedure prevents
meaningless displays at power on. (See Figure 3.)
Notes on the Power On/Off Sequences
Applications should observe the following sequence when turning the LC75834E, LC75834W, and LC75834JE power
on and off.
• At power on: Logic block power supply (VDD) on → LCD driver block power supply (VLCD) on
• At power off: LCD driver block power supply (VLCD) off → Logic block power supply (VDD) off
However, if the logic and LCD driver block use a shared power supply, then the power supplies can be turned on and off
at the same time.
t2
t1
t3
VDD
VLCD
INH
tc
CE
Internal data
D1 to D36
P0 to P3
DR, SC, BU
VIL
VIL
Display and control data transfer
Undefined
Defined
Undefined
Internal data (D37 to D72)
Undefined
Defined
Undefined
Internal data (D73 to D108)
Undefined
Defined
Undefined
Internal data (D109 to D136)
Undefined
Defined
Undefined
Note: t1 ≥ 0
t2 > 0
t3 ≥ 0 (t2 > t3)
tc ...... 10 µs min
Note: At the LC75834JE, the display data D33 to D36, D69 to D72, D105 to D108, D133 to D136 must be set to 0.
Figure 3
Notes on Controller Transfer of Display Data
Since the LC75834E, LC75834W, and LC75834JE accept display data divided into four separate transfer operations, we
recommend that applications transfer all of the display data within a period of less than 30 ms to prevent observable
degradation of display quality.
Page 14
LC75834E, 75834W, 75834JE
Sample Application Circuit 1
1/2 Bias (for use with normal panels)
• LC75834E, LC75834W
(P1)
(P2)
*2
VDD
OSC
VSS
+5 V
VLCD
COM1
COM2
COM3
COM4
P1/S1
P2/S2
VLCD1
C ≥ 0.047 µF
C
P8/S8
S9
VLCD2
INH
CE
CL
DI
From the
microcontroller
Used for functions
such as backlight
control
LCD panel (up to 136 segments)
+3 V
(P8)
General-purpose
output ports
S32
S33
S34
Note: *2 When a capacitor except the recommended external capacitance (COSC = 680 pF) is connected the OSC pin, we recommend that applications
connect the OSC pin with a capacitor in the range 220 to 2200 pF.
• LC75834JE
*2
+3 V
VDD
VSS
+5 V
VLCD
VLCD1
C ≥ 0.047 µF
From the
microcontroller
C
OSC
COM1
COM2
COM3
COM4
P1/S1
P2/S2
P8/S8
S10
VLCD2
INH
CE
CL
DI
S17
S19
S26
S28
(P8)
General-purpose
output ports
Used for functions
such as backlight
control
LCD panel (up to 120 segments)
(P1)
(P2)
S33
Note: *2 When a capacitor except the recommended external capacitance (COSC = 680 pF) is connected the OSC pin, we recommend that applications
connect the OSC pin with a capacitor in the range 220 to 2200 pF.
Page 15
LC75834E, 75834W, 75834JE
Sample Application Circuit 2
1/2 Bias (for use with large panels)
• LC75834E, LC75834W
(P1)
(P2)
*2
VDD
OSC
VSS
+5 V
VLCD
R
10 kΩ ≥ R ≥ 1 kΩ
C ≥ 0.047 µF
C
R
VLCD1
P8/S8
S9
VLCD2
INH
CE
CL
DI
From the
microcontroller
COM1
COM2
COM3
COM4
P1/S1
P2/S2
Used for functions
such as backlight
control
LCD panel (up to 136 segments)
+3 V
(P8)
General-purpose
output ports
S32
S33
S34
Note: *2 When a capacitor except the recommended external capacitance (COSC = 680 pF) is connected the OSC pin, we recommend that applications
connect the OSC pin with a capacitor in the range 220 to 2200 pF.
• LC75834JE
*2
+3 V
VDD
VSS
+5 V
VLCD
R
10 kΩ ≥ R ≥ 1 kΩ
C ≥ 0.047 µF
From the
microcontroller
C
R
VLCD1
OSC
COM1
COM2
COM3
COM4
P1/S1
P2/S2
P8/S8
S10
VLCD2
INH
CE
CL
DI
S17
S19
S26
S28
(P8)
General-purpose
output ports
Used for functions
such as backlight
control
LCD panel (up to 120 segments)
(P1)
(P2)
S33
Note: *2 When a capacitor except the recommended external capacitance (COSC = 680 pF) is connected the OSC pin, we recommend that applications
connect the OSC pin with a capacitor in the range 220 to 2200 pF.
Page 16
LC75834E, 75834W, 75834JE
Sample Application Circuit 3
1/3 Bias (for use with normal panels)
• LC75834E, LC75834W
(P1)
(P2)
*2
VDD
OSC
VSS
+5 V
VLCD
COM1
COM2
COM3
COM4
P1/S1
P2/S2
VLCD1
C ≥ 0.047 µF
C
C
P8/S8
S9
VLCD2
INH
CE
CL
DI
From the
microcontroller
Used for functions
such as backlight
control
LCD panel (up to 136 segments)
+3 V
(P8)
General-purpose
output ports
S32
S33
S34
Note: *2 When a capacitor except the recommended external capacitance (COSC = 680 pF) is connected the OSC pin, we recommend that applications
connect the OSC pin with a capacitor in the range 220 to 2200 pF.
• LC75834JE
*2
+3 V
VDD
VSS
+5 V
VLCD
VLCD1
C ≥ 0.047 µF
From the
microcontroller
C
C
OSC
COM1
COM2
COM3
COM4
P1/S1
P2/S2
P8/S8
S10
VLCD2
INH
CE
CL
DI
S17
S19
S26
S28
(P8)
General-purpose
output ports
Used for functions
such as backlight
control
LCD panel (up to 120 segments)
(P1)
(P2)
S33
Note: *2 When a capacitor except the recommended external capacitance (COSC = 680 pF) is connected the OSC pin, we recommend that applications
connect the OSC pin with a capacitor in the range 220 to 2200 pF.
Page 17
LC75834E, 75834W, 75834JE
Sample Application Circuit 4
1/3 Bias (for use with large panels)
• LC75834E, LC75834W
(P1)
(P2)
*2
VDD
OSC
VSS
+5 V
VLCD
COM1
COM2
COM3
COM4
P1/S1
P2/S2
R
VLCD1
10 kΩ ≥ R ≥ 1 kΩ
C ≥ 0.047 µF
R
C
C
R
P8/S8
S9
VLCD2
INH
CE
CL
DI
From the
microcontroller
Used for functions
such as backlight
control
LCD panel (up to 136 segments)
+3 V
(P8)
General-purpose
output ports
S32
S33
S34
Note: *2 When a capacitor except the recommended external capacitance (COSC = 680 pF) is connected the OSC pin, we recommend that applications
connect the OSC pin with a capacitor in the range 220 to 2200 pF.
(P1)
(P2)
*2
+3 V
VDD
VSS
+5 V
VLCD
OSC
COM1
COM2
COM3
COM4
P1/S1
P2/S2
R
VLCD1
10 kΩ ≥ R ≥ 1 kΩ
C ≥ 0.047 µF
From the
microcontroller
R
C
C
R
P8/S8
S10
VLCD2
INH
CE
CL
DI
S17
S19
S26
S28
(P8)
General-purpose
output ports
Used for functions
such as backlight
control
LCD panel (up to 120 segments)
• LC75834JE
S33
Note: *2 When a capacitor except the recommended external capacitance (COSC = 680 pF) is connected the OSC pin, we recommend that applications
connect the OSC pin with a capacitor in the range 220 to 2200 pF.
Page 18
LC75834E, LC75834W, LC75834JE
Package Dimensions
unit : mm
[LC75834E]
PQFP48 14x14 / QIP48E
CASE 122BL
ISSUE A
0.80.2
17.20.2
17.20.2
48
14.00.1
14.00.1
1 2
1.0
0.35
(2.7)
(1.5)
0 to 10
0.10.1
3.0 MAX
0.15
0.15
0.10
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT*
16.30
XXXXXXXX
YMDDD
16.30
(Unit: mm)
XXXXX = Specific Device Code
Y = Year
M = Month
DDD = Additional Traceability Data
1.00
0.50
1.30
*This information is generic. Please refer to
device data sheet for actual part marking.
NOTE: The measurements are not to guarantee but for reference only.
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
19
LC75834E, LC75834W, LC75834JE
Package Dimensions
unit : mm
[LC75834W]
SPQFP48 7x7 / SQFP48
CASE 131AJ
ISSUE A
0.50.2
9.00.2
9.00.2
48
7.00.1
7.00.1
1 2
0.5
0.150.05
0.18
0.10
(1.5)
0 to 10
0.10.1
1.7 MAX
(0.75)
0.10
SOLDERING FOOTPRINT*
GENERIC
MARKING DIAGRAM*
8.40
XXXXXXXX
YDD
8.40
(Unit: mm)
XXXXX = Specific Device Code
Y = Year
DD = Additional Traceability Data
XXXXXXXX
YMDDD
XXXXX = Specific Device Code
Y = Year
M = Month
DDD = Additional Traceability Data
0.50
0.28
1.00
*This information is generic. Please refer to
device data sheet for actual part marking.
NOTE: The measurements are not to guarantee but for reference only.
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
20
LC75834E, LC75834W, LC75834JE
Package Dimensions
unit : mm
[LC75834JE]
PQFP44 10x10 / QIP44M
CASE 122BK
ISSUE A
1.00.2
13.20.2
13.20.2
44
10.0
10.0
1 2
0.8
0.35
(2.5)
0 to 10
0.10.1
2.8 MAX
0.2
0.15
(1.0)
0.10
SOLDERING FOOTPRINT*
GENERIC MARKING DIAGRAM*
12.10
XXXXXXXX
YDD
12.10
(Unit: mm)
XXXXX = Specific Device Code
Y = Year
DD = Additional Traceability Data
XXXXXXXX
YMDDD
XXXXX = Specific Device Code
Y = Year
M = Month
DDD = Additional Traceability Data
0.80
0.52
1.50
*This information is generic. Please refer to
device data sheet for actual part marking.
NOTE: The measurements are not to guarantee but for reference only.
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
21
LC75834E, LC75834W, LC75834JE
ORDERING INFORMATION
Device
Package
Shipping (Qty / Packing)
LC75834E-E
PQFP48 14x14 / QIP48E
(Pb-Free)
300 / Tray Foam
LC75834W-E
SPQFP48 7x7 / SQFP48
(Pb-Free)
1250 / Tray JEDEC
LC75834JE-E
PQFP44 10x10 / QIP44M
(Pb-Free)
-
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