LM2904EDR2G

LM258, LM358, LM358A, LM358E, LM2904, LM2904A, LM2904E, LM2904V, NCV2904 Single Supply Dual Operational Amplifiers www.onsemi.com Utilizing the circuit designs perfected for Quad Operational Amplifiers, these dual operational amplifiers feature low power drain, a common mode input voltage range extending to ground/VEE, and single supply or split supply operation. The LM358 series is equivalent to one−half of an LM324. These amplifiers have several distinct advantages over standard operational amplifier types in single supply applications. They can operate at supply voltages as low as 3.0 V or as high as 32 V, with quiescent currents about one−fifth of those associated with the MC1741 (on a per amplifier basis). The common mode input range includes the negative supply, thereby eliminating the necessity for external biasing components in many applications. The output voltage range also includes the negative power supply voltage. Features • • • • • • • • • • Short Circuit Protected Outputs True Differential Input Stage Single Supply Operation: 3.0 V to 32 V Low Input Bias Currents Internally Compensated Common Mode Range Extends to Negative Supply Single and Split Supply Operation ESD Clamps on the Inputs Increase Ruggedness of the Device without Affecting Operation NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant PDIP−8 N, AN, VN SUFFIX CASE 626 8 1 SOIC−8 D, VD SUFFIX CASE 751 8 1 Micro8] DMR2 SUFFIX CASE 846A 8 1 PIN CONNECTIONS Output A Inputs A VEE/Gnd 1 8 2 7 3 4 − + VCC Output B 6 − + 5 Inputs B (Top View) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet. DEVICE MARKING INFORMATION See general marking information in the device marking section on page 11 of this data sheet. © Semiconductor Components Industries, LLC, 2016 July, 2019 − Rev. 33 1 Publication Order Number: LM358/D LM258, LM358, LM358A, LM358E, LM2904, LM2904A, LM2904E, LM2904V, NCV2904 3.0 V to VCC(max) VCC VCC 1 1 2 2 1.5 V to VCC(max) 1.5 V to VEE(max) VEE VEE/Gnd Single Supply Split Supplies Figure 1. Output Bias Circuitry Common to Both Amplifiers VCC Q15 Q16 Q22 Q14 Q13 40 k Q19 5.0 pF Q12 Q24 25 Q23 Q20 Q18 Inputs Q11 Q9 Q21 Q17 Q6 Q2 Q25 Q7 Q5 Q1 Q8 Q3 Q4 Q10 Q26 2.4 k 2.0 k VEE/Gnd Figure 2. Representative Schematic Diagram (One−Half of Circuit Shown) www.onsemi.com 2 LM258, LM358, LM358A, LM358E, LM2904, LM2904A, LM2904E, LM2904V, NCV2904 MAXIMUM RATINGS (TA = +25°C, unless otherwise noted.) Symbol Value VCC VCC, VEE 32 ±16 Input Differential Voltage Range (Note 1) VIDR ±32 Vdc Input Common Mode Voltage Range VICR −0.3 to 32 Vdc Output Short Circuit Duration tSC Continuous Junction Temperature TJ 150 °C RJA 238 212 161 °C/W Storage Temperature Range Tstg −65 to +150 °C Operating Ambient Temperature Range TA Rating Power Supply Voltages Single Supply Split Supplies Unit Vdc Thermal Resistance, Junction−to−Air (Note 2) Case 846A Case 751 Case 626 LM258 LM358, LM358A, LM358E LM2904, LM2904A, LM2904E LM2904V, NCV2904 (Note 3) −25 to +85 0 to +70 −40 to +105 −40 to +125 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Split Power Supplies. 2. All RJA measurements made on evaluation board with 1 oz. copper traces of minimum pad size. All device outputs were active. 3. NCV2904 is qualified for automotive use. ESD RATINGS Rating ESD Protection at any Pin (Human Body Model − HBM, Machine Model − MM) NCV2904 (Note 3) LM358E, LM2904E LM358DG/DR2G, LM2904DG/DR2G All Other Devices www.onsemi.com 3 HBM MM Unit 2000 2000 250 2000 200 200 100 200 V V V V LM258, LM358, LM358A, LM358E, LM2904, LM2904A, LM2904E, LM2904V, NCV2904 ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = GND, TA = 25°C, unless otherwise noted.) LM258 Characteristic Input Offset Voltage VCC = 5.0 V to 30 V, VIC = 0 V to VCC −1.7 V, VO ] 1.4 V, RS = 0  TA = 25°C TA = Thigh (Note 4) TA = Tlow (Note 4) Symbol Min Typ LM358, LM358E Max Min Typ Max LM358A Min Typ Max VIO Unit mV − − − 2.0 − − 5.0 7.0 7.0 − − − 2.0 − − 7.0 9.0 9.0 − − − 2.0 − − 3.0 5.0 5.0 VIO/T − 7.0 − − 7.0 − − 7.0 − V/°C IIO − − − − 3.0 − −45 −50 30 100 −150 −300 − − − − 5.0 − −45 −50 50 150 −250 −500 − − − − 5.0 − −45 −50 30 75 −100 −200 nA IIO/T − 10 − − 10 − − 10 − pA/°C Input Common Mode Voltage Range (Note 5), VCC = 30 V VCC = 30 V, TA = Thigh to Tlow VICR 0 − 28.3 0 − 28.3 0 − 28.5 V 0 − 28 0 − 28 0 − 28 Differential Input Voltage Range VIDR − − VCC − − VCC − − VCC Large Signal Open Loop Voltage Gain RL = 2.0 k, VCC = 15 V, For Large VO Swing, TA = Thigh to Tlow (Note 4) AVOL 50 25 100 − − − 25 15 100 − − − 25 15 100 − − − CS − −120 − − −120 − − −120 − dB Common Mode Rejection RS ≤ 10 k CMR 70 85 − 65 70 − 65 70 − dB Power Supply Rejection PSR 65 100 − 65 100 − 65 100 − dB Output Voltage−High Limit TA = Thigh to Tlow (Note 4) VCC = 5.0 V, RL = 2.0 k, TA = 25°C VCC = 30 V, RL = 2.0 k VCC = 30 V, RL = 10 k VOH Output Voltage−Low Limit VCC = 5.0 V, RL = 10 k, TA = Thigh to Tlow (Note 4) VOL Output Source Current VID = +1.0 V, VCC = 15 V TA = Thigh to Tlow (LM358A Only) IO+ Output Sink Current VID = −1.0 V, VCC = 15 V TA = Thigh to Tlow (LM358A Only) VID = −1.0 V, VO = 200 mV IO− Output Short Circuit to Ground (Note 6) ISC Power Supply Current (Total Device) TA = Thigh to Tlow (Note 4) VCC = 30 V, VO = 0 V, RL = ∞ VCC = 5 V, VO = 0 V, RL = ∞ ICC Average Temperature Coefficient of Input Offset Voltage TA = Thigh to Tlow (Note 4) Input Offset Current TA = Thigh to Tlow (Note 4) Input Bias Current TA = Thigh to Tlow (Note 4) Average Temperature Coefficient of Input Offset Current TA = Thigh to Tlow (Note 4) Channel Separation 1.0 kHz ≤ f ≤ 20 kHz, Input Referenced IIB V V/mV V 3.3 26 27 3.5 − 28 − − − 3.3 26 27 3.5 − 28 − − − 3.3 26 27 3.5 − 28 − − − − 5.0 20 − 5.0 20 − 5.0 20 20 40 − 20 40 − 20 10 40 − − − 10 20 − 10 20 − 12 50 − 12 50 − 10 5.0 12 20 − 50 − − − mA mA A − 40 60 − 40 60 − 40 60 mA mV mA mA − − 1.5 0.7 3.0 1.2 − − 1.5 0.7 3.0 1.2 − − 1.5 0.7 2.0 1.2 4. LM258: Tlow = −25°C, Thigh = +85°C LM358, LM358A, LM358E: Tlow = 0°C, Thigh = +70°C LM2904V & NCV2904: Tlow = −40°C, Thigh = +125°C LM2904/A/E: Tlow = −40°C, Thigh = +105°C NCV2904 is qualified for automotive use. 5. The input common mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of the common mode voltage range is VCC − 1.7 V. 6. Short circuits from the output to VCC can cause excessive heating and eventual destruction. Destructive dissipation can result from simultaneous shorts on all amplifiers. www.onsemi.com 4 LM258, LM358, LM358A, LM358E, LM2904, LM2904A, LM2904E, LM2904V, NCV2904 ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = Gnd, TA = 25°C, unless otherwise noted.) LM2904/LM2904E Characteristic Input Offset Voltage VCC = 5.0 V to 30 V, VIC = 0 V to VCC −1.7 V, VO ] 1.4 V, RS = 0  TA = 25°C TA = Thigh (Note 7) TA = Tlow (Note 7) Symbol Min Typ Max LM2904A Min Typ LM2904V, NCV2904 Max Min Typ Max VIO Unit mV − − − 2.0 − − 7.0 10 10 − − − 2.0 − − 7.0 10 10 − − − − − − 7.0 13 10 VIO/T − 7.0 − − 7.0 − − 7.0 − V/°C IIO − − − − 5.0 45 −45 −50 50 200 −250 −500 − − − − 5.0 45 −45 −50 50 200 −100 −250 − − − − 5.0 45 −45 −50 50 200 −250 −500 nA IIO/T − 10 − − 10 − − 10 − pA/°C Input Common Mode Voltage Range (Note 8), VCC = 30 V VCC = 30 V, TA = Thigh to Tlow VICR 0 − 28.3 0 − 28.3 0 − 28.3 V 0 − 28 0 − 28 0 − 28 Differential Input Voltage Range VIDR − − VCC − − VCC − − VCC Large Signal Open Loop Voltage Gain RL = 2.0 k, VCC = 15 V, For Large VO Swing, TA = Thigh to Tlow (Note 7) AVOL 25 15 100 − − − 25 15 100 − − − 25 15 100 − − − CS − −120 − − −120 − − −120 − dB Common Mode Rejection RS ≤ 10 k CMR 50 70 − 50 70 − 50 70 − dB Power Supply Rejection PSR 50 100 − 50 100 − 50 100 − dB Output Voltage−High Limit TA = Thigh to Tlow (Note 7) VCC = 5.0 V, RL = 2.0 k, TA = 25°C VCC = 30 V, RL = 2.0 k VCC = 30 V, RL = 10 k VOH Output Voltage−Low Limit VCC = 5.0 V, RL = 10 k, TA = Thigh to Tlow (Note 7) Average Temperature Coefficient of Input Offset Voltage TA = Thigh to Tlow (Note 7) Input Offset Current TA = Thigh to Tlow (Note 7) Input Bias Current TA = Thigh to Tlow (Note 7) Average Temperature Coefficient of Input Offset Current TA = Thigh to Tlow (Note 7) Channel Separation 1.0 kHz ≤ f ≤ 20 kHz, Input Referenced IIB V V/mV V 3.3 26 27 3.5 − 28 − − − 3.3 26 27 3.5 − 28 − − − 3.3 26 27 3.5 − 28 − − − VOL − 5.0 20 − 5.0 20 − 5.0 20 mV Output Source Current VID = +1.0 V, VCC = 15 V IO+ 20 40 − 20 40 − 20 40 − mA Output Sink Current VID = −1.0 V, VCC = 15 V VID = −1.0 V, VO = 200 mV IO− 10 − 20 − − − 10 − 20 − − − 10 − 20 − − − mA A Output Short Circuit to Ground (Note 9) ISC − 40 60 − 40 60 − 40 60 mA Power Supply Current (Total Device) TA = Thigh to Tlow (Note 7) VCC = 30 V, VO = 0 V, RL = ∞ VCC = 5 V, VO = 0 V, RL = ∞ ICC mA − − 1.5 0.7 3.0 1.2 − − 1.5 0.7 3.0 1.2 − − 1.5 0.7 3.0 1.2 7. LM258: Tlow = −25°C, Thigh = +85°C LM358, LM358A, LM358E: Tlow = 0°C, Thigh = +70°C LM2904V & NCV2904: Tlow = −40°C, Thigh = +125°C LM2904/A/E: Tlow = −40°C, Thigh = +105°C NCV2904 is qualified for automotive use. 8. The input common mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of the common mode voltage range is VCC − 1.7 V. 9. Short circuits from the output to VCC can cause excessive heating and eventual destruction. Destructive dissipation can result from simultaneous shorts on all amplifiers. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. www.onsemi.com 5 LM258, LM358, LM358A, LM358E, LM2904, LM2904A, LM2904E, LM2904V, NCV2904 CIRCUIT DESCRIPTION The LM358 series is made using two internally compensated, two−stage operational amplifiers. The first stage of each consists of differential input devices Q20 and Q18 with input buffer transistors Q21 and Q17 and the differential to single ended converter Q3 and Q4. The first stage performs not only the first stage gain function but also performs the level shifting and transconductance reduction functions. By reducing the transconductance, a smaller compensation capacitor (only 5.0 pF) can be employed, thus saving chip area. The transconductance reduction is accomplished by splitting the collectors of Q20 and Q18. Another feature of this input stage is that the input common mode range can include the negative supply or ground, in single supply operation, without saturating either the input devices or the differential to single−ended converter. The second stage consists of a standard current source load amplifier stage. Each amplifier is biased from an internal−voltage regulator which has a low temperature coefficient thus giving each amplifier good temperature characteristics as well as excellent power supply rejection. 1.0 V/DIV VCC = 15 Vdc RL = 2.0 k TA = 25°C 5.0 s/DIV Figure 3. Large Signal Voltage Follower Response AVOL, OPEN LOOP VOLTAGE GAIN (dB) 20 VI , INPUT VOLTAGE (V) 18 16 14 12 10 Negative 8.0 Positive 6.0 4.0 2.0 0 120 VCC = 15 V VEE = Gnd TA = 25°C 100 80 60 40 20 0 -20 0 2.0 4.0 6.0 8.0 10 12 14 16 VCC/VEE, POWER SUPPLY VOLTAGES (V) 18 1.0 20 10 100 1.0 k 10 k 100 k 1.0 M f, FREQUENCY (Hz) Figure 4. Input Voltage Range Figure 5. Large−Signal Open Loop Voltage Gain www.onsemi.com 6 LM258, LM358, LM358A, LM358E, LM2904, LM2904A, LM2904E, LM2904V, NCV2904 550 RL = 2.0 k VCC = 15 V VEE = Gnd Gain = -100 RI = 1.0 k RF = 100 k 12 10 8.0 VO , OUTPUT VOLTAGE (mV) VOR , OUTPUT VOLTAGE RANGE (V pp ) 14 6.0 4.0 2.0 VCC = 30 V VEE = Gnd TA = 25°C CL = 50 pF 500 Input 450 400 Output 350 300 250 200 0 1.0 0 10 100 f, FREQUENCY (kHz) 1000 0 1.0 2.0 3.0 4.0 5.0 6.0 7.0 8.0 t, TIME s) Figure 6. Large−Signal Frequency Response Figure 7. Small Signal Voltage Follower Pulse Response (Noninverting) TA = 25°C RL = R 2.1 I IB , INPUT BIAS CURRENT (nA) I CC , POWER SUPPLY CURRENT (mA) 2.4 1.8 1.5 1.2 0.9 0.6 0.3 0 0 5.0 10 15 20 25 VCC, POWER SUPPLY VOLTAGE (V) 30 90 80 70 35 0 Figure 8. Power Supply Current versus Power Supply Voltage 2.0 4.0 6.0 8.0 10 12 14 16 VCC, POWER SUPPLY VOLTAGE (V) Figure 9. Input Bias Current versus Supply Voltage www.onsemi.com 7 18 20 LM258, LM358, LM358A, LM358E, LM2904, LM2904A, LM2904E, LM2904V, NCV2904 50 k R1 VCC VCC R2 5.0 k - 10 k 1/2 MC1403 2.5 V 1/2 + VO = 2.5 V (1 + 1 CR 1/2 fo = 1 V 2 CC R1 ) R2 R R C For: fo = 1.0 kHz R = 16 k C = 0.01 F C R LM358 Hysteresis R2 VOH R1 - a R1 R1 1/2 eo LM358 + LM358 Vin - 1 CR 1/2 + R VinH = eo = C (1 + a + b) (e2 - e1) H= Figure 12. High Impedance Differential Amplifier C1 R2 - VinL R2 = R1 TBP - 100 k 1/2 + LM358 + - R3 = TN R2 1/2 C1 = 10 C LM358 + Vref Bandpass Output Vref 1 2  RC R1 = QR fo = C C R Vref R1 (VOH - VOL) R1 + R2 100 k LM358 VinH R1 (V - V ) + Vref R1 + R2 OH ref R 1/2 R2 VOL Figure 13. Comparator with Hysteresis R Vin VO R1 (V - V )+ Vref VinL = R1 + R2 OL ref LM358 e2 VO + Vref 1/2 b R1 1 2  RC Figure 11. Wien Bridge Oscillator Figure 10. Voltage Reference + VO LM358 + Vref = e1 VCC - Vref VO LM358 For: fo Q TBP TN Vref R3 R1 + Where: TBP = Center Frequency Gain TN = Passband Notch Gain Figure 14. Bi−Quad Filter 8 = 1.0 kHz = 10 =1 =1 Notch Output LM358 www.onsemi.com 1 V 2 CC C1 1/2 Vref Vref = R C R1 R2 R3 = 160 k = 0.001 F = 1.6 M = 1.6 M = 1.6 M LM258, LM358, LM358A, LM358E, LM2904, LM2904A, LM2904E, LM2904V, NCV2904 VCC C Vin R1 R3 C - 1/2 LM358 + R2 Vref Given: VO CO CO = 10 C 1 Vref = 2 VCC fo = center frequency A(fo) = gain at center frequency Choose value fo, C Vref = Vref 1 V 2 CC Triangle Wave Output + 300 k R3 1/2 LM358 - 75 k R1 100 k LM358 - Square Wave Output R1 + RC 4 CRf R1 Q  fo C R1 = R3 2 A(fo) R2 = R1 R3 4Q2 R1 -R3 For less than 10% error from operational amplifier. Qo fo < 0.1 BW Where fo and BW are expressed in Hz. Rf f = R3 = + 1/2 Vref C Then: R2 if, R3 = R2 R1 R2 + R1 If source impedance varies, filter may be preceded with voltage follower buffer to stabilize filter parameters. Figure 16. Multiple Feedback Bandpass Filter Figure 15. Function Generator www.onsemi.com 9 LM258, LM358, LM358A, LM358E, LM2904, LM2904A, LM2904E, LM2904V, NCV2904 ORDERING INFORMATION Device Operating Temperature Range Package LM358ADR2G 2500 / Tape & Reel SOIC−8 (Pb−Free) LM358DG LM358DR2G LM358EDR2G Shipping† 98 Units / Rail 2500 / Tape & Reel SOIC−8 (Pb−Free) 2500 / Tape & Reel LM358DMR2G Micro8 (Pb−Free) 4000 / Tape & Reel LM358NG PDIP−8 (Pb−Free) 50 Units / Rail LM258DG SOIC−8 (Pb−Free) 98 Units / Rail 0°C to +70°C LM258DR2G LM258DMR2G 2500 / Tape & Reel Micro8 (Pb−Free) 4000 / Tape & Reel LM258NG PDIP−8 (Pb−Free) 50 Units / Rail LM2904DG SOIC−8 (Pb−Free) 98 Units / Rail −25°C to +85°C LM2904DR2G 2500 / Tape & Reel LM2904EDR2G SOIC−8 (Pb−Free) 2500 / Tape & Reel LM2904DMR2G Micro8 (Pb−Free) 2500 / Tape & Reel PDIP−8 (Pb−Free) 50 Units / Rail Micro8 (Pb−Free) 4000 / Tape & Reel LM2904ANG PDIP−8 (Pb−Free) 50 Units / Rail LM2904VDG SOIC−8 (Pb−Free) LM2904NG −40°C to +105°C LM2904ADMG LM2904ADMR2G LM2904VDR2G LM2904VDMR2G 4000 / Tape & Reel 98 Units / Rail 2500 / Tape & Reel Micro8 (Pb−Free) 4000 / Tape & Reel PDIP−8 (Pb−Free) 50 Units / Rail NCV2904DR2G* SOIC−8 (Pb−Free) 2500 / Tape & Reel NCV2904DMR2G* Micro8 (Pb−Free) 4000 / Tape & Reel LM2904VNG −40°C to +125°C †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable. www.onsemi.com 10 LM258, LM358, LM358A, LM358E, LM2904, LM2904A, LM2904E, LM2904V, NCV2904 MARKING DIAGRAMS PDIP−8 AN SUFFIX CASE 626 PDIP−8 N SUFFIX CASE 626 8 8 8 LMx58N AWL YYWWG 1 LM2904N AWL YYWWG 8 LM2904AN AWL YYWWG 1 8 8 LMx58 ALYW G 1 1 SOIC−8 VD SUFFIX CASE 751 8 8 LM358 ALYWA G 1 2904 ALYW G * 1 8 358E ALYWA G 1 8 2904V ALYW G 1 8 2904E ALYW G 1 8 x58 AYWG G x A WL, L YY, Y WW, W G G LM2904VN AWL YYWWG 1 SOIC−8 D SUFFIX CASE 751 1 PDIP−8 VN SUFFIX CASE 626 Micro8 DMR2 SUFFIX CASE 846A 8 2904 AYWG G 1 8 904A AYWG G 1 = 2 or 3 = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package = Pb−Free Package − (Note: Microdot may be in either location) www.onsemi.com 11 904V AYWG G * 1 *This diagram also applies to NCV2904 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS PDIP−8 CASE 626−05 ISSUE P DATE 22 APR 2015 SCALE 1:1 D A E H 8 5 E1 1 4 NOTE 8 b2 c B END VIEW TOP VIEW WITH LEADS CONSTRAINED NOTE 5 A2 A e/2 NOTE 3 L SEATING PLANE A1 C D1 M e 8X SIDE VIEW b 0.010 eB END VIEW M C A M B M NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACKAGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3. 4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE NOT TO EXCEED 0.10 INCH. 5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR TO DATUM C. 6. DIMENSION eB IS MEASURED AT THE LEAD TIPS WITH THE LEADS UNCONSTRAINED. 7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE LEADS, WHERE THE LEADS EXIT THE BODY. 8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE CORNERS). DIM A A1 A2 b b2 C D D1 E E1 e eB L M INCHES MIN MAX −−−− 0.210 0.015 −−−− 0.115 0.195 0.014 0.022 0.060 TYP 0.008 0.014 0.355 0.400 0.005 −−−− 0.300 0.325 0.240 0.280 0.100 BSC −−−− 0.430 0.115 0.150 −−−− 10 ° MILLIMETERS MIN MAX −−− 5.33 0.38 −−− 2.92 4.95 0.35 0.56 1.52 TYP 0.20 0.36 9.02 10.16 0.13 −−− 7.62 8.26 6.10 7.11 2.54 BSC −−− 10.92 2.92 3.81 −−− 10 ° NOTE 6 GENERIC MARKING DIAGRAM* STYLE 1: PIN 1. AC IN 2. DC + IN 3. DC − IN 4. AC IN 5. GROUND 6. OUTPUT 7. AUXILIARY 8. VCC XXXXXXXXX AWL YYWWG XXXX A WL YY WW G = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. DOCUMENT NUMBER: DESCRIPTION: 98ASB42420B PDIP−8 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AK 8 1 SCALE 1:1 −X− DATE 16 FEB 2011 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A 8 5 S B 0.25 (0.010) M Y M 1 4 −Y− K G C N X 45 _ SEATING PLANE −Z− 0.10 (0.004) H M D 0.25 (0.010) M Z Y S X J S 8 8 1 1 IC 4.0 0.155 XXXXX A L Y W G IC (Pb−Free) = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package XXXXXX AYWW 1 1 Discrete XXXXXX AYWW G Discrete (Pb−Free) XXXXXX = Specific Device Code A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. 1.270 0.050 SCALE 6:1 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 8 8 XXXXX ALYWX G XXXXX ALYWX 1.52 0.060 0.6 0.024 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 GENERIC MARKING DIAGRAM* SOLDERING FOOTPRINT* 7.0 0.275 DIM A B C D G H J K M N S mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. STYLES ON PAGE 2 DOCUMENT NUMBER: DESCRIPTION: 98ASB42564B SOIC−8 NB Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com SOIC−8 NB CASE 751−07 ISSUE AK DATE 16 FEB 2011 STYLE 1: PIN 1. EMITTER 2. COLLECTOR 3. COLLECTOR 4. EMITTER 5. EMITTER 6. BASE 7. BASE 8. EMITTER STYLE 2: PIN 1. COLLECTOR, DIE, #1 2. COLLECTOR, #1 3. COLLECTOR, #2 4. COLLECTOR, #2 5. BASE, #2 6. EMITTER, #2 7. BASE, #1 8. EMITTER, #1 STYLE 3: PIN 1. DRAIN, DIE #1 2. DRAIN, #1 3. DRAIN, #2 4. DRAIN, #2 5. GATE, #2 6. SOURCE, #2 7. GATE, #1 8. SOURCE, #1 STYLE 4: PIN 1. ANODE 2. ANODE 3. ANODE 4. ANODE 5. ANODE 6. ANODE 7. ANODE 8. COMMON CATHODE STYLE 5: PIN 1. DRAIN 2. DRAIN 3. DRAIN 4. DRAIN 5. GATE 6. GATE 7. SOURCE 8. SOURCE STYLE 6: PIN 1. SOURCE 2. DRAIN 3. DRAIN 4. SOURCE 5. SOURCE 6. GATE 7. GATE 8. SOURCE STYLE 7: PIN 1. INPUT 2. EXTERNAL BYPASS 3. THIRD STAGE SOURCE 4. GROUND 5. DRAIN 6. GATE 3 7. SECOND STAGE Vd 8. FIRST STAGE Vd STYLE 8: PIN 1. COLLECTOR, DIE #1 2. BASE, #1 3. BASE, #2 4. COLLECTOR, #2 5. COLLECTOR, #2 6. EMITTER, #2 7. EMITTER, #1 8. COLLECTOR, #1 STYLE 9: PIN 1. EMITTER, COMMON 2. COLLECTOR, DIE #1 3. COLLECTOR, DIE #2 4. EMITTER, COMMON 5. EMITTER, COMMON 6. BASE, DIE #2 7. BASE, DIE #1 8. EMITTER, COMMON STYLE 10: PIN 1. GROUND 2. BIAS 1 3. OUTPUT 4. GROUND 5. GROUND 6. BIAS 2 7. INPUT 8. GROUND STYLE 11: PIN 1. SOURCE 1 2. GATE 1 3. SOURCE 2 4. GATE 2 5. DRAIN 2 6. DRAIN 2 7. DRAIN 1 8. DRAIN 1 STYLE 12: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 7. DRAIN 8. DRAIN STYLE 13: PIN 1. N.C. 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 7. DRAIN 8. DRAIN STYLE 14: PIN 1. N−SOURCE 2. N−GATE 3. P−SOURCE 4. P−GATE 5. P−DRAIN 6. P−DRAIN 7. N−DRAIN 8. N−DRAIN STYLE 15: PIN 1. ANODE 1 2. ANODE 1 3. ANODE 1 4. ANODE 1 5. CATHODE, COMMON 6. CATHODE, COMMON 7. CATHODE, COMMON 8. CATHODE, COMMON STYLE 16: PIN 1. EMITTER, DIE #1 2. BASE, DIE #1 3. EMITTER, DIE #2 4. BASE, DIE #2 5. COLLECTOR, DIE #2 6. COLLECTOR, DIE #2 7. COLLECTOR, DIE #1 8. COLLECTOR, DIE #1 STYLE 17: PIN 1. VCC 2. V2OUT 3. V1OUT 4. TXE 5. RXE 6. VEE 7. GND 8. ACC STYLE 18: PIN 1. ANODE 2. ANODE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 7. CATHODE 8. CATHODE STYLE 19: PIN 1. SOURCE 1 2. GATE 1 3. SOURCE 2 4. GATE 2 5. DRAIN 2 6. MIRROR 2 7. DRAIN 1 8. MIRROR 1 STYLE 20: PIN 1. SOURCE (N) 2. GATE (N) 3. SOURCE (P) 4. GATE (P) 5. DRAIN 6. DRAIN 7. DRAIN 8. DRAIN STYLE 21: PIN 1. CATHODE 1 2. CATHODE 2 3. CATHODE 3 4. CATHODE 4 5. CATHODE 5 6. COMMON ANODE 7. COMMON ANODE 8. CATHODE 6 STYLE 22: PIN 1. I/O LINE 1 2. COMMON CATHODE/VCC 3. COMMON CATHODE/VCC 4. I/O LINE 3 5. COMMON ANODE/GND 6. I/O LINE 4 7. I/O LINE 5 8. COMMON ANODE/GND STYLE 23: PIN 1. LINE 1 IN 2. COMMON ANODE/GND 3. COMMON ANODE/GND 4. LINE 2 IN 5. LINE 2 OUT 6. COMMON ANODE/GND 7. COMMON ANODE/GND 8. LINE 1 OUT STYLE 24: PIN 1. BASE 2. EMITTER 3. COLLECTOR/ANODE 4. COLLECTOR/ANODE 5. CATHODE 6. CATHODE 7. COLLECTOR/ANODE 8. COLLECTOR/ANODE STYLE 25: PIN 1. VIN 2. N/C 3. REXT 4. GND 5. IOUT 6. IOUT 7. IOUT 8. IOUT STYLE 26: PIN 1. GND 2. dv/dt 3. ENABLE 4. ILIMIT 5. SOURCE 6. SOURCE 7. SOURCE 8. VCC STYLE 29: PIN 1. BASE, DIE #1 2. EMITTER, #1 3. BASE, #2 4. EMITTER, #2 5. COLLECTOR, #2 6. COLLECTOR, #2 7. COLLECTOR, #1 8. COLLECTOR, #1 STYLE 30: PIN 1. DRAIN 1 2. DRAIN 1 3. GATE 2 4. SOURCE 2 5. SOURCE 1/DRAIN 2 6. SOURCE 1/DRAIN 2 7. SOURCE 1/DRAIN 2 8. GATE 1 DOCUMENT NUMBER: DESCRIPTION: 98ASB42564B SOIC−8 NB STYLE 27: PIN 1. ILIMIT 2. OVLO 3. UVLO 4. INPUT+ 5. SOURCE 6. SOURCE 7. SOURCE 8. DRAIN STYLE 28: PIN 1. SW_TO_GND 2. DASIC_OFF 3. DASIC_SW_DET 4. GND 5. V_MON 6. VBULK 7. VBULK 8. VIN Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 2 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS Micro8 CASE 846A−02 ISSUE K DATE 16 JUL 2020 SCALE 2:1 GENERIC MARKING DIAGRAM* 8 XXXX AYWG G 1 XXXX A Y W G = Specific Device Code = Assembly Location = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. DOCUMENT NUMBER: DESCRIPTION: 98ASB14087C MICRO8 STYLE 1: PIN 1. 2. 3. 4. 5. 6. 7. 8. SOURCE SOURCE SOURCE GATE DRAIN DRAIN DRAIN DRAIN STYLE 2: PIN 1. 2. 3. 4. 5. 6. 7. 8. SOURCE 1 GATE 1 SOURCE 2 GATE 2 DRAIN 2 DRAIN 2 DRAIN 1 DRAIN 1 STYLE 3: PIN 1. 2. 3. 4. 5. 6. 7. 8. N-SOURCE N-GATE P-SOURCE P-GATE P-DRAIN P-DRAIN N-DRAIN N-DRAIN Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. 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