LM301A

LM301A, LM201A, LM201AV Non Compensated Single Operational Amplifiers A general purpose operational amplifier that allows the user to choose the compensation capacitor best suited to his needs. With proper compensation, summing amplifier slew rates to 10 V/ms can be obtained. Features http://onsemi.com MARKING DIAGRAMS 8 PDIP−8 N SUFFIX CASE 626 1 1 LMx01AN AWL YYWWG • Low Input Offset Current: 20 nA Maximum Over Temperature • • • • • Range External Frequency Compensation for Flexibility Class AB Output Provides Excellent Linearity Output Short Circuit Protection Guaranteed Drift Characteristics Pb−Free Packages are Available 8 8 VEE Inverting Input Non− Inverting Input Balance 10 MW VCC Output + Freq Compen 30 pF Balance 5.1 MW VEE 8 1 SOIC−8 D SUFFIX CASE 751 1 LMx01 ALYW G 20 k x A WL, L YY, Y WW, W G G = 2 or 3 = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package = Pb−Free Package Figure 1. Standard Compensation and Offset Balancing Circuit PIN CONNECTIONS Balance VUT VCC + VO VI MZ4622 or Equiv. 3.9 V Inputs VEE 1 2 3 4 8 7 6 5 Compensation VCC Output Balance (Top View) VEE VCC ORDERING INFORMATION VLT VO VO = 4.8 V for VLT ≤ VI ≤ VUT VO = −0.4 V VI < VLT or VI > VUT See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. VEE (Pins Not Shown Are Not Connected) Figure 2. Double−Ended Limit Detector © Semiconductor Components Industries, LLC, 2005 1 July, 2005 − Rev. 10 Publication Order Number: LM301A/D LM301A, LM201A, LM201AV Balance Compensation VCC Inputs + 500 25 50 Output 450 40 k 40 k 80 k 5k 20 k 250 10 k Balance 1.0 k VEE Figure 3. Representative Circuit Schematic ORDERING INFORMATION Device LM301AD LM301ADG LM301ADR2 LM301ADR2G LM301AN LM301ANG LM201AD LM201ADG LM201ADR2 LM201ADR2G LM201AN LM201ANG LM201AVDR2 LM201AVDR2G Package SOIC−8 SOIC−8 (Pb−Free) SOIC−8 SOIC−8 (Pb−Free) PDIP−8 PDIP−8 (Pb−Free) SOIC−8 SOIC−8 (Pb−Free) SOIC−8 SOIC−8 (Pb−Free) PDIP−8 PDIP−8 (Pb−Free) SOIC−8 SOIC−8 (Pb−Free) Shipping † 98 Units/Rail 98 Units/Rail 2500 Tape & Reel 2500 Tape & Reel 50 Units/Rail 50 Units/Rail 98 Units/Rail 98 Units/Rail 2500 Tape & Reel 2500 Tape & Reel 50 Units/Rail 50 Units/Rail 2500 Tape & Reel 2500 Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 2 LM301A, LM201A, LM201AV MAXIMUM RATINGS Value Rating Power Supply Voltage Input Differential Voltage Input Common Mode Range (Note 1) Output Short Circuit Duration Power Dissipation (Package Limitation) Plastic Dual−In−Line Package Derate above TA = +25°C Operating Ambient Temperature Range Storage Temperature Range TA Tstg Symbol VCC, VEE VID VICR tSC PD 625 5.0 −25 to +85 625 5.0 −40 to +105 −65 to +150 625 5.0 0 to +70 mW mW/°C °C °C LM201A ±22 LM201AV ±22 ±30 ±15 Continuous LM301A ±18 Unit Vdc V V Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. ELECTRICAL CHARACTERISTICS (TA = +25°C, unless otherwise noted.) Unless otherwise specified, these specifications apply for supply voltages from ± 5.0 V to ± 20 V for the LM201A and LM201AV, and from ± 5.0 V to ±15 V for the LM301A. LM201A / LM201AV Characteristic Input Offset Voltage (RS ≤ 50 kW) Input Offset Current Input Bias Current Input Resistance Supply Current VCC/VEE = ± 20 V VCC/VEE = ±15 V Large Signal Voltage Gain (VCC/VEE = ±15 V, VO = ±10 V, RL > 2.0 kW) Input Offset Voltage (RS ≤ 50 kW) Input Offset Current Avg Temperature Coefficient of Input Offset Voltage (Note 2) TA(min) ≤ TA ≤ TA (max) Avg Temperature Coefficient of Input Offset Current (Note 2) +25°C ≤ TA ≤ TA (max) TA(min) ≤ TA ≤ 25°C Input Bias Current Large Signal Voltage Gain (VCC/VEE = ±15 V, VO = ±10V, RL > 2.0 kW) Input Voltage Range VCC/VEE = ± 20 V VCC/VEE = ±15 V Common Mode Rejection (RS ≤ 50 kW) Supply Voltage Rejection (RS ≤ 50 kW) Output Voltage Swing (VCC/VEE = ±15 V, RL = ±10 kW, RL > 2.0 kW) Supply Currents (TA = TA(max), VCC/VEE = ± 20 V) Symbol VIO IIO IIB ri ICC,IEE − − AV 50 1.8 − 160 3.0 − − − − 25 − 1.8 160 − 3.0 − V/mV Min − − − 1.5 Typ 0.7 1.5 30 4.0 Max 2.0 10 75 − Min − − − 0.5 LM301A Typ 2.0 3.0 70 2.0 Max 7.5 50 250 − Unit mV nA nA MW mA The following specifications apply over the operating temperature range. VIO IIO DVIO/DT − − − − − 3.0 3.0 20 15 − − − − − 6.0 10 70 30 mV nA mV/°C DIIO/DT − − IIB AVOL VICR −15 − CMR PSR VO ICC,IEE 80 80 ±12 ±10 − − − 96 96 ±14 ±13 1.2 +15 − − − − − 2.5 − −12 70 70 ±12 ±10 − − − 90 96 ±14 ±13 − − +12 − − − − − − 25 0.01 0.02 − − 0.1 0.2 100 − − − − 15 0.01 0.02 − − 0.3 0.6 300 − nA/°C nA V/mV V dB dB V mA 1. For supply voltages less than ±15 V, the absolute maximum input voltage is equal to the supply voltage. 2. Guaranteed by design. http://onsemi.com 3 LM301A, LM201A, LM201AV Applicable to the Specified Operating Temperature Ranges VOR, OUTPUT VOLTAGE RANGE ( ± V) 20 VIR, INPUT VOLTAGE RANGE (V) 16 20 16 Applicable to the Specified Operating Temperature Ranges 12 Positive 8.0 4.0 0 Negative LM201A only 12 8.0 4.0 0 Minimum R L = 10 k Minimum RL = 2.0 k 0 5.0 10 15 VCC, ( −VEE), SUPPLY VOLTAGE (V) 20 LM201A only 0 5.0 10 15 VCC, ( −VEE), SUPPLY VOLTAGE (V) 20 Figure 4. Minimum Input Voltage Range Figure 5. Minimum Output Voltage Swing 100 94 AV, VOLTAGE GAIN (dB) 88 82 76 70 0 5.0 10 15 20 VCC, ( −VEE), SUPPLY VOLTAGE (V) LM201A only I CC , I EE, SUPPLY CURRENTS (mA) Applicable to the Specified Operating Temperature Ranges 2.5 2.0 1.5 1.0 0.5 0 TA = +25°C LM201A only 0 5.0 10 15 20 VCC, ( −VEE), SUPPLY VOLTAGE (V) Figure 6. Minimum Voltage Gain Figure 7. Typical Supply Currents 180 160 140 AV , VOLTAGE GAIN (dB) 120 100 80 60 40 20 0 −20 1.0 C1 = 30 pF Gain C1 = 3.0 pF Phase Single−Pole Compensation 315 270 225 180 135 90 45 0 10 100 1.0 k 10 k 100 k 1.0 M 10 M VOR, OUTPUT VOLTAGE RANGE ( ±V) Single−Pole Compensation 15 10 C1 = 3.0 pF 5.0 C1 = 30 pF 0 1.0 k 10 k 100 k f, FREQUENCY (Hz) 1.0 M 10 M f, FREQUENCY (Hz) Figure 8. Open Loop Frequency Response Figure 9. Large Signal Frequency Response http://onsemi.com 4 LM301A, LM201A, LM201AV 10 VIR , VOR, VOLTAGE RANGE ( ± V) 8.0 6.0 4.0 2.0 0 −2.0 −4.0 −6.0 −8.0 −10 0 10 20 30 40 50 60 70 80 90 t, TIME (ms) Input Output Single−Pole Compensation 140 120 A V, VOLTAGE GAIN (dB) 100 80 60 40 20 0 −20 10 100 1.0 k 10 k 100 k 1.0 M 10 M 100 M Gain Phase Feedforward Compensation 180 135 90 45 00 PHASE LAG (DEGREES) 9.0 225 f, FREQUENCY (Hz) Figure 10. Voltage Follower Pulse Response Figure 11. Open Loop Frequency Response 18 VOR, OUTPUT VOLTAGE RANGE ( ± V) VOR, OUTPUT VOLTAGE RANGE ( ± V) 16 12 Feedforward Compensation 10 8.0 6.0 4.0 2.0 0 −2.0 −4.0 −6.0 −8.0 −10 1.0 M f, FREQUENCY (Hz) 10 M 0 1.0 2.0 3.0 4.0 5.0 t, TIME (ms) 6.0 7.0 8.0 Input Feedforward Compensation Output 8.0 4.0 0 100 k Figure 12. Large Signal Frequency Response Figure 13. Inverter Pulse Response C2 R2 7 2 6 R3 +VI 3 + 8 Frequency Compensation C1 ≥ R1 Cs R1 +R2 R3 C1 150 pF 4 1 VEE Balance C1 VO VI VCC R1 2 3 + 1 R2 7 VCC 6 4 Balance C2 = 1 2πfoR2 VEE VO R1 −VI Cs = 30 pF fo = 3.0 MHz Figure 14. Single−Pole Compensation Figure 15. Feedforward Compensation http://onsemi.com 5 LM301A, LM201A, LM201AV PACKAGE DIMENSIONS PDIP−8 N SUFFIX CASE 626−05 ISSUE L NOTES: 1. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. DIM A B C D F G H J K L M N MILLIMETERS MIN MAX 9.40 10.16 6.10 6.60 3.94 4.45 0.38 0.51 1.02 1.78 2.54 BSC 0.76 1.27 0.20 0.30 2.92 3.43 7.62 BSC −−− 10_ 0.76 1.01 INCHES MIN MAX 0.370 0.400 0.240 0.260 0.155 0.175 0.015 0.020 0.040 0.070 0.100 BSC 0.030 0.050 0.008 0.012 0.115 0.135 0.300 BSC −−− 10_ 0.030 0.040 8 5 −B− 1 4 F NOTE 2 −A− L C −T− SEATING PLANE J N D K M M TA B H G 0.13 (0.005) M M http://onsemi.com 6 LM301A, LM201A, LM201AV SOIC−8 D SUFFIX CASE 751−07 ISSUE AG −X− A 8 5 B 1 4 S 0.25 (0.010) M Y M −Y− G C −Z− H D 0.25 (0.010) M SEATING PLANE K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244 N X 45 _ 0.10 (0.004) M ZY S J X S DIM A B C D G H J K M N S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 7 LM301A, LM201A, LM201AV ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Japan : ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Phone: 81−3−5773−3850 Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. http://onsemi.com 8 LM301A/D