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LM317L

LM317L

  • 厂商:

    ONSEMI(安森美)

  • 封装:

  • 描述:

    LM317L - 100 mA Adjustable Output, Positive Voltage Regulator - ON Semiconductor

  • 数据手册
  • 价格&库存
LM317L 数据手册
LM317L 100 mA Adjustable Output, Positive Voltage Regulator The LM317L is an adjustable 3−terminal positive voltage regulator capable of supplying in excess of 100 mA over an output voltage range of 1.2 V to 37 V. This voltage regulator is exceptionally easy to use and requires only two external resistors to set the output voltage. Further, it employs internal current limiting, thermal shutdown and safe area compensation, making them essentially blow−out proof. The LM317L serves a wide variety of applications including local, on card regulation. This device can also be used to make a programmable output regulator, or by connecting a fixed resistor between the adjustment and output, the LM317L can be used as a precision current regulator. Features http://onsemi.com LOW CURRENT THREE−TERMINAL ADJUSTABLE POSITIVE VOLTAGE REGULATOR • • • • • • • • • Pb−Free Packages are Available Output Current in Excess of 100 mA Output Adjustable Between 1.2 V and 37 V Internal Thermal Overload Protection Internal Short Circuit Current Limiting Output Transistor Safe−Area Compensation Floating Operation for High Voltage Applications Standard 3−Lead Transistor Package Eliminates Stocking Many Fixed Voltages SOIC−8 D SUFFIX CASE 751 8 1 Pin 1. 2. 3. 4. 5. 6. 7. 8. Vin Vout Vout Adjust N.C. Vout Vout N.C. TO−92 Z SUFFIX CASE 29 Pin 1. Adjust 2. Vout 3. Vin 1 2 3 Simplified Application Vin Vout LM317L ORDERING INFORMATION R1 240 See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. IAdj Cin* 0.1mF Adjust + C ** O 1.0mF R2 * Cin is required if regulator is located an appreciable ** distance from power supply filter. ** CO is not needed for stability, however, ** it does improve transient response. R Vout + 1.25 V 1 ) 2 ) IAdj R2 R1 Since IAdj is controlled to less than 100 mA, the error associated with this term is negligible in most applications. © Semiconductor Components Industries, LLC, 2005 1 October, 2005 − Rev. 8 Publication Order Number: LM317L/D LM317L MAXIMUM RATINGS Rating Input−Output Voltage Differential Power Dissipation Case 29 (TO−92) TA = 25°C Thermal Resistance, Junction−to−Ambient Thermal Resistance, Junction−to−Case Case 751 (SOIC−8) (Note 1) TA = 25°C Thermal Resistance, Junction−to−Ambient Thermal Resistance, Junction−to−Case Operating Junction Temperature Range Storage Temperature Range Symbol VI−VO Value 40 Unit Vdc PD RqJA RqJC Internally Limited 160 83 W °C/W °C/W PD RqJA RqJC TJ Tstg Internally Limited 180 45 −40 to +125 −65 to +150 W °C/W °C/W °C °C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. SOIC−8 Junction−to−Ambient Thermal Resistance is for minimum recommended pad size. Refer to Figure 23 for Thermal Resistance variation versus pad size. 2. This device series contains ESD protection and exceeds the following tests: Human Body Model, 2000 V per MIL STD 883, Method 3015. Machine Model Method, 200 V. http://onsemi.com 2 LM317L ELECTRICAL CHARACTERISTICS (VI−VO = 5.0 V; IO = 40 mA; TJ = Tlow to Thigh (Note 1); Imax and Pmax (Note 2); unless otherwise noted.) LM317L, LB Characteristics Line Regulation (Note 3) TA = 25°C, 3.0 V ≤ VI − VO ≤ 40 V Load Regulation (Note 3), TA = 25°C 10 mA ≤ IO ≤ Imax − LM317L VO ≤ 5.0 V VO ≥ 5.0 V Adjustment Pin Current Adjustment Pin Current Change 2.5 V ≤ VI − VO ≤ 40 V, PD ≤ Pmax 10 mA ≤ IO ≤ Imax − LM317L Reference Voltage 3.0 V ≤ VI − VO ≤ 40 V, PD ≤ Pmax 10 mA ≤ IO ≤ Imax − LM317L Line Regulation (Note 3), 3.0 V ≤ VI − VO ≤ 40 V Load Regulation (Note 3) 10 mA ≤ IO ≤ Imax − LM317L VO ≤ 5.0 V VO ≥ 5.0 V Temperature Stability (Tlow ≤ TJ ≤ Thigh) Minimum Load Current to Maintain Regulation (VI − VO = 40 V) Maximum Output Current VI − VO ≤ 6.25 V, PD ≤ Pmax, Z Package VI − VO ≤ 40 V, PD ≤ Pmax, TA = 25°C, Z Package RMS Noise, % of VO TA = 25°C, 10 Hz ≤ f ≤ 10 kHz Ripple Rejection (Note 4) VO = 1.2 V, f = 120 Hz CAdj = 10 mF, VO = 10.0 V Long Term Stability, TJ = Thigh (Note 5) TA = 25°C for Endpoint Measurements 3. 4. 5. 4 Figure 1 2 Symbol Regline Regload − − 3 1, 2 IAdj DIAdj − − 5.0 0.1 50 0.2 25 0.5 100 5.0 mV % VO mA mA Min − Typ 0.01 Max 0.04 Unit %/V 3 Vref 1.20 1.25 1.30 V 1 2 Regline Regload − 0.02 0.07 %/V − − 3 3 3 TS ILmin Imax 100 − N RR 60 − 3 S − − − − 20 0.3 0.7 3.5 200 20 0.00 3 80 80 0.3 70 1.5 − 10 − − − mV % VO % VO mA mA % VO dB − − 1.0 %/1.0 k Hrs. Tlow to Thigh = 0° to +125°C for LM317L −40° to +125°C for LM317LB Imax = 100 mA Pmax = 625 mW Load and line regulation are specified at constant junction temperature. Changes in VO due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used. 6. CAdj, when used, is connected between the adjustment pin and ground. 7. Since Long−Term Stability cannot be measured on each device before shipment, this specification is an engineering estimate of average stability from lot to lot. http://onsemi.com 3 LM317L ORDERING INFORMATION Device LM317LBD LM317LBDG LM317LBDR2 LM317LBDR2G LM317LBZ LM317LBZG LM317LBZRA LM317LBZRAG LM317LBZRP LM317LBZRPG LM317LD LM317LDG LM317LDR2 LM317LDR2G LM317LZ LM317LZG LM317LZRA LM317LZRAG LM317LZRE LM317LZRM LM317LZRP LM317LZRPG TJ = 0°C to +125°C TJ = −40°C to +125°C Operating Temperature Range Package SOIC−8 SOIC−8 (Pb−Free) SOIC−8 SOIC−8 (Pb−Free) TO−92 TO−92 (Pb−Free) TO−92 TO−92 (Pb−Free) TO−92 TO−92 (Pb−Free) SOIC−8 SOIC−8 (Pb−Free) SOIC−8 SOIC−8 (Pb−Free) TO−92 TO−92 (Pb−Free) TO−92 TO−92 (Pb−Free) TO−92 TO−92 TO−92 TO−92 (Pb−Free) Shipping† 98 Units / Rail 98 Units / Rail 2500/Tape & Reel 2500/Tape & Reel 2000 Units / Bag 2000 Units / Bag 2000 Tape & Reel 2000 Tape & Reel 2000 Ammo Pack 2000 Ammo Pack 98 Units / Rail 98 Units / Rail 2500/Tape & Reel 2500/Tape & Reel 2000 Units / Bag 2000 Units / Bag 2000 Tape & Reel 2000 Tape & Reel 2000 Tape & Reel 2000 Ammo Pack 2000 Ammo Pack 2000 Ammo Pack †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Representative Schematic Diagram Vin 300 300 300 3.0k 300 70 6.8V 6.8V 350 18k 8.67k 130 5.1k 200k 500 400 6.3V 180 180 2.0k 6.0k 10 p 10 Fp F 60 2.5 Vout 2.4k 12.8k 50 Adjust http://onsemi.com 4 LM317L VCC Line Regulation (%/V) = * VIH VIL Vin LM317L Vout VOH − VOL VOL x 100 VOH VOL Adjust Cin 0.1mF IAdj R1 240 1% CO RL + 1mF * Pulse Testing Required: 1% Duty Cycle is suggested. R2 1 % Figure 1. Line Regulation and DIAdj/Line Test Circuit Load Regulation (mV) = VO (min Load) −VO (max Load) VO (min Load) − VO (max Load) Load Regulation (% VO) = VO (min Load) Vin* Vin LM317L Vout IL X 100 VO (min Load) VO (max Load) Adjust Cin 0.1mF IAdj R1 240 1% + CO 1.0mF RL (max Load) * RL (min Load) * Pulse Testing Required: 1% Duty Cycle is suggested. R2 1% Figure 2. Load Regulation and DIAdj/Load Test Circuit Vin LM317L Vout IL Adjust R1 IAdj VI Cin 0.1mF ISET Pulse Testing Required: 1% Duty Cycle is suggested. R2 1% 240 1% Vref + CO 1mF RL VO To Calculate R2: Vout = ISET R2 + 1.250 V Assume ISET = 5.25 mA Figure 3. Standard Test Circuit http://onsemi.com 5 LM317L 14.30V 4.30V f = 120 Hz Vin LM317L Vout Vout = 1.25 V Adjust Cin 0.1mF R1 240 1% D1 * 1N4002 + CO 1mF RL VO R2 1.65K 1% + ** 10mF * D1 Discharges CAdj if Output is Shorted to Ground. **CAdj provides an AC ground to the adjust pin. Figure 4. Ripple Rejection Test Circuit Δ V out, OUTPUT VOLTAGE CHANGE (%) 0.4 0.2 0 −0.2 −0.4 −0.6 −0.8 −1.0 −50 −25 RR, RIPPLE REJECTION (dB) Vin = 45 V Vout = 5.0 V IL = 5.0 mA to 40 mA 80 70 IL = 40 mA f = 120 Hz Vout = 10 V Vin = 14 V to 24 V Vin = 10 V Vout = 5.0 V IL = 5.0 mA to 100 mA 60 50 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) 150 −50 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) 150 Figure 5. Load Regulation Figure 6. Ripple Rejection 0.50 0.40 0.30 0.20 0.10 0 TJ = 150°C V in −Vout , INPUT−OUTPUT VOLTAGE DIFFERENTIAL (V) TJ = 25°C IO, OUTPUT CURRENT (A) 2.5 2.0 IL = 100 mA 1.5 IL = 5.0 mA 1.0 0 10 20 30 40 Vin−Vout, INPUT−OUTPUT VOLTAGE DIFFERENTIAL (V) 50 0.5 −50 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) 150 Figure 7. Current Limit Figure 8. Dropout Voltage http://onsemi.com 6 LM317L 5.0 IB , QUIESCENT CURRENT (mA) 4.5 RR, RIPPLE REJECTION (dB) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 10 20 30 40 Vin−Vout, INPUT−OUTPUT VOLTAGE DIFFERENTIAL (V) TJ = 55°C TJ = 25°C TJ = 150°C 100 90 80 70 60 50 40 30 20 10 10 100 1.0 k 10 k 100 k 1.0 M f, FREQUENCY (Hz) IL = 40 mA Vin = 5.0 V ± 1.0 VPP Vout = 1.25 V Figure 9. Minimum Operating Current Figure 10. Ripple Rejection versus Frequency 1.260 IAdj, ADJUSTMENT PIN CURRENT ( μA) V ref , REFERENCE VOLTAGE (V) 80 70 65 60 55 50 45 40 35 −50 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) 150 Vin = 6.25 V Vout = Vref IL = 10 mA IL = 100 mA 1.250 1.240 Vin = 4.2 V Vout = Vref IL = 5.0 mA 1.230 1.220 −50 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) 150 Figure 11. Temperature Stability Figure 12. Adjustment Pin Current Δ Vout , OUTPUT VOLTAGE CHANGE (%) 0.4 0.2 0 −0.2 −0.4 −0.6 −0.8 −1.0 −50 NOISE VOLTAGE ( μV) Vin = 4.25 V to 41.25 V Vout = Vref IL = 5 mA 10 Bandwidth 100 Hz to 10 kHz 8.0 6.0 4.0 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) 150 −50 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) 150 Figure 13. Line Regulation Figure 14. Output Noise http://onsemi.com 7 LM317L ΔVout , OUTPUT VOLTAGE DEVIATION (V) Δ Vout , OUTPUT VOLTAGE DEVIATION (V) 1.5 1.0 0.5 0 −0.5 −1.0 −1.5 1.0 0.5 0 0 10 20 t, TIME (ms) Vin 30 40 Vout = 10 V IL = 50 mA TJ = 25°C CL = 1.0 mF; CAdj = 10 mF 0.3 0.2 0.1 0 −0.1 −0.2 −0.3 100 50 0 0 10 20 t, TIME (ms) IL 30 40 CL = 0.3 mF; CAdj = 10 mF Vin = 15 V Vout = 10 V INL = 50 mA TJ = 25°C CL = 1 mF; CAdj = 10 mF ΔV in , INPUT VOTLAGE CHANGE (V) Figure 15. Line Transient Response I L , LOAD CURRENT (mA) CL = 0; Without CAdj Figure 16. Load Transient Response APPLICATIONS INFORMATION Basic Circuit Operation Load Regulation The LM317L is a 3−terminal floating regulator. In operation, the LM317L develops and maintains a nominal 1.25 V reference (Vref) between its output and adjustment terminals. This reference voltage is converted to a programming current (IPROG) by R1 (see Figure 13), and this constant current flows through R2 to ground. The regulated output voltage is given by: Vout = Vref (1 + R2 ) + IAdj R2 R1 The LM317L is capable of providing extremely good load regulation, but a few precautions are needed to obtain maximum performance. For best performance, the programming resistor (R1) should be connected as close to the regulator as possible to minimize line drops which effectively appear in series with the reference, thereby degrading regulation. The ground end of R2 can be returned near the load ground to provide remote ground sensing and improve load regulation. External Capacitors Since the current from the adjustment terminal (IAdj) represents an error term in the equation, the LM317L was designed to control IAdj to less than 100 mA and keep it constant. To do this, all quiescent operating current is returned to the output terminal. This imposes the requirement for a minimum load current. If the load current is less than this minimum, the output voltage will rise. Since the LM317L is a floating regulator, it is only the voltage differential across the circuit which is important to performance, and operation at high voltages with respect to ground is possible. Vin LM317L Vout + R1 Adjust Vref IPROG Vout IAdj R2 A 0.1 mF disc or 1.0 mF tantalum input bypass capacitor (Cin) is recommended to reduce the sensitivity to input line impedance. The adjustment terminal may be bypassed to ground to improve ripple rejection. This capacitor (CAdj) prevents ripple from being amplified as the output voltage is increased. A 10 mF capacitor should improve ripple rejection about 15 dB at 120 Hz in a 10 V application. Although the LM317L is stable with no output capacitance, like any feedback circuit, certain values of external capacitance can cause excessive ringing. An output capacitance (CO) in the form of a 1.0 mF tantalum or 25 mF aluminum electrolytic capacitor on the output swamps this effect and insures stability. Vref = 1.25 V Typical Figure 17. Basic Circuit Configuration http://onsemi.com 8 LM317L Protection Diodes D1 1N4002 Vin LM317L R1 Adjust R2 CAdj Vout + Cin D2 CO When external capacitors are used with any IC regulator it is sometimes necessary to add protection diodes to prevent the capacitors from discharging through low current points into the regulator. Figure 14 shows the LM317L with the recommended protection diodes for output voltages in excess of 25 V or high capacitance values (CO > 10 mF, CAdj > 5.0 mF). Diode D1 prevents CO from discharging thru the IC during an input short circuit. Diode D2 protects against capacitor CAdj discharging through the IC during an output short circuit. The combination of diodes D1 and D2 prevents CAdj from discharging through the IC during an input short circuit. 1N4002 Figure 18. Voltage Regulator with Protection Diodes +25V Vin Adjust * To provide current limiting of IO to the system ground, the source of the current limiting diode must be tied to a negative voltage below − 7.25 V. Vref R2 ≥ IDSS R1 = Vref IOmax + IDSS Vout R1 1.25k D1 1N914 D2 1N914 VO IO D1 1N4002 Vin LM317L Vout + 1.0mF MPS2222 720 VSS* 1.0k TTL Control LM317L R2 500 120 Adjust 1N5314 Minimum Vout = 1.25 V VO < POV + 1.25 V + VSS ILmin − IP < IO < 100 mA − IP As shown O < IO < 95 mA D1 protects the device during an input short circuit. Figure 19. Adjustable Current Limiter Figure 20. 5.0 V Electronic Shutdown Regulator Vin LM317L R1 Vout IAdj R2 Iout Vin LM317L Vout 240 1N4002 50k MPS2907 + Adjust Adjust R2 Ioutmax = Vref R1 Vref R1 + R2 + IAdj ^ 1.25 V R1 1.25 V R1 + R2 10mF Ioutmax = + IAdj ^ 5.0 mA < Iout < 100 mA Figure 21. Slow Turn−On Regulator Figure 22. Current Regulator http://onsemi.com 9 LM317L PD, MAXIMUM POWER DISSIPATION (W) 170 R θ JA, THERMAL RESISTANCE JUNCTION−TO−AIR ( °C/W) 150 130 110 90 70 50 30 0 10 RθJA 20 Graph represents symmetrical layout L 2.0 oz. Copper L PD(max) for TA = 50°C 3.2 2.8 2.4 2.0 1.6 1.2 0.8 0.4 30 40 50 L, LENGTH OF COPPER (mm) Figure 23. SOP−8 Thermal Resistance and Maximum Power Dissipation versus P.C.B. Copper Length http://onsemi.com 10 Î ÎÎÎ Î Î Î Î ÎÎ Î Î Î Î Î ÎÎ Î Î Î Î ÎÎÎ 3.0 mm LM317L PACKAGE DIMENSIONS TO−92 Z SUFFIX CASE 29−11 ISSUE AL A R P L SEATING PLANE B NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. CONTOUR OF PACKAGE BEYOND DIMENSION R IS UNCONTROLLED. 4. LEAD DIMENSION IS UNCONTROLLED IN P AND BEYOND DIMENSION K MINIMUM. INCHES MIN MAX 0.175 0.205 0.170 0.210 0.125 0.165 0.016 0.021 0.045 0.055 0.095 0.105 0.015 0.020 0.500 −−− 0.250 −−− 0.080 0.105 −−− 0.100 0.115 −−− 0.135 −−− MILLIMETERS MIN MAX 4.45 5.20 4.32 5.33 3.18 4.19 0.407 0.533 1.15 1.39 2.42 2.66 0.39 0.50 12.70 −−− 6.35 −−− 2.04 2.66 −−− 2.54 2.93 −−− 3.43 −−− K XX G H V 1 D J C SECTION X−X N N DIM A B C D G H J K L N P R V http://onsemi.com 11 LM317L PACKAGE DIMENSIONS SOIC−8 D SUFFIX CASE 751−07 ISSUE AG −X− A 8 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244 B 1 4 S 0.25 (0.010) M Y M −Y− G C −Z− H D 0.25 (0.010) M SEATING PLANE K N X 45 _ 0.10 (0.004) M J ZY S X S DIM A B C D G H J K M N S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. http://onsemi.com 12 LM317L/D
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