LM324S, LM2902S
Single Supply Quad
Operational Amplifiers
The LM324S and LM2902S are low−cost, quad operational
amplifiers with true differential inputs. They have several distinct
advantages over standard operational amplifier types in single supply
applications. The common mode input range includes the negative
supply, thereby eliminating the necessity for external biasing
components in many applications. The output voltage range also
includes the negative power supply voltage.
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MARKING DIAGRAMS
14
Features
•
•
•
•
•
•
•
•
Short Circuited Protected Outputs
True Differential Input Stage
Single Supply Operation: 3.0 V to 32 V
Four Amplifiers Per Package
Internally Compensated
Common Mode Range Extends to Negative Supply
Industry Standard Pinouts
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
LM324SN
AWLYYWWG
1
1
14
PDIP−14
N SUFFIX
CASE 646
LM2902SN
AWLYYWWG
1
LMxxxx = Specific Device Code
A
= Assembly Location
WL
= Wafer Lot
Y, YY
= Year
WW
= Work Week
G
= Pb−Free Package
PIN CONNECTIONS
Out 1
1
14
2
13
Inputs 1
3
VCC
4
*
)
Inputs 4
12
4
11
5
10
Inputs 2
6
Out 2
*
1
)
)
2
*
3
)
*
7
Out 4
VEE, GND
Inputs 3
9
8
Out 3
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information on page 7 of
this data sheet.
© Semiconductor Components Industries, LLC, 2014
October, 2014 − Rev. 0
1
Publication Order Number:
LM324S/D
LM324S, LM2902S
MAXIMUM RATINGS (TA = + 25°C, unless otherwise noted.)
Rating
Symbol
Value
Unit
Vdc
Power Supply Voltages
Single Supply
VCC
32
Split Supplies
VCC, VEE
±16
Input Differential Voltage Range (Note 1)
VIDR
±32
Vdc
Input Common Mode Voltage Range (Note 2)
VICR
−0.3 to 32
Vdc
Output Short Circuit Duration
tSC
Continuous
Junction Temperature
TJ
150
°C
RJA
118
°C/W
Storage Temperature Range
Tstg
−65 to +150
°C
Operating Ambient Temperature Range
TA
Thermal Resistance, Junction−to−Air (Note 3)
Case 646
°C
LM324S
0 to +70
LM2902S
−40 to +105
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Split Power Supplies.
2. For supply voltages less than 32 V, the absolute maximum input voltage is equal to the supply voltage.
3. All RJA measurements made on evaluation board with 1 oz. copper traces of minimum pad size. All device outputs were active.
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2
LM324S, LM2902S
ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = GND, TA = 25°C, unless otherwise noted.)
LM324S
Symbol
Characteristics
Input Offset Voltage
Min
Typ
LM2902S
Max
Min
Typ
Max
Unit
mV
VIO
VCC = 5.0 V to 30 V, VICR = 0 V to VCC −1.7 V, VO = 1.4 V,
RS = 0
TA = 25°C
−
2.0
7.0
−
2.0
7.0
TA = Thigh (Note 4)
−
−
9.0
−
−
10
TA = Tlow (Note 4)
−
−
9.0
−
−
10
VIO/T
−
7.0
−
−
7.0
−
V/°C
IIO
−
5.0
50
−
5.0
50
nA
−
−
150
−
−
200
−
10
−
−
10
−
−
−90
−250
−
−90
−250
−
−
−500
−
−
−500
Average Temperature Coefficient of Input Offset Voltage
TA = Thigh to Tlow (Notes 4 and 6)
Input Offset Current
TA = Thigh to Tlow (Note 4)
IIO/T
Average Temperature Coefficient of Input Offset Current
TA = Thigh to Tlow (Notes 4 and 6)
Input Bias Current
IIB
TA = Thigh to Tlow (Note 4)
Input Common Mode Voltage Range (Note 5)
pA/°C
nA
V
VICR
VCC = 30 V
TA = +25°C
TA = Thigh to Tlow (Note 4)
Differential Input Voltage Range
VIDR
Large Signal Open Loop Voltage Gain
AVOL
0
−
28.3
0
−
0
−
28.3
−
28
0
−
28
−
VCC
−
−
VCC
V
V/mV
RL = 2.0 k, VCC = 15 V, for Large VO Swing
25
100
−
25
100
−
TA = Thigh to Tlow (Note 4)
15
−
−
15
−
−
CS
−
−120
−
−
−120
−
dB
Common Mode Rejection,
RS ≤ 10 k
CMR
65
70
−
50
70
−
dB
Power Supply Rejection
PSR
65
100
−
50
100
−
dB
Channel Separation
10 kHz ≤ f ≤ 20 kHz, Input Referenced
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. LM324S: Tlow = 0°C, Thigh = +70°C
LM2902S: Tlow = −40°C, Thigh = +105°C
5. The input common mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of
the common mode voltage range is VCC −1.7 V, but either or both inputs can go to +32 V without damage, independent of the magnitude
of VCC.
6. Guaranteed by design.
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3
LM324S, LM2902S
ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, VEE = GND, TA = 25°C, unless otherwise noted.)
LM324S
Symbol
Characteristics
Min
Typ
LM2902S
Max
Min
Typ
Max
Unit
VOH
Output Voltage − High Limit
V
VCC = 5.0 V, RL = 2.0 k, TA = 25°C
3.3
3.5
−
3.3
3.5
−
VCC = 30 V, RL = 2.0 k, (TA = Thigh to Tlow) (Note 7)
26
−
−
26
−
−
VCC = 30 V, RL = 10 k, (TA = Thigh to Tlow) (Note 7)
27
28
−
27
28
−
−
5.0
20
−
5.0
100
Output Voltage − Low Limit,
VCC = 5.0 V, RL = 10 k, TA = Thigh to Tlow (Note 7)
VOL
Output Source Current (VID = +1.0 V, VCC = 15 V)
IO +
mV
mA
TA = 25°C
20
40
−
20
40
−
TA = Thigh to Tlow (Note 7)
10
20
−
10
20
−
IO −
Output Sink Current
mA
VID = −1.0 V, VCC = 15 V, TA = 25°C
10
20
−
10
20
−
TA = Thigh to Tlow (Note 7)
5.0
8.0
−
5.0
8.0
−
VID = −1.0 V, VO = 200 mV, TA = 25°C
12
50
−
−
−
−
A
−
40
60
−
40
60
mA
Output Short Circuit to Ground (Note 8)
ISC
Power Supply Current (TA = Thigh to Tlow) (Note 7)
ICC
mA
VCC = 30 V VO = 0 V, RL = ∞
−
−
3.0
−
−
3.0
VCC = 5.0 V, VO = 0 V, RL = ∞
−
−
1.2
−
−
1.2
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
7. LM324S: Tlow = 0°C, Thigh = +70°C
LM2902S: Tlow = −40°C, Thigh = +105°C
8. The input common mode voltage or either input signal voltage should not be allowed to go negative by more than 0.3 V. The upper end of
the common mode voltage range is VCC −1.7 V, but either or both inputs can go to +32 V without damage, independent of the magnitude
of VCC.
Bias Circuitry
Common to Four
Output
Amplifiers
VCC
Q15
Q16
Q22
Q14
Q13
40 k
Q19
5.0 pF
Q12
Q24
25
Q23
+
Q20
Q18
Inputs
Q11
Q9
-
Q21
Q17
Q6
Q2
Q25
Q7
Q5
Q1
Q3
Q4
2.4 k
Q10
Q8
Q26
2.0 k
VEE/GND
Figure 1. Representative Circuit Diagram
(One−Fourth of Circuit Shown)
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4
LM324S, LM2902S
CIRCUIT DESCRIPTION
and Q18. Another feature of this input stage is that the input
common mode range can include the negative supply or
ground, in single supply operation, without saturating either
the input devices or the differential to single−ended
converter. The second stage consists of a standard current
source load amplifier stage.
Each amplifier is biased from an internal−voltage
regulator which has a low temperature coefficient thus
giving each amplifier good temperature characteristics as
well as excellent power supply rejection.
The LM324S and LM2902S are made using four
internally compensated, two−stage operational amplifiers.
The first stage of each consists of differential input devices
Q20 and Q18 with input buffer transistors Q21 and Q17 and
the differential to single ended converter Q3 and Q4. The
first stage performs not only the first stage gain function but
also performs the level shifting and transconductance
reduction functions. By reducing the transconductance, a
smaller compensation capacitor (only 5.0 pF) can be
employed, thus saving chip area. The transconductance
reduction is accomplished by splitting the collectors of Q20
3.0 V to VCC(max)
VCC
VCC
1
1
1.5 V to VCC(max)
2
2
3
3
4
4
1.5 V to VEE(max)
VEE
Single Supply
Split Supplies
VEE/GND
Figure 2.
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5
LM324S, LM2902S
50 k
R1
5.0 k
VCC
VCC
R2
10 k
1/4
MC1403
2.5 V
1/4
+
+
Vref =
1/4
C
C
For: fo = 1.0 kHz
R = 16 k
C = 0.01 F
Figure 4. Wien Bridge Oscillator
R2
1
CR
+
R
R
Figure 3. Voltage Reference
e1
1
fo = 2 RC
1
V
2 CC
R1
R2
VO = 2.5 V 1 +
VO
LM324S
VO
LM324S
VCC
-
Vref
-
R
Hysteresis
LM324S
VOH
-
R1
-
a R1
R1
1/4
+
Vin
-
+
b R1
1
CR
1/4
VO
+
VinH =
R
Figure 5. High Impedance Differential Amplifier
-
100 k
C
C
R
1/4
LM324S
-
+
LM324S
100 k
1/4
1/4
LM324S
+
Vref
Bandpass
Output
R2
R3
R1 = QR
R1
R2 =
TBP
C1 = 10C
Notch Output
+
Where:TBP=Center Frequency Gain
Where:TN=Passband Notch Gain
Figure 7. Bi−Quad Filter
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6
1
V
2 CC
C1
1/4
LM324S
Vref
Vref =
For:fo=1.0 kHz
For:Q= 10
For:TBP= 1
For:TN= 1
Vref
R1
-
1
fo =2 RC
R3 = TN R2
-
+
Vref
Vref
Figure 6. Comparator with Hysteresis
R
R2
VinH
R1
(VOH - VOL)
R1 + R2
R
C1
VinL
R1
(VOH - Vref) + Vref
R1 + R2
H=
eo = C (1 + a + b) (e2 - e1)
Vin
VOL
R1
(VOL - Vref) + Vref
VinL =
R1 + R2
LM324S
e2
VO
1/4
LM324S
eo
LM324S
Vref
R
C
R1
R2
R3
= 160 k
= 0.001 F
= 1.6 M
= 1.6 M
= 1.6 M
LM324S, LM2902S
Vref =
1
V
2 CC
Vref
Triangle Wave
Output
+
R2
300 k
R3
1/4
LM324S
-
VCC
+
1/4
75 k
LM324S
R1
100 k
-
Vref
C
C
Square
Wave
Output
R1
-
Vin
R1 + RC
4 CRf R1
CO = 10 C
Vref
R2 R1
R2 + R1
Figure 8. Function Generator
VO
+
R2
if R3 =
CO
1/4
LM324S
Rf
f =
C
R3
1
Vref = 2 VCC
Figure 9. Multiple Feedback Bandpass Filter
Given:fo=center frequency
A(fo)=gain at center frequency
Choose value fo, C
Then:
R3 =
Q
fo C
R1 =
R3
2 A(fo)
R2 =
R1 R3
4Q2 R1 - R3
For less than 10% error from operational amplifier,
Qo fo
BW
< 0.1
where fo and BW are expressed in Hz.
If source impedance varies, filter may be preceded with
voltage follower buffer to stabilize filter parameters.
ORDERING INFORMATION
Operating Temperature Range
Package
Shipping†
LM324SNG
0°C to +70°C
PDIP−14
(Pb−Free)
25 Units / Rail
LM2902SNG
−40°C to +105°C
PDIP−14
(Pb−Free)
25 Units / Rail
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP−14
CASE 646−06
ISSUE S
1
SCALE 1:1
D
A
14
8
E
H
E1
1
NOTE 8
7
b2
c
B
TOP VIEW
END VIEW
WITH LEADS CONSTRAINED
NOTE 5
A2
A
NOTE 3
L
SEATING
PLANE
A1
C
D1
e
M
eB
END VIEW
14X b
SIDE VIEW
0.010
M
C A
M
B
M
NOTE 6
DATE 22 APR 2015
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACKAGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3.
4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH
OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE
NOT TO EXCEED 0.10 INCH.
5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM
PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR
TO DATUM C.
6. DIMENSION eB IS MEASURED AT THE LEAD TIPS WITH THE
LEADS UNCONSTRAINED.
7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE
LEADS, WHERE THE LEADS EXIT THE BODY.
8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE
CORNERS).
DIM
A
A1
A2
b
b2
C
D
D1
E
E1
e
eB
L
M
INCHES
MIN
MAX
−−−−
0.210
0.015
−−−−
0.115 0.195
0.014 0.022
0.060 TYP
0.008 0.014
0.735 0.775
0.005
−−−−
0.300 0.325
0.240 0.280
0.100 BSC
−−−−
0.430
0.115 0.150
−−−−
10 °
MILLIMETERS
MIN
MAX
−−−
5.33
0.38
−−−
2.92
4.95
0.35
0.56
1.52 TYP
0.20
0.36
18.67 19.69
0.13
−−−
7.62
8.26
6.10
7.11
2.54 BSC
−−−
10.92
2.92
3.81
−−−
10 °
GENERIC
MARKING DIAGRAM*
14
XXXXXXXXXXXX
XXXXXXXXXXXX
AWLYYWWG
STYLES ON PAGE 2
1
XXXXX
A
WL
YY
WW
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42428B
PDIP−14
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
PDIP−14
CASE 646−06
ISSUE S
DATE 22 APR 2015
STYLE 1:
PIN 1. COLLECTOR
2. BASE
3. EMITTER
4. NO
CONNECTION
5. EMITTER
6. BASE
7. COLLECTOR
8. COLLECTOR
9. BASE
10. EMITTER
11. NO
CONNECTION
12. EMITTER
13. BASE
14. COLLECTOR
STYLE 2:
CANCELLED
STYLE 3:
CANCELLED
STYLE 4:
PIN 1. DRAIN
2. SOURCE
3. GATE
4. NO
CONNECTION
5. GATE
6. SOURCE
7. DRAIN
8. DRAIN
9. SOURCE
10. GATE
11. NO
CONNECTION
12. GATE
13. SOURCE
14. DRAIN
STYLE 5:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. NO CONNECTION
5. SOURCE
6. DRAIN
7. GATE
8. GATE
9. DRAIN
10. SOURCE
11. NO CONNECTION
12. SOURCE
13. DRAIN
14. GATE
STYLE 6:
PIN 1. COMMON CATHODE
2. ANODE/CATHODE
3. ANODE/CATHODE
4. NO CONNECTION
5. ANODE/CATHODE
6. NO CONNECTION
7. ANODE/CATHODE
8. ANODE/CATHODE
9. ANODE/CATHODE
10. NO CONNECTION
11. ANODE/CATHODE
12. ANODE/CATHODE
13. NO CONNECTION
14. COMMON ANODE
STYLE 7:
PIN 1. NO CONNECTION
2. ANODE
3. ANODE
4. NO CONNECTION
5. ANODE
6. NO CONNECTION
7. ANODE
8. ANODE
9. ANODE
10. NO CONNECTION
11. ANODE
12. ANODE
13. NO CONNECTION
14. COMMON
CATHODE
STYLE 8:
PIN 1. NO CONNECTION
2. CATHODE
3. CATHODE
4. NO CONNECTION
5. CATHODE
6. NO CONNECTION
7. CATHODE
8. CATHODE
9. CATHODE
10. NO CONNECTION
11. CATHODE
12. CATHODE
13. NO CONNECTION
14. COMMON ANODE
STYLE 9:
PIN 1. COMMON CATHODE
2. ANODE/CATHODE
3. ANODE/CATHODE
4. NO CONNECTION
5. ANODE/CATHODE
6. ANODE/CATHODE
7. COMMON ANODE
8. COMMON ANODE
9. ANODE/CATHODE
10. ANODE/CATHODE
11. NO CONNECTION
12. ANODE/CATHODE
13. ANODE/CATHODE
14. COMMON CATHODE
STYLE 10:
PIN 1. COMMON
CATHODE
2. ANODE/CATHODE
3. ANODE/CATHODE
4. ANODE/CATHODE
5. ANODE/CATHODE
6. NO CONNECTION
7. COMMON ANODE
8. COMMON
CATHODE
9. ANODE/CATHODE
10. ANODE/CATHODE
11. ANODE/CATHODE
12. ANODE/CATHODE
13. NO CONNECTION
14. COMMON ANODE
STYLE 11:
PIN 1. CATHODE
2. CATHODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
7. CATHODE
8. ANODE
9. ANODE
10. ANODE
11. ANODE
12. ANODE
13. ANODE
14. ANODE
STYLE 12:
PIN 1. COMMON CATHODE
2. COMMON ANODE
3. ANODE/CATHODE
4. ANODE/CATHODE
5. ANODE/CATHODE
6. COMMON ANODE
7. COMMON CATHODE
8. ANODE/CATHODE
9. ANODE/CATHODE
10. ANODE/CATHODE
11. ANODE/CATHODE
12. ANODE/CATHODE
13. ANODE/CATHODE
14. ANODE/CATHODE
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42428B
PDIP−14
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 2 OF 2
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
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and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
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vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
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