LM393S, LM2903S
Low Offset Voltage
Dual Comparators
The LM393S and LM2903S are dual, independent, precision
voltage comparators capable of single or split supply operation. These
devices are designed to permit a common mode range to ground level
with single supply operation. Input offset voltage specifications as low
as 2.0 mV make this device an excellent selection for many
applications in consumer, automotive, and industrial electronics.
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MARKING
DIAGRAMS
Features
•
•
•
•
•
•
•
•
•
•
Wide Single−Supply Range: 2.0 Vdc to 36 Vdc
Split−Supply Range: ±1.0 Vdc to ±18 Vdc
Very Low Current Drain Independent of Supply Voltage: 0.4 mA
Low Input Bias Current: 25 nA
Low Input Offset Current: 5.0 nA
Low Input Offset Voltage: 5.0 mV (max) with LM393S
Input Common Mode Range to Ground Level
Differential Input Voltage Range Equal to Power Supply Voltage
Output Voltage Compatible with DTL, ECL, TTL, MOS, and CMOS
Logic Levels
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
VCC
+ Input
- Input
Output
R2
2.1 k
Q3
Q5
PDIP−8
N SUFFIX
CASE 626
LM2903SN
AWL
YYWWG
LMxxxx = Specific Device Code
A, AL
= Assembly Location
WL
= Wafer Lot
Y, YY
= Year
W, WW = Work Week
G or G = Pb−Free Package
PIN CONNECTIONS
Q4
R4
LM393SN
AWL
YYWWG
Output A
Q6
Q14
2.0 k
Inputs A
F1
GND
1
8
2
7
4
−
+ 5
−
+
3
VCC
Output B
6
Inputs B
(Top View)
Q10
Q1
Q8
Q9
Q16
Q12
Q2
ORDERING INFORMATION
Q15
See detailed marking information and ordering and shipping
information on page 7 of this data sheet.
Q11
R1
4.6 k
Figure 1. Representative Schematic Diagram
(Diagram shown is for 1 comparator)
© Semiconductor Components Industries, LLC, 2014
October, 2014 − Rev. 0
1
Publication Order Number:
LM393S/D
LM393S, LM2903S
MAXIMUM RATINGS
Symbol
Value
Unit
Power Supply Voltage
Rating
VCC
+36 or ±18
V
Input Differential Voltage
VIDR
36
V
Input Common Mode Voltage Range (Note 1)
VICR
−0.3 to +36
V
Output Voltage
VO
36
V
Output Short Circuit−to−Ground
Output Sink Current (Note 2)
ISC
ISink
Continuous
20
mA
Power Dissipation @ TA = 25°C
Derate above 25°C
PD
1/RJA
570
5.7
MW
mW/°C
Operating Ambient Temperature Range
°C
TA
LM393S
LM2903S
Maximum Operating Junction Temperature
Storage Temperature Range
0 to +70
−40 to +105
TJ(max)
150
°C
Tstg
−65 to +150
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. For supply voltages less than 36 V, the absolute maximum input voltage is equal to the supply voltage.
2. The maximum output current may be as high as 20 mA, independent of the magnitude of VCC, output short circuits to VCC can cause
excessive heating and eventual destruction.
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2
LM393S, LM2903S
ELECTRICAL CHARACTERISTICS (VCC = 5.0 Vdc, Tlow ≤ TA ≤ Thigh, unless otherwise noted.)
LM393S
Characteristic
Input Offset Voltage (Note 3)
Min
Symbol
Typ
LM2903S
Max
Min
Typ
Max
VIO
mV
TA = 25°C
−
±1.0
±5.0
−
±2.0
±7.0
Tlow ≤ TA ≤ Thigh
−
−
±9.0
−
±9.0
±15
TA = 25°C
−
±5.0
±50
−
±5.0
±50
Tlow ≤ TA ≤ Thigh
−
−
±150
−
±50
±200
−
25
250
−
25
250
−
−
400
−
200
500
Input Offset Current
Input Bias Current (Note 4)
IIO
nA
IIB
nA
TA = 25°C
Tlow ≤ TA ≤ Thigh
Input Common Mode Voltage Range (Note 5)
Unit
VICR
V
TA = 25°C
0
−
VCC −1.5
0
−
VCC −1.5
Tlow ≤ TA ≤ Thigh
0
−
VCC −2.0
0
−
VCC −2.0
AVOL
50
200
−
25
200
−
V/mV
−
−
200
−
−
200
−
ns
tTLH
−
1.0
−
−
1.0
−
s
VID
−
−
VCC
−
−
VCC
V
ISink
6.0
16
−
6.0
16
−
mA
−
150
400
−
−
400
−
−
700
−
200
700
Voltage Gain
RL ≥ 15 k, VCC = 15 Vdc, TA = 25°C
Large Signal Response Time
Vin = TTL Logic Swing, Vref = 1.4 Vdc
VRL = 5.0 Vdc, RL = 5.1 k, TA = 25°C
Response Time (Note 6)
VRL = 5.0 Vdc, RL = 5.1 k, TA = 25°C
Input Differential Voltage (Note 7)
All Vin ≥ GND or V− Supply (if used)
Output Sink Current
Vin ≥ 1.0 Vdc, Vin+ = 0 Vdc, VO ≤ 1.5 Vdc TA = 25°C
Output Saturation Voltage
VOL
mV
Vin ≥ 1.0 Vdc, Vin+ = 0, ISink ≤ 4.0 mA, TA = 25°C
Tlow ≤ TA ≤ Thigh
Output Leakage Current
IOL
nA
Vin− = 0 V, Vin+ ≥ 1.0 Vdc, VO = 5.0 Vdc, TA = 25°C
−
0.1
−
−
0.1
−
Vin− = 0 V, Vin+ ≥ 1.0 Vdc, VO = 30 Vdc,
Tlow ≤ TA ≤ Thigh
−
−
1000
−
−
1000
RL = ∞ Both Comparators, TA = 25°C
−
0.6
1.0
−
0.6
1.0
RL = ∞ Both Comparators, VCC = 30 V
−
0.75
2.5
−
0.75
2.5
Supply Current
ICC
mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
LM393S Tlow = 0°C, Thigh = +70°C
LM2903S Tlow = −40°C, Thigh = +105°C
3. At output switch point, VO]1.4 Vdc, RS = 0 with VCC from 5.0 Vdc to 30 Vdc, and over the full input common mode range
(0 V to VCC = −1.5 V).
4. Due to the PNP transistor inputs, bias current will flow out of the inputs. This current is essentially constant, independent of the output state,
therefore, no loading changes will exist on the input lines.
5. Input common mode of either input should not be permitted to go more than 0.3 V negative of ground or minus supply. The upper limit of
common mode range is VCC −1.5 V.
6. Response time is specified with a 100 mV step and 5.0 mV of overdrive. With larger magnitudes of overdrive faster response times are
obtainable.
7. The comparator will exhibit proper output state if one of the inputs becomes greater than VCC, the other input must remain within the common
mode range. The low input state must not be less than −0.3 V of ground or minus supply.
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3
LM393S, LM2903S
APPLICATIONS INFORMATION
The addition of positive feedback (< 10 mV) is also
recommended. It is good design practice to ground all
unused pins.
Differential input voltages may be larger than supply
voltage without damaging the comparator’s inputs. Voltages
more negative than −0.3 V should not be used.
These dual comparators feature high gain, wide
bandwidth characteristics. This gives the device oscillation
tendencies if the outputs are capacitively coupled to the
inputs via stray capacitance. This oscillation manifests
itself during output transitions (VOL to VOH). To alleviate
this situation, input resistors < 10 k should be used.
+15 V
Vin
R1
8.2 k
R4
220 k
R1
D1
6.8 k
R2
R5
220 k
*
LM393S
+VCC
)
10 k
*
15 k
R3
10 m
LM393S
Vin
VCC
)
D1 prevents input from going negative by more than 0.6 V.
R3 ≤
R1 + R2 = R3
R5
for small error in zero crossing.
10
Vin(min) [ 0.4 V peak for 1% phase distortion ().
Figure 3. Zero Crossing Detector
(Split Supply)
t
VCC
VCC
R
RL
-
+
RL
10 k
0.001 F
51 k
51 k
- VEE
VCC
1.0 m
VO
-VEE
Figure 2. Zero Crossing Detector
(Single Supply)
VCC
Vin(min)
Vin
10 k
LM393S
LM393S
-
LM393S
VC
C
+
VO
VO
+ Vref
+
51 k
``ON'' for t tO + t
where:
Vref
)
t = RC ȏ n (
VCC
VCC
VO
Vin
VO
0
VC
0
tO
0
t
VCC
RS = R1 | | R2
RL
-
Vth1 = Vref +
LM393S
+
Vref
Vref
ȏ
Figure 5. Time Delay Generator
Figure 4. Free−Running Square−Wave Oscillator
RS
Vref
0
Vth2 = Vref -
R1
R2
Figure 6. Comparator with Hysteresis
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4
(VCC -Vref) R1
R1 + R2 + RL
(Vref -VO Low) R1
R1 + R2
t
LM393S, LM2903S
ORDERING INFORMATION
Operating Temperature Range
Package
Shipping†
LM393SNG
0°C to +70°C
PDIP−8
(Pb−Free)
50 Units / Rail
LM2903SNG
−40°C to +105°C
PDIP−8
(Pb−Free)
50 Units / Rail
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
PDIP−8
CASE 626−05
ISSUE P
DATE 22 APR 2015
SCALE 1:1
D
A
E
H
8
5
E1
1
4
NOTE 8
b2
c
B
END VIEW
TOP VIEW
WITH LEADS CONSTRAINED
NOTE 5
A2
A
e/2
NOTE 3
L
SEATING
PLANE
A1
C
D1
M
e
8X
SIDE VIEW
b
0.010
eB
END VIEW
M
C A
M
B
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACKAGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3.
4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH
OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE
NOT TO EXCEED 0.10 INCH.
5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM
PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR
TO DATUM C.
6. DIMENSION eB IS MEASURED AT THE LEAD TIPS WITH THE
LEADS UNCONSTRAINED.
7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE
LEADS, WHERE THE LEADS EXIT THE BODY.
8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE
CORNERS).
DIM
A
A1
A2
b
b2
C
D
D1
E
E1
e
eB
L
M
INCHES
MIN
MAX
−−−−
0.210
0.015
−−−−
0.115 0.195
0.014 0.022
0.060 TYP
0.008 0.014
0.355 0.400
0.005
−−−−
0.300 0.325
0.240 0.280
0.100 BSC
−−−−
0.430
0.115 0.150
−−−−
10 °
MILLIMETERS
MIN
MAX
−−−
5.33
0.38
−−−
2.92
4.95
0.35
0.56
1.52 TYP
0.20
0.36
9.02
10.16
0.13
−−−
7.62
8.26
6.10
7.11
2.54 BSC
−−−
10.92
2.92
3.81
−−−
10 °
NOTE 6
GENERIC
MARKING DIAGRAM*
STYLE 1:
PIN 1. AC IN
2. DC + IN
3. DC − IN
4. AC IN
5. GROUND
6. OUTPUT
7. AUXILIARY
8. VCC
XXXXXXXXX
AWL
YYWWG
XXXX
A
WL
YY
WW
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42420B
PDIP−8
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
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