LMV822DMR2G

LMV821, LMV822, LMV824 Single, Dual, Quad Low Voltage, Rail-to-Rail Operational Amplifiers The LMV821, LMV822, and LMV824 are operational amplifiers with low input voltage offset and drift vs. temperature. In spite of low quiescent current requirements these devices have 5 MHz bandwidth and 1.4 V/ms slew rate. In addition they provide rail−to−rail output swing into 600 W loads. The input common−mode voltage range includes ground, and the maximum input offset voltage is only 3.5 mV. Substantially large capacitive loads can be driven by simply adding a pullup resistor or isolation resistor. The LMV821 (single) is available in a space−saving SC70−5 while the dual and quad also come in ultra small SOIC and TSSOP packages. Features http://onsemi.com 1 SC−70 CASE 419A Micro8] CASE 846A 1 8 1 SOIC−8 CASE 751 • • • • • • Low Offset Voltage: 3.5 mV Very low Offset Drift: 1.0 mV/°C High Bandwidth: 5 MHz Rail−to−Rail Output Swing into a 600 W load Capable of driving highly capacitive loads These Devices are Pb−Free and are RoHS Compliant 1 SOIC−14 CASE 751A 1 TSSOP−14 CASE 948G Typical Applications • Notebook Computers • PDAs • Modem Transmitter/ Receivers 80 70 60 50 CMRR (dB) GAIN (dB) 40 30 20 10 0 −10 −20 1k 10k 100k FREQUENCY (Hz) 1M 10M 30 −1 40 60 50 80 70 ORDERING AND MARKING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 11 of this data sheet. VS = 5 V, RL = 100 kW VS = 5 V 0 1 2 3 4 INPUT COMMON MODE VOLTAGE (V) 5 Figure 1. Gain vs. Frequency Figure 2. CMRR vs. Input Common Mode Voltage © Semiconductor Components Industries, LLC, 2009 October, 2009 − Rev. 1 1 Publication Order Number: LMV821/D LMV821, LMV822, LMV824 MARKING DIAGRAMS SC−70 8 AAEMG G 1 AAE M G = Specific Device Code = Date Code = Pb−Free Package V822 A Y W G = Specific Device Code = Assembly Location = Year = Work Week = Pb−Free Package V822 AYWG G V822 A L Y W G Micro8 8 SOIC−8 V822 ALYWG G (Note: Microdot may be in either location) 1 = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) (Note: Microdot may be in either location) SOIC−14 14 LMV824G AWLYWW 1 LMV824 = Specific Device Code A = Assembly Location WL = Wafer Lot Y = Year WW = Work Week G = Pb−Free Package TSSOP−14 14 LMV 824 ALYWG G 1 LMV824 = Specific Device Code A = Assembly Location L = Wafer Lot Y = Year W = Work Week G = Pb−Free Package (Note: Microdot may be in either location) PIN CONNECTIONS SC70−5 1 +IN 2 V− 3 −IN + − 5 V+ IN A− 4 IN A+ OUTPUT V− 4 2 3 B +− OUT A 1 A −+ Micro8/SOIC−8 8 V+ 7 OUT B 6 IN B− 5 IN B+ OUT A IN A− IN A+ V+ IN B+ IN B− OUT B 1 2 3 4 5 SOIC−14 14 OUT D A −+ D +− 13 IN D− 12 IN D+ 11 V− 10 IN C+ 9 8 IN C− OUT C −+ +− OUT A IN A− IN A+ V+ IN B+ IN B− OUT B 1 2 3 4 5 TSSOP−14 14 OUT D A −+ D +− 13 IN D− 12 IN D+ 11 V− 10 IN C+ 9 8 IN C− OUT C −+ C +− B 6 7 6 7 (Top View) (Top View) B C (Top View) (Top View) http://onsemi.com 2 LMV821, LMV822, LMV824 MAXIMUM RATINGS Symbol VS VIDR VICR tSO TJ qJA Rating Supply Voltage (Operating Range VS = 2.7 V to 5.5 V) Input Differential Voltage Input Common Mode Voltage Range Maximum Input Current Output Short Circuit (Note 1) Maximum Junction Temperature (Operating Range −40°C to 85°C) Thermal Resistance SC−70 Micro8 SOIC−8 SOIC−14 TSSOP−14 TSTG VESD Storage Temperature Mounting Temperature (Infrared or Convection − 20 sec) ESD Tolerance Machine Model Human Body Model 280 238 212 156 190 −65 to 150 235 200 2000 °C °C V Value 5.5 $Supply Voltage −0.5 to (V+) +0.5 10 Continuous 150 °C °C/W Unit V V V mA Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Continuous short−circuit operation to ground at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150°C. Output currents in excess of 45 mA over long term may adversely affect reliability. Shorting output to either V+ or V− will adversely affect reliability. http://onsemi.com 3 LMV821, LMV822, LMV824 V− = 0 V, VCM = V+/2, VO = V+/2 and RL > 1 MW. Typical specifications represent the most likely parametric norm. Min/Max specifications are guaranteed by testing, characterization, or statistical analysis. Parameter Input Offset Voltage Symbol VIO TA = −40°C to +85°C Input Offset Voltage Average Drift Input Bias Current TCVOS IB TA = −40°C to +85°C Input Offset Current IIO TA = −40°C to +85°C Common−Mode Rejection Ratio Power Supply Rejection Ratio CMRR 0 V v VCM v 1.7 V TA = −40°C to +85°C PSRR 1.5 V v V+ v 4 V, V − = −1 V, VO = 0 V, VCM = 0.0 V TA = −40°C to +85°C Input Common−Mode Voltage Range Large Signal Voltage Gain VCM AV For CMRR w 53 dB and TA = −40°C to +85°C RL = 600 W, VO = 0.5 V to 2.5 V TA = −40°C to +85°C RL = 2 kW, VO = 0.5 V to 2.5 V TA = −40°C to +85°C Output Swing VOH VOL VOH VOL Output Current IO ICC RL = 600 W to 1.35 V TA = −40°C to +85°C RL = 600 W to 1.35 V TA = −40°C to +85°C RL = 2 kW to 1.35 V TA = −40°C to +85°C RL = 2 kW to 1.35 V TA = −40°C to +85°C Sourcing, VO = 0 V Sinking, VO = 2.7 V Supply Current LMV821 (Single) TA = −40°C to +85°C LMV822 (Both Applications) TA = −40°C to +85°C LMV824 (All Four Applications) TA = −40°C to +85°C 1 0.5 12 12 26 0.242 0.3 0.5 0.7 0.9 1.3 1.5 mA 2.6 2.5 0.08 0.12 0.2 mA 2.66 70 68 75 70 −0.2 80 70 83 80 2.5 2.4 0.13 0.21 0.3 2.58 V 89 −0.3 to 2.0 95 1.9 V dB 85 dB 85 0.5 1 105 210 315 30 50 dB nA Conditions Min Typ 1 2.7V DC ELECTRICAL CHARACTERISTICS Unless otherwise noted, all min/max limits are guaranteed for TA = 25°C, V+ = 2.7 V, Max 3.5 4 Unit mV mV/°C nA http://onsemi.com 4 LMV821, LMV822, LMV824 V− = 0 V, VCM = V+/2, VO = V+/2 and RL > 1 MW. Typical specifications represent the most likely parametric norm. Min/Max specifications are guaranteed by testing, characterization, or statistical analysis. Parameter Input Offset Voltage Symbol VIO Conditions TA = −40°C to +85°C Min Typ 1 2.5V DC ELECTRICAL CHARACTERISTICS Unless otherwise noted, all min/max limits are guaranteed for TA = 25°C, V+ = 2.5 V, Max 3.5 4 Unit mV Output Swing VOH RL = 600 W to 1.25 V TA = −40°C to +85°C 2.3 2.2 2.37 V VOL RL = 600 W to 1.25 V TA = −40°C to +85°C 0.13 0.20 0.3 VOH RL = 2 kW to 1.25 V TA = −40°C to +85°C 2.4 2.3 2.46 VOL RL = 2 kW to 1.25 V TA = −40°C to +85°C 0.08 0.12 0.20 0 V, VCM = 1.0 V, VO = V+/2 and RL > 1 MW. Typical specifications represent the most likely parametric norm. Min/Max specifications are guaranteed by testing, characterization, or statistical analysis. Parameter Slew Rate Gain Bandwidth Product Phase Margin Gain Margin Input−Referred Voltage Noise Input−Referred Current Noise Total Harmonic Distortion Amplifier−to−Amplifier Isolation Symbol SR GBWP qm Gm en in THD f = 1 kHz, VCM = 1 V f = 1kHz f = 1 kHz, AV = −2, RL = 10 kW , VO = 1.8 VPP (Note 3) Conditions (Note 2) Min Typ 1.5 5 55 12.9 12 0.2 0.023 135 Max Unit V/uS MHz ° dB nV/√Hz pA/√Hz % dB 2.7V AC ELECTRICAL CHARACTERISTICS Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 2.7 V, V− = 2. Connected as voltage follower with input step from 0.5 V to 1.5 V. Number specified is the average of the positive and negative slew rates. 3. Input referred, RL = 100 kW connected to V+/2. Each amp excited in turn with 1kHz to produce VO = 3 VPP. For Supply Voltages < 3 V, VO = V+. http://onsemi.com 5 LMV821, LMV822, LMV824 = 0 V, VCM = V+/2, VO = V+/2 and RL > 1 MW. Typical specifications represent the most likely parametric norm. Min/Max specifications are guaranteed by testing, characterization, or statistical analysis. Parameter Input Offset Voltage Symbol VIO TA = −40°C to +85°C Input Offset Voltage Average Drift Input Bias Current TCVOS IB TA = −40°C to +85°C Input Offset Current IIO TA = −40°C to +85°C Common−Mode Rejection Ratio Power Supply Rejection Ratio CMRR 0 V v VCM v 4.0 V TA = −40°C to +85°C PSRR 1.7 V v V+ v 4 V, V − = 1 V, VO = 0 V, VCM = 0.0 V TA = −40°C to +85°C Input Common−Mode Voltage Range Large Signal Voltage Gain VCM AV For CMRR w 58 dB and TA = − 40°C to +85°C RL = 600 W, VO = 1.0 V to 4.0 V TA = −40°C to +85°C RL = 2 kW, VO = 1.0 V to 4.0 V TA = −40°C to +85°C Output Swing VOH VOL VOH VOL Output Current IO RL = 600 W to 2.5 V TA = −40°C to +85°C RL = 600 W to 2.5 V TA = −40°C to +85°C RL = 2 kW to 2.5 V TA = −40°C to +85°C RL = 2 kW to 2.5 V TA = −40°C to +85°C Sourcing, Vo = 0 V TA = −40°C to +85°C Sinking, Vo = 5 V TA = −40°C to +85°C Supply Current ICC TA = −40°C to +85°C LMV822 (Both Applications) TA = −40°C to +85°C LMV824 (All Four Applications) TA = −40°C to +85°C 1 0.5 20 10 20 15 0.3 0.4 0.6 0.7 0.9 1.3 1.5 mA 40 45 4.85 4.8 0.1 0.15 0.2 mA 4.9 72 70 75 70 −0.2 87 73 84 82 4.75 4.7 0.17 0.33 0.4 4.84 V 99 −0.2 to 4.3 100 4.2 V dB 85 dB 90 0.5 1 119 245 380 30 50 dB nA Conditions Min Typ 1 Max 3.5 4 mV/°C nA 5V DC ELECTRICAL CHARACTERISTICS Unless otherwise noted, all min/max limits are guaranteed for TA = 25°C, V+ = 5 V,V− Unit mV http://onsemi.com 6 LMV821, LMV822, LMV824 VCM = 2.0 V, VO = V+/2 and RL > 1 MW. Typical specifications represent the most likely parametric norm. Min/Max specifications are guaranteed by testing, characterization, or statistical analysis. Parameter Slew Rate Gain Bandwidth Product Phase Margin Gain Margin Input−Referred Voltage Noise Input−Referred Current Noise Total Harmonic Distortion Amplifier−to−Amplifier Isolation Symbol SR GBWP qm Gm en in THD f = 1 kHz, VCM = 1 V f = 1 kHz f = 1 kHz, AV = −2, RL = 10 kW , VO = 4.11 VPP (Note 5) Conditions (Note 4) Min Typ 2 5.6 63 11.7 11 0.21 0.012 135 Max 5V AC ELECTRICAL CHARACTERISTICS Unless otherwise specified, all limits are guaranteed for TA = 25°C, V+ = 5 V, V− = 0 V, Unit V/mS MHz ° dB nV/√Hz pA/√Hz % dB 4. Connected as voltage follower with input step from 0.5 V to 3.5 V. Number specified is the average of the positive and negative slew rates. 5. Input referred, RL = 100 kW connected to V+/2. Each amp excited in turn with 1 kHz to produce VO = 3 VPP. (For Supply Voltages < 3 V, VO = V+). http://onsemi.com 7 LMV821, LMV822, LMV824 TYPICAL PERFORMANCE CHARACTERISTICS 120 CROSSTALK REJECTION (dB) 100 80 60 40 20 0 100 100 90 80 70 +PSRR (dB) 60 50 40 30 20 10 1k 10k 100k 0 100 1k 10k FREQUENCY (Hz) 100k 1M VS = 5 V VS = 2.7 V FREQUENCY (Hz) Figure 3. Crosstalk Rejection vs. Frequency 100 90 80 70 −PSRR (dB) GAIN (dB) Figure 4. +PSRR vs. Frequency 80 70 60 VS = 5 V VS = 2.7 V 50 40 30 20 10 0 −10 1k 10k FREQUENCY (Hz) 100k 1M −20 1k 10k VS = 5 V, CL = 0 pF, RL = 100 kW 60 50 40 30 20 10 0 100 100k FREQUENCY (Hz) 1M 10M Figure 5. −PSRR vs. Frequency Figure 6. Gain vs. Frequency 80 70 60 50 GAIN (dB) 40 30 20 10 0 −10 −20 1k 10k VS = 2.7 V, CL = 0 pF, RL = 100 kW 100k FREQUENCY (Hz) 1M 10M Figure 7. Gain vs. Frequency Figure 8. Non−Inverting Stability vs. Capacitive Load http://onsemi.com 8 LMV821, LMV822, LMV824 TYPICAL PERFORMANCE CHARACTERISTICS 3 2.5 SR+ GAIN (dB) 2 1.5 1 0.5 AV = 1, RL = 100 kW, TA = 25°C SR− 2.5 3 3.5 4 4.5 5 FREQUENCY (Hz) Figure 9. Gain vs. Frequency Figure 10. Non−Inverting Large Signal Step Response Figure 11. Non−Inverting Small Signal Step Response Figure 12. Inverting Large Signal Step Response Figure 13. Inverting Small Signal Step Response http://onsemi.com 9 LMV821, LMV822, LMV824 APPLICATIONS INFORMATION 50 k R1 5.0 k VCC R2 VCC − LMV821 MC1403 2.5 V + VO Vref 10 k − + VCC VO LMV821 1 V ref + V CC 2 R1 V O + 2.5 V(1 ) ) R2 R fO + R 1 2pRC C C For: fo = 1.0 kHz R = 16 kW C = 0.01 mF Figure 14. Voltage Reference Figure 15. Wien Bridge Oscillator VCC C R2 Hysteresis VOH Vref Vin R1 + LMV821 − VO VO Vin R1 C R3 − LMV821 + Vref CO VO CO = 10 C R2 VOL VinL Vref VinH Given: fo = center frequency A(fo) = gain at center frequency Choose value fo, C Q Then : R3 + pf O C R1 + R2 + R3 2 A(f O) R1 R3 4Q 2 R1 * R3 R1 (V OL * V ref) ) V ref R1 ) R2 R1 V inH + (V OH * V ref) ) V ref R1 ) R2 R1 H+ (V OH * V OL) R1 ) R2 V inL + Figure 16. Comparator with Hysteresis For less than 10% error from operational amplifier, ((QO fO)/BW) < 0.1 where fo and BW are expressed in Hz. If source impedance varies, filter may be preceded with voltage follower buffer to stabilize filter parameters. Figure 17. Multiple Feedback Bandpass Filter http://onsemi.com 10 LMV821, LMV822, LMV824 ORDERING INFORMATION Number of Channels Single Dual Dual Quad Quad Order Number LMV821SQ3T2G* LMV822DMR2G* LMV822DR2G* LMV824DR2G LMV824DTBR2G Specific Device Marking AAE V822 V822 LMV824 LMV 824 Package Type SC−70 (Pb−Free) Micro8 (Pb−Free) SOIC−8 (Pb−Free) SOIC−14 (Pb−Free) TSSOP−14 (Pb−Free) Shipping† 3000 / Tape & Reel 4000 / Tape & Reel 2500 / Tape & Reel 2500 / Tape & Reel 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *Contact factory. http://onsemi.com 11 LMV821, LMV822, LMV824 PACKAGE DIMENSIONS SC−88A, SOT−353, SC−70 CASE 419A−02 ISSUE J G A 5 4 S 1 2 3 −B− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A−01 OBSOLETE. NEW STANDARD 419A−02. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC --0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC --0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 D 5 PL 0.2 (0.008) M B M N J C DIM A B C D G H J K N S H K http://onsemi.com 12 LMV821, LMV822, LMV824 PACKAGE DIMENSIONS Micro8™ CASE 846A−02 ISSUE H D NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. 846A-01 OBSOLETE, NEW STANDARD 846A-02. MILLIMETERS NOM MAX −− 1.10 0.08 0.15 0.33 0.40 0.18 0.23 3.00 3.10 3.00 3.10 0.65 BSC 0.40 0.55 0.70 4.75 4.90 5.05 MIN −− 0.05 0.25 0.13 2.90 2.90 INCHES NOM −− 0.003 0.013 0.007 0.118 0.118 0.026 BSC 0.016 0.021 0.187 0.193 MIN −− 0.002 0.010 0.005 0.114 0.114 HE E PIN 1 ID e b 8 PL 0.08 (0.003) M TB S A S −T− PLANE 0.038 (0.0015) A1 SEATING A c L DIM A A1 b c D E e L HE MAX 0.043 0.006 0.016 0.009 0.122 0.122 0.028 0.199 SOLDERING FOOTPRINT* 8X 1.04 0.041 0.38 0.015 8X 3.20 0.126 4.24 0.167 5.28 0.208 6X 0.65 0.0256 SCALE 8:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 13 LMV821, LMV822, LMV824 PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AJ −X− A 8 5 B 1 S 4 0.25 (0.010) M Y M −Y− G K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. DIM A B C D G H J K M N S MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244 C −Z− H D 0.25 (0.010) M SEATING PLANE N X 45 _ 0.10 (0.004) M J ZY S X S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 14 LMV821, LMV822, LMV824 PACKAGE DIMENSIONS SOIC−14 CASE 751A−03 ISSUE J −A− 14 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. −B− P 7 PL 0.25 (0.010) M B M 1 7 G C −T− SEATING PLANE R X 45 _ F D 14 PL 0.25 (0.010) M K TB S M A S J DIM A B C D F G J K M P R MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019 SOLDERING FOOTPRINT* 7X 7.04 1 0.58 14X 14X 1.52 1.27 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 15 LMV821, LMV822, LMV824 PACKAGE DIMENSIONS TSSOP−14 CASE 948G−01 ISSUE B M 14X K REF 0.10 (0.004) 0.15 (0.006) T U S TU S V S N 2X L/2 14 8 0.25 (0.010) M L PIN 1 IDENT. 1 7 B −U− N F DETAIL E K K1 J J1 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. DIM A B C D F G H J J1 K K1 L M MILLIMETERS INCHES MIN MAX MIN MAX 4.90 5.10 0.193 0.200 4.30 4.50 0.169 0.177 −−− 1.20 −−− 0.047 0.05 0.15 0.002 0.006 0.50 0.75 0.020 0.030 0.65 BSC 0.026 BSC 0.50 0.60 0.020 0.024 0.09 0.20 0.004 0.008 0.09 0.16 0.004 0.006 0.19 0.30 0.007 0.012 0.19 0.25 0.007 0.010 6.40 BSC 0.252 BSC 0_ 8_ 0_ 8_ 0.15 (0.006) T U S A −V− SECTION N−N −W− C 0.10 (0.004) −T− SEATING PLANE D G H DETAIL E SOLDERING FOOTPRINT 7.06 1 0.36 14X 14X 1.26 Micro8 is a trademark of International Rectifier. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 16 ÉÉÉ ÇÇÇ ÉÉÉ ÇÇÇ 0.65 PITCH DIMENSIONS: MILLIMETERS LMV821/D