LV8163QA-BH

Ordering number : ENA2065A LV8163QA Bi-CMOS IC Fan Motor Driver http://onsemi.com Single-Phase Full-Wave Driver Overview The LV8163QA is a driver IC for single phase fan motor which operates noiselessly by BTL linear output method. The LV8163QA has variable speed function that corresponds to external PWM single input. Therefore, this IC is suitable for CPU cooler for note PC and the like which requires low power consumption, noiseless operation and variable speed functions. Functions • Single phase full wave drive by BTL output method. • Speed control function by PWM input. • Integrated lock protector and auto recovery circuit. • Standby mode and quick start function. • Hall bias output pin. • Startup support function (100% DUTYSTART) • FG signal pin, RD signal pin • Integrated TSD (Thermal ShutDown) circuit Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Power supply voltage Symbol Conditions Ratings Unit VCC max 7 Output pin current IOUT max 0.7 A Output pin withstand voltage VOUT max 7 V HB output current IHB max 10 mA PWM pin voltage VPWM max 7 V FG/RD pin sink current IFG/IRD max 5 mA FG/RD output pin voltage VFG/VRD max 7 V Allowable power dissipation Pd max Operating temperature Topr -30 to +95 °C Storage temperature Tstg -55 to +150 °C Mounted on specified board *1 1050 V mW *1 Specified substrate : 105mm × 120mm × 1.6mm, two-sided glass epoxy board *2 Do not exceed Tjmax = 150°C Caution 1) Absolute maximum ratings represent the value which cannot be exceeded for any length of time. Caution 2) Even when the device is used within the range of absolute maximum ratings, as a result of continuous usage under high temperature, high current, high voltage, or drastic temperature change, the reliability of the IC may be degraded. Please contact us for the further details. Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Semiconductor Components Industries, LLC, 2013 May, 2013 N2812NK 20121115-S00004 /53012 SY 20120522-S00007 No.A2065-1/7 LV8163QA Operating Conditions at Ta = 25°C Parameter Symbol Power supply voltage VCC Operating power supply voltage VCCop Hall input common-mode input voltage VICM Conditions Ratings Unit 5.0 V 2.0 to 6.0 V 0.2 to VCC-1.2 V range PWM pin input frequency FPWMIN 20 to 60 kHz Electrical Characteristics at Ta = 25°C, VCC = 5V Parameter Symbol Ratings Conditions min Circuit current ICC During operation max 0.95 1.3 0.9 ICC st During Standby mode HB pin voltage VHB IHB = 5mA Output pin high-level voltage VOH IOUT = 200mA (VCC – VOUT) Output pin low-level voltage VOL IOUT = 200mA Hall amplifier input offset voltage VINOFS -6 Hall amplifier voltage gain GH 44 PWM pin input Low level voltage VPWML PWM pin input High level voltage VPWMH 1.6 mA 10 30 μA 1.03 1.2 V 0.16 0.23 V 0.10 0.15 45.5 mV 47 dB V 1.8 6.0 V VCC× 6.0 V 0.3 V VCC < 4V VCC V 6 VCC×0.2 0 4V Unit typ 0.45 FG/RD pin low-level voltage VFGL/VRDL IFG/IRD = 3mA FG/RD pin leak current IFGL/IRDL VFG/VRD = 7V FG comparator hysteresis width FGHYS Lock-detection output ON time LT1 0.4 10 μA ±8 ±16 mV 0.6 0.8 sec sec Lock-detection output OFF time LT2 Lock-detection output ON/OFF ratio LRTO LRTO=LT2/LT1 4 6 8 8 10 12 Thermal shutdown operating temperature TSD Design guarantee * 180 °C Thermal shutdown hysteresis width ΔTSD Design guarantee * 30 °C * Design target: These values are the target value in designs. The parameters are not measured independently. Pin Assignment IN1 1 10 RD HB 2 9 FG IN2 3 8 PWM OUT1 4 7 VCC GND 5 6 OUT2 Top view Truth value table IN1 IN2 High Low PWM OUT1 High Low High * FG RD Low Operation (OUT2→OUT1) OFF Low Recirculation OFF Lock protector (see *1) High Low * Low OUT2 Low OFF High High Low Low * OFF Low Low Low Low Low OFF Mode Low Operation (OUT1→OUT2) Low Recirculation OFF Lock protector (see *1) Low Standby (see *2) *1 If FG pulse is not switched when lock detection output is ON, lock protecdtor mode is set. *2 Standby mode is set when time of lock protecdtor + PWM input low level voltage is greator than 750μs. Standby mode is set when time of low level voltage is 750μs and voltage is supplied and PWM input is at low level voltage. No.A2065-2/7 LV8163QA Package Dimensions unit : mm (typ) 3432 TOP VIEW Pd max -- Ta 1.5 2.6 0.127 1 2 0 to 0.05 SIDE VIEW 0.35 BOTTOM VIEW 2.125 1 0.55 MAX 2.6 Ambient temperature, Pd max -- W Specified board (105×120×1.6mm3, paper phenol) 1.05 1.0 0.5 0.46 0 --30 5 30 0 60 90 120 0.2 MIN 1.235 Ambient temperature, Ta -- °C 10 0.5 6 0.25 SANYO : UDFN10(2.6X2.6) Block Diagram LOCK DETECTION IN1 1 HB 2 OSC CONTROL 10 RD 9 FG TSD HB VCC 500k 8 PWM 4 7 VCC 5 6 OUT2 GND + + - OUT1 10k + - 3 + IN2 No.A2065-3/7 LV8163QA Example of circuit application *6 1 IN1 2 HB H *2 RD 10 RDOUT FG 9 FGOUT PWM 8 PWMIN *5 *3 3 IN2 4 OUT1 5 GND *4 VCC 7 *1 *7 OUT2 6 *1 < Capacitor for power stabilization > The capacitor for power stabilization must be 1μF or greater. The capacitor is not removable. Make sure to connect the capacitor with the think and shortest possible pattern between VCC and GND. When a protection diode against reverse connection is used. If supply voltage increases due to coil kickback, connect zener diode between power supply and GND. This IC performs synchronous rectification to reduce hest generation and to enhance efficiency. Depends on usage conditions, coil current may flow back to power supply by synchronous rectification. *when output DUTY is reduced rapidly. *When PWM input frequency is low. The increase of supply voltage varies depends on the presence of diode (to prevent IC descruction from reverse connection), the size of power capacitor, and usage fan. If the increase of supply voltage is excessive, use capacitor with enough capacitance or connect zener between power supply and GND so that the voltage is within the absolute maximum ratings. *2 < HB pin > Constant voltage output pin, which is used as bias for Hall element. When Hall element is biased from VCC line and HB pin is unused, HB pin should be pulled down to GND with resistor of 1kΩ. Bias for power supply and bias for HB pin cannot be used together. Connect a resistor between Hall element and GND to adjust amplitude of Hall element. *3 < IN1,IN2 pin > Hall element signal input pin. Make sure to keep the wiring short to prevent noise. If noise is generated, use capacitor between IN1 and IN2. As for Hall input level, the following conditions must be met: Difference of voltage between IN1 and IN2 > usage voltage / Hall amplifier gain + Hall amplifier input offset No.A2065-4/7 LV8163QA *4 < PWM pin > Motor speed control sifnal input pin. PWM pin is pulled up at 500kΩ in LV8136QA. Resistance of 500kΩ is used for full-speed setting when PWM pin is open. In order to control motor speed using open Collector input method (open drain), pull-up is required using suitable resistance. Pull-up resistance is not required when motor speed is controlled by Push-pull input method. The order of power supply is optinal; either to power supply voltage or PWM input, under one of the following conditions. 1) When open collector input method is used. 2) Pull-up resistance is not implemented and Push-pull input method is used. It is recommended to connect a resistance greator than 1kΩ in series to protect PWM pin against open GND and misconnection. *5 < FG pin > Used as rotation counter. This pin is open drain output. You can count rotations according to phase change. This pin is set to off during standby mode. Make sure to set this pin open when unused. It is recommended to connect a resistance greater than 1kΩ in series to protect PWM pin against open GND and misconnection. *6 < RD pin > Used as lock detector. This pin is open drain output. During rotation, RD pin is set to low-level voltage. During lock detection, it is set to off. During standby, it is set to low-level voltage. Make sure to set this pin open when unused. It is recommended to connect a resistance greator than 1kΩ in series to protect PWM pin against open GND and misconnection. *7 < Low power dissipation during standby > During standby, the fan motor used in LV8136QA can reduce power dissipation into 10µA (under room temperature, Typ). However, power dissipation cannot be reduced into 10µA under the following conditions. • When bias of Hall element is supplied from power supply: → Current flowing into Hall element increases. • When pull-up resistor is used to PWM pin → During standby, the current flowing into pull-up resistor increases because PWM pin must be set to low-level voltage. • When using RD pin → During standby, the current flowing into pull-up resistor increases because RD pin turns low-level voltage. No.A2065-5/7 LV8163QA Timing Chart Switch: stand-by/operation VCC TSLP TSLP PWM FG HB IN2 IN1 Stand-by Active Active Active Waiting for FG pulse LT1 Stand-by *1 TSLP=750μs(typ) *2 If PWM signal is low-level voltage for the period of TSLP and FG signal is not switched for the period of LT1, the mode is set to standby. When turning on power, if PWM signal is low-level voltage for the period of TSLP, the mode is set to standby. *3 During standby mode, FG pin is set to OFF and RD pin is set to low^level voltage. Lock protector Constraint by fan Cancellation of fan constraint IN1 IN2 OUT1 OUT2 FG RD Power ON Power OFF Waiting for FG pulse LT1 Power ON Lock protection FG detection LT2 Restart *1 When lock protector is in operation, OUT1 and OUT2 are both set to low-level voltage. *2 RD is set to off during the period of lock protection. After lock protector is cancelled, RD is set to low-level voltage when FG switches from OFF to L or L OFF. *3 If PWM = low-level voltage is inputted for the period of TSLP during lock protection, the mode is set to standby. *4 The operations start at 100% DUTY when turning on the power, cancelling lock protection, or recovering from standby mode. ( Switch of FG between OFF → L and L → OFF takes place for 5 or 6 times) No.A2065-6/7 LV8163QA ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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