M74LCX16245DTR2G

MC74LCX16245 Low-Voltage CMOS 16-Bit Transceiver With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting) The MC74LCX16245 is a high performance, non−inverting 16−bit transceiver operating from a 2.3 to 3.6 V supply. The device is byte controlled. Each byte has separate Output Enable inputs which can be tied together for full 16−bit operation. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL compatible outputs offer improved switching noise performance. A VI specification of 5.5 V allows MC74LCX16245 inputs to be safely driven from 5.0 V devices. The MC74LCX16245 is suitable for memory address driving and all TTL level bus oriented transceiver applications. The 4.5 ns maximum propagation delays support high performance applications. Current drive capability is 24 mA at both A and B ports. The Transmit/Receive (T/Rn) inputs determine the direction of data flow through the bidirectional transceiver. Transmit (active−HIGH) enables data from A ports to B ports; Receive (active−LOW) enables data from B to A ports. The Output Enable inputs (OEn), when HIGH, disable both A and B ports by placing them in a HIGH Z condition. Features • • • • • • • • • • • • Designed for 2.3 to 3.6 V VCC Operation 4.5 ns Maximum tpd 5.0 V Tolerant − Interface Capability With 5.0 V TTL Logic Supports Live Insertion and Withdrawal IOFF Specification Guarantees High Impedance When VCC = 0 V LVTTL Compatible LVCMOS Compatible 24 mA Balanced Output Sink and Source Capability Near Zero Static Supply Current in All Three Logic States (20 mA) Substantially Reduces System Power Requirements Latchup Performance Exceeds 500 mA ESD Performance: ♦ Human Body Model >2000 V ♦ Machine Model >200 V These Devices are Pb−Free and are RoHS Compliant © Semiconductor Components Industries, LLC, 2012 October, 2012 − Rev. 9 1 http://onsemi.com 48 1 TSSOP−48 DT SUFFIX CASE 1201 MARKING DIAGRAM 48 LCX16245G AWLYYWW 1 A WL YY WW G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet. Publication Order Number: MC74LCX16245/D MC74LCX16245 T/R1 1 B0 2 B1 3 GND 4 Table 1. PIN NAMES 48 OE1 Pins Function 46 A1 OEn Output Enable Inputs 45 GND T/Rn Transmit/Receive Inputs 47 A0 B2 5 44 A2 A0 − A15 Side A Inputs or 3−State Outputs B3 6 43 A3 B0 − B15 Side B Inputs or 3−State Outputs VCC 7 42 VCC B4 8 41 A4 B5 9 40 A5 GND 10 39 GND B6 11 38 A6 B7 12 37 A7 B8 13 36 A8 B9 14 35 A9 GND 15 34 GND B10 16 33 A10 B11 17 32 A11 VCC 18 31 VCC B12 19 30 A12 B13 20 29 A13 GND 21 28 GND B14 22 27 A14 B15 23 26 A15 T/R2 24 25 OE2 T/R1 1 OE1 24 T/R2 48 OE2 B0:7 25 B8:15 A8:15 A0:7 One of Eight Figure 2. Logic Diagram Figure 1. Pinout: 48−Lead (Top View) TRUTH TABLE Inputs OE1 H= L= Z= X= Inputs T/R1 Outputs OE2 T/R2 Outputs L L Bus B0:7 Data to Bus A0:7 L H Bus A0:7 Data to Bus B0:7 L L Bus B8:15 Data to Bus A8:15 L H Bus A8:15 Data to Bus B8:15 H X High Z State on A0:7, B0:7 H X High Z State on A8:15, B8:15 High Voltage Level Low Voltage Level High Impedance State High or Low Voltage Level and Transitions Are Acceptable; for ICC reasons, DO NOT FLOAT Inputs http://onsemi.com 2 MC74LCX16245 ORDERING INFORMATION Package Shipping† MC74LCX16245DTG TSSOP−48* 39 Units / Rail M74LCX16245DTR2G TSSOP−48* 2500 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. MAXIMUM RATINGS Symbol VCC Parameter Condition DC Supply Voltage VI DC Input Voltage VO DC Output Voltage Value Units −0.5 to +7.0 V −0.5 ≤ VI ≤ +7.0 V Output in 3−State −0.5 ≤ VO ≤ +7.0 V Output in HIGH or LOW State. (Note 1) −0.5 ≤ VO ≤ VCC + 0.5 V IIK DC Input Diode Current VI < GND −50 mA IOK DC Output Diode Current VO < GND −50 mA VO > VCC +50 mA IO DC Output Source/Sink Current ±50 mA ICC DC Supply Current Per Supply Pin ±100 mA IGND DC Ground Current Per Ground Pin ±100 mA TSTG Storage Temperature Range −65 to +150 °C Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. IO absolute maximum rating must be observed. RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage Operating Data Retention Only Min Typ Max 2.0 1.5 2.5, 3.3 2.5, 3.3 3.6 3.6 VI Input Voltage 0 5.5 VO Output Voltage (HIGH or LOW State) (3−State) 0 0 VCC 5.5 IOH HIGH Level Output Current VCC = 3.0 V − 3.6 V VCC = 2.7 V − 3.0 V VCC = 2.3 V − 2.7 V −24 −12 −8 IOL LOW Level Output Current VCC = 3.0 V − 3.6 V VCC = 2.7 V − 3.0 V VCC = 2.3 V − 2.7 V +24 +12 +8 TA Operating Free−Air Temperature Dt/DV Input Transition Rise or Fall Rate, VIN from 0.8 V to 2.0 V, VCC = 3.0 V http://onsemi.com 3 Units V V V mA mA −40 +85 °C 0 10 ns/V MC74LCX16245 DC ELECTRICAL CHARACTERISTICS TA = −40°C to +85°C Symbol VIH VIL VOH VOL Condition Min 2.3 V ≤ VCC ≤ 2.7 V 1.7 2.7 V ≤ VCC ≤ 3.6 V 2.0 Characteristic HIGH Level Input Voltage (Note 2) LOW Level Input Voltage (Note 2) HIGH Level Output Voltage LOW Level Output Voltage IOZ 3−State Output Current IOFF Power Off Leakage Current Max V 2.3 V ≤ VCC ≤ 2.7 V 0.7 2.7 V ≤ VCC ≤ 3.6 V 0.8 2.3 V ≤ VCC ≤ 3.6 V; IOL = 100 mA VCC − 0.2 VCC = 2.3 V; IOH = −8 mA 1.8 VCC = 2.7 V; IOH = −12 mA 2.2 VCC = 3.0 V; IOH = −18 mA 2.4 VCC = 3.0 V; IOH = −24 mA 2.2 Units V V 2.3 V ≤ VCC ≤ 3.6 V; IOL = 100 mA 0.2 V VCC = 2.3 V; IOL = 8 mA 0.6 VCC = 2.7 V; IOL = 12 mA 0.4 VCC = 3.0 V; IOL = 16 mA 0.4 VCC = 3.0 V; IOL = 24 mA 0.55 VCC = 3.6 V, VIN = VIH or VIL, VOUT = 0 to 5.5 V ±5 mA VCC = 0, VIN = 5.5 V or VOUT = 5.5 V 10 mA IIN Input Leakage Current VCC = 3.6 V, VIN = 5.5 V or GND ±5 mA ICC Quiescent Supply Current VCC = 3.6 V, VIN = 5.5 V or GND 10 mA 2.3 ≤ VCC ≤ 3.6 V; VIH = VCC − 0.6 V 500 mA DICC Increase in ICC per Input 2. These values of VI are used to test DC electrical characteristics only. AC CHARACTERISTICS (tR = tF = 2.5 ns; RL = 500 W) TA = −40°C to +85°C VCC = 3.3 V ± 0.3 V CL = 50 pF Symbol Parameter VCC = 2.7 V CL = 50 pF VCC = 2.5 V ± 0.2 V CL = 30 pF Waveform Min Max Min Max Min Max Units tPLH tPHL Propagation Delay Input to Output 1 1.5 1.5 4.5 4.5 1.5 1.5 5.2 5.2 1.5 1.5 5.4 5.4 ns tPZH tPZL Output Enable Time to High and Low Level 2 1.5 1.5 6.5 6.5 1.5 1.5 7.2 7.2 1.5 1.5 8.5 8.5 ns tPHZ tPLZ Output Disable Time From High and Low Level 2 1.5 1.5 6.4 6.4 1.5 1.5 6.9 6.9 1.5 1.5 7.7 7.7 ns tOSHL tOSLH Output−to−Output Skew (Note 3) 1.0 1.0 ns 3. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter guaranteed by design. http://onsemi.com 4 MC74LCX16245 DYNAMIC SWITCHING CHARACTERISTICS TA = +25°C Symbol Characteristic Min Condition Typ Max Units VOLP Dynamic LOW Peak Voltage (Note 4) VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V 0.8 0.6 V V VOLV Dynamic LOW Valley Voltage (Note 4) VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V −0.8 −0.6 V V 4. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is measured in the LOW state. CAPACITIVE CHARACTERISTICS Symbol Parameter Condition Typical Units CIN Input Capacitance VCC = 3.3 V, VI = 0 V or VCC 7 pF CI/O Input/Output Capacitance VCC = 3.3 V, VI = 0 V or VCC 8 pF CPD Power Dissipation Capacitance 10 MHz, VCC = 3.3 V, VI = 0 V or VCC 20 pF OEn,T/Rn VCC Vmi VCC Vmi tPZH Vmi An, Bn tPHL Bn, An 0V tPLH Vmo Vmo An, Bn VOH tPHZ tPZL Vmo VOL An, Bn WAVEFORM 1 − PROPAGATION DELAYS tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns 0V VOH VHZ tPLZ Vmo VLZ VOL WAVEFORM 2 − OUTPUT ENABLE AND DISABLE TIMES tR = tF = 2.5 ns, 10% to 90%; f = 1 MHz; tW = 500 ns Figure 3. AC Waveforms Table 2. AC WAVEFORMS VCC Symbol 3.3 V ± 0.3 V 2.7 V 2.5 V ± 0.2 V Vmi 1.5 V 1.5 V VCC / 2 Vmo 1.5 V 1.5 V VCC / 2 VHZ VOL + 0.3 V VOL + 0.3 V VOL + 0.15 V VLZ VOH − 0.3 V VOH − 0.3 V VOH − 0.15 V http://onsemi.com 5 MC74LCX16245 VCC PULSE GENERATOR R1 DUT RT CL RL Figure 4. Test Circuit Table 3. TEST CIRCUIT Test Switch tPLH, tPHL Open tPZL, tPLZ 6 V at VCC = 3.3 ± 0.3 V 6 V at VCC = 2.5 ± 0.2 V Open Collector/Drain tPLH and tPHL 6V tPZH, tPHZ GND CL = CL = RL = RT = 50 pF at VCC = 3.3 ± 0.3 V or equivalent (includes jig and probe capacitance) 30 pF at VCC = 2.5 ± 0.2 V or equivalent (includes jig and probe capacitance) R1 = 500 W or equivalent ZOUT of pulse generator (typically 50 W) http://onsemi.com 6 6 V or VCC x 2 OPEN GND MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TSSOP−48 CASE 1201−01 ISSUE B DATE 06 JUL 2010 1 SCALE 1:1 48X ÇÇÇÇ ÉÉ ÇÇÇÇ ÉÉ ÇÇÇÇ ÉÉ K REF 0.12 (0.005) M T U S V K K1 S T U S J J1 48 25 M 0.254 (0.010) NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSIONS A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. SECTION N−N B −U− L 1 N 24 A −V− PIN 1 IDENT. N F DETAIL E D C M 0.25 (0.010) −W− 0.076 (0.003) −T− SEATING PLANE DETAIL E H G INCHES MIN MAX 0.488 0.496 0.236 0.244 −−− 0.043 0.002 0.006 0.020 0.030 0.0197 BSC 0.015 −−− 0.004 0.008 0.004 0.006 0.007 0.011 0.007 0.009 0.313 0.325 0_ 8_ XXXXXXXXXXXG AWLYYWW 48X 0.32 MILLIMETERS MIN MAX 12.40 12.60 6.00 6.20 −−− 1.10 0.05 0.15 0.50 0.75 0.50 BSC 0.37 −−− 0.09 0.20 0.09 0.16 0.17 0.27 0.17 0.23 7.95 8.25 0_ 8_ GENERIC MARKING DIAGRAM* RECOMMENDED SOLDERING FOOTPRINT 48X DIM A B C D F G H J J1 K K1 L M 1.00 1 8.45 XXXXX A WL YY WW G = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. 1 0.50 PITCH DIMENSIONS: MILLIMETERS DOCUMENT NUMBER: DESCRIPTION: 98ASH70297A TSSOP−48 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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