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MAC15M

MAC15M

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    TO-220-3

  • 描述:

    TRIAC 600V 15A TO220AB

  • 数据手册
  • 价格&库存
MAC15M 数据手册
MAC15M, MAC15N Preferred Device Triacs Silicon Bidirectional Thyristors Designed for high performance full-wave AC control applications where high noise immunity and high commutating di/dt are required. http://onsemi.com Features • • • • • • • • • TRIACS 15 AMPERES RMS 600 thru 800 VOLTS Blocking Voltage to 800 Volts On-State Current Rating of 15 Amperes RMS at 80°C Uniform Gate Trigger Currents in Three Modes High Immunity to dv/dt − 250 V/ms minimum at 125°C Minimizes Snubber Networks for Protection Industry Standard TO-220AB Package High Commutating di/dt − 9.0 A/ms minimum at 125°C Operational in Three Quadrants, Q1, Q2, and Q3 Pb−Free Packages are Available* MT2 MT1 G MARKING DIAGRAM MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Peak Repetitive Off−State Voltage (Note 1) (−40 to 125°C, Sine Wave, 50 to 60 Hz, Gate Open) MAC15M MAC15N VDRM, VRRM On−State RMS Current (Full Cycle Sine Wave, 60 Hz, TC = 80°C) IT(RMS) 15 A ITSM 150 A I2t 93 A2s PGM 20 W PG(AV) 0.5 W TJ −40 to +125 Peak Non-repetitive Surge Current (One Full Cycle Sine Wave, 60 Hz, TJ = 125°C) Circuit Fusing Consideration (t = 8.3 ms) Peak Gate Power (Pulse Width ≤ 1.0 ms, TC = 80°C) Average Gate Power (t = 8.3 ms, TC = 80°C) Operating Junction Temperature Range Storage Temperature Range Value Unit 600 800 Tstg 1 −40 to +150 1 TO−220AB CASE 221A−09 STYLE 4 3 x A Y WW G = M or N = Assembly Location = Year = Work Week = Pb−Free Package PIN ASSIGNMENT Main Terminal 1 °C 2 Main Terminal 2 °C 3 Gate 4 Main Terminal 2 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. December, 2005 − Rev. 2 2 1 Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. VDRM and VRRM for all types can be applied on a continuous basis. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. © Semiconductor Components Industries, LLC, 2005 MAC15xG AYWW V ORDERING INFORMATION Device Package Shipping MAC15M TO−220AB 50 Units / Rail MAC15MG TO−220AB (Pb−Free) 50 Units / Rail MAC15N TO−220AB 50 Units / Rail MAC15NG TO−220AB (Pb−Free) 50 Units / Rail Preferred devices are recommended choices for future use and best overall value. Publication Order Number: MAC15M/D MAC15M, MAC15N THERMAL CHARACTERISTICS Characteristic Thermal Resistance, Junction−to−Case Thermal ResistanceJunction−to−Ambient Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Seconds Symbol Value Unit RqJC RqJA 2.0 62.5 °C/W TL 260 °C ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted; Electricals apply in both directions) Characteristic Symbol Min Typ Max Unit − − − − 0.01 2.0 − 1.2 1.6 5.0 5.0 5.0 13 16 18 35 35 35 − 20 40 − − − 33 36 33 50 80 50 0.5 0.5 0.5 0.75 0.72 0.82 1.5 1.5 1.5 (di/dt)c 9.0 − − A/ms dv/dt 250 − − V/ms OFF CHARACTERISTICS Peak Repetitive Blocking Current (VD = Rated VDRM, VRRM; Gate Open) TJ = 25°C TJ = 125°C IDRM, IRRM mA ON CHARACTERISTICS Peak On-State Voltage (Note 2) (ITM = ± 21 A Peak) VTM Gate Trigger Current (Continuous DC) (VD = 12 V, RL = 100 W) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) IGT Hold Current (VD = 12 Vdc, Gate Open, Initiating Current = ±150 mA) IH Latching Current (VD = 24 V, IG = 35 mA) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) IL Gate Trigger Voltage (VD = 12 V, RL = 100 W) MT2(+), G(+) MT2(+), G(−) MT2(−), G(−) V mA mA mA VGT V DYNAMIC CHARACTERISTICS Rate of Change of Commutating Current; See Figure 10. (VD = 400 V, ITM = 6.0 A, Commutating dv/dt = 24 V/ms, Gate Open, TJ = 125°C, f = 250 Hz, No Snubber) CL = 10 mF LL = 40 mH Critical Rate of Rise of Off-State Voltage (VD = Rated VDRM, Exponential Waveform, Gate Open, TJ = 125°C) 2. Pulse Test: Pulse Width ≤ 2.0 ms, Duty Cycle ≤ 2%. http://onsemi.com 2 MAC15M, MAC15N Voltage Current Characteristic of Triacs (Bidirectional Device) + Current Symbol Parameter VTM VDRM Peak Repetitive Forward Off State Voltage IDRM Peak Forward Blocking Current VRRM Peak Repetitive Reverse Off State Voltage IRRM Peak Reverse Blocking Current VTM Maximum On State Voltage IH Holding Current on state IH IRRM at VRRM off state IH Quadrant 3 MainTerminal 2 − VTM Quadrant Definitions for a Triac MT2 POSITIVE (Positive Half Cycle) + (+) MT2 Quadrant II (+) MT2 (−) IGT GATE Quadrant I (+) IGT GATE MT1 MT1 REF REF IGT − + IGT (−) MT2 Quadrant III Quadrant 1 MainTerminal 2 + (−) MT2 Quadrant IV (+) IGT GATE (−) IGT GATE MT1 MT1 REF REF − MT2 NEGATIVE (Negative Half Cycle) All polarities are referenced to MT1. With in−phase signals (using standard AC lines) quadrants I and III are used. http://onsemi.com 3 + Voltage IDRM at VDRM MAC15M, MAC15N 120 18 PAV, AVERAGE POWER (WATTS) 20 TC, CASE TEMPERATURE (°C) 125 α = 30 and 60° 110 120° α = 180° 100 95 90° 14 α = 90° 105 60° 12 α = 120° 10 DC 90 α = 30° 8 6 4 85 2 0 2 4 6 8 10 12 IT(RMS), RMS ON-STATE CURRENT (AMP) 14 0 16 0 2 100 TYPICAL AT TJ = 25°C 4 6 8 10 12 IT(RMS), ON-STATE CURRENT (AMP) 14 16 Figure 2. On−State Power Dissipation r(t), TRANSIENT THERMAL RESISTANCE(NORMALIZED) Figure 1. RMS Current Derating I T, INSTANTANEOUS ON-STATE CURRENT (AMP) 180° 16 115 80 DC MAXIMUM @ TJ = 125°C 10 1 0.1 0.01 0.1 1 10 100 t, TIME (ms) 1000 1·10 4 Figure 4. Transient Thermal Response MAXIMUM @ TJ = 25°C 40 I H, HOLD CURRENT (mA) 1 0.1 0 0.5 1 1.5 2 2.5 3 3.5 VT, INSTANTANEOUS ON-STATE VOLTAGE (VOLTS) MT2 POSITIVE MT2 NEGATIVE 5 −40 4 Figure 3. On−State Characteristics −10 20 50 80 TJ, JUNCTION TEMPERATURE (°C) Figure 5. Hold Current Variation http://onsemi.com 4 110 125 MAC15M, MAC15N Q2 VGT, GATE TRIGGER VOLTAGE (VOLT) 1 IGT, GATE TRIGGER CURRENT (mA) 100 Q3 Q1 OFF-STATE VOLTAGE = 12 V RL = 140 W 1 −40 −10 20 50 80 TJ, JUNCTION TEMPERATURE (°C) 110 125 OFF-STATE VOLTAGE = 12 V RL = 140 W Q1 Q3 Q2 0.5 −40 (dv/dt) c , CRITICAL RATE OF RISE OF COMMUTATING VOLTAGE(V/μ s) 5000 110 125 100 VD = 800 Vpk TJ = 125°C 4K 3K 2K 1K 0 +20 50 80 TJ, JUNCTION TEMPERATURE (°C) Figure 7. Gate Trigger Voltage versus Junction Temperature 10 100 1000 10000 RG, GATE TO MAIN TERMINAL 1 RESISTANCE (OHMS) Figure 8. Critical Rate of Rise of Off−State Voltage (Exponential) TJ = 125°C 10 CHARGE 100°C 75°C ITM tw VDRM 1 10 f= 1 2 tw (di/dt)c = 6f ITM 1000 20 30 40 50 60 70 80 90 100 (di/dt)c, RATE OF CHANGE OF COMMUTATING CURRENT (A/ms) Figure 9. Critical Rate of Rise of Commutating Voltage LL 200 VRMS ADJUST FOR ITM, 60 Hz VAC 1N4007 MEASURE I TRIGGER CHARGE CONTROL NON-POLAR CL TRIGGER CONTROL dv/dt , CRITICAL RATE OF RISE OF OFF-STATE VOLTAGE(V/μ s) Figure 6. Typical Holding Current versus Junction Temperature −10 − + 200 V MT2 1N914 51 W G MT1 Note: Component values are for verification of rated (di/dt)c. See AN1048 for additional information. Figure 10. Simplified Test Circuit to Measure the Critical Rate of Rise of Commutating Current (di/dt)c http://onsemi.com 5 MAC15M, MAC15N PACKAGE DIMENSIONS TO−220AB CASE 221A−09 ISSUE AA −T− B SEATING PLANE C F T S 4 DIM A B C D F G H J K L N Q R S T U V Z A Q 1 2 3 U H K Z L R V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. J G D N INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.147 0.095 0.105 0.110 0.155 0.018 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 −−− −−− 0.080 STYLE 4: PIN 1. 2. 3. 4. MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 3.73 2.42 2.66 2.80 3.93 0.46 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 −−− −−− 2.04 MAIN TERMINAL 1 MAIN TERMINAL 2 GATE MAIN TERMINAL 2 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Phone: 81−3−5773−3850 Email: orderlit@onsemi.com http://onsemi.com 6 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. MAC15M/D
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