MC10ELT28, MC100ELT28
5 V TTL to Differential
PECL and Differential PECL
to TTL Translator
Description
The MC10ELT/100ELT28 is a differential PECL to TTL translator
and a TTL to differential PECL translator in a single package. Because
PECL (Positive ECL) levels are used, only +5 V and ground are
required. The small outline 8-lead package and the dual translation
design of the ELT28 makes it ideal for applications which are sending
and receiving signals across a backplane.
The 100 Series contains temperature compensation.
Features
•
•
•
•
•
•
•
•
•
•
3.5 ns Typical PECL to TTL Propagation Delay
1.2 ns Typical TTL to PECL Propagation Delay
PNP TTL Inputs for Minimal Loading
24 mA TTL Outputs
Flow Through Pinouts
Operating Range VCC= 4.75 V to 5.25 V with GND= 0 V
QTTL Output Will Default High with Inputs Left Open or < 1.3 V
QECL Output Will Default High with Inputs Left Open
Internal PECL Input Pulldown Resistors
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
www.onsemi.com
MARKING DIAGRAMS*
8
8
1
SOIC−8
D SUFFIX
CASE 751
1
1
TSSOP−8
DT SUFFIX
CASE 948R
= MC10
= MC100
1
KLT28
ALYW
G
1
8
8
H
K
8
HLT28
ALYW
G
8
HT28
ALYWG
G
A
L
Y
W
G
1
KT28
ALYWG
G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
August, 2015 − Rev. 11
1
Publication Order Number:
MC10ELT28/D
MC10ELT28, MC100ELT28
DECL
DECL
1
Table 1. PIN DESCRIPTION
8 VCC
2
7
PECL
Pin
QTTL
TTL
QECL
3
6 DTTL
QECL
4
5 GND
Function
QTTL
TTL Outputs
DTTL
TTL Data Inputs
QECL, QECL
PECL Differential Outputs
DECL, DECL
PECL Differential Inputs
VCC
Positive Supply
GND
Ground
Figure 1. 8−Lead Pinout (Top View) and Logic
Diagram
Table 2. ATTRIBUTES
Characteristics
ESD Protection
Value
Human Body Model
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Pb−Free Pkg
SOIC−8
TSSOP−8
Flammability Rating
Level 1
Level 3
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
Transistor Count
71 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Table 3. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
7
V
0 to 6
V
50
100
mA
mA
VCC
Positive Power Supply
GND = 0 V
VIN
Input Voltage
GND = 0 V
Iout
PECL Output Current
Continuous
Surge
TA
Operating Temperature Range
−40 to +85
°C
Tstg
Storage Temperature Range
−65 to +150
°C
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
SOIC−8
SOIC−8
190
130
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
SOIC−8
41 to 44
°C/W
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
TSSOP−8
TSSOP−8
185
140
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
TSSOP−8
41 to 44 ± 5%
°C/W
Tsol
Wave Solder
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