3.3V/5V ECL 1:2
Differential Fanout Buffer
MC10EP11, MC100EP11
Description
The MC10/100EP11 is a differential 1:2 fanout buffer. The device is
pin and functionally equivalent to the LVEL11 device. With AC
performance much faster than the LVEL11 device, the EP11 is ideal
for applications requiring the fastest AC performance available.
The 100 Series contains temperature compensation.
www.onsemi.com
Features
1
1
• 220 ps Typical Propagation Delay
• Maximum Clock Frequency > 3 GHz Typical
• PECL Mode Operating Range:
♦
8
8
SOIC−8 NB
D SUFFIX
CASE
751−07
VCC = 3.0 V to 5.5 V with VEE = 0 V
TSSOP−8
DT SUFFIX
CASE
948R−02
DFN−8
MN SUFFIX
CASE 506AA
• NECL Mode Operating Range:
♦ VCC = 0 V with VEE = −3.0 V to −5.5 V
Open Input Default State
Safety Clamp on Inputs
Q Outputs Will Default LOW with Inputs Open or at VEE
These Devices are Pb-Free, Halogen Free and are RoHS Compliant
MARKING DIAGRAMS*
8
8
1
HEP11
ALYW
G
1
1
4
8
8
1
HP11
ALYWG
G
2Z MG
G
•
•
•
•
KEP11
ALYW
G
1
H
K
2Z
M
A
L
Y
W
G
KP11
ALYWG
G
= MC10
= MC100
= MC100
= Date Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb-Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information on page 8 of
this data sheet.
© Semiconductor Components Industries, LLC, 2016
May, 2021 − Rev. 12
1
Publication Order Number:
MC10EP11/D
MC10EP11, MC100EP11
Q0
Q0
1
8
2
7
Table 1. PIN DESCRIPTION
VCC
D
R1
Q1
3
R2
6
D
5
VEE
R1
Q1
4
PIN
FUNCTION
D*, D**
ECL Data Inputs
Q0, Q0, Q1, Q1
ECL Data Outputs
VCC
Positive Supply
VEE
Negative Supply
EP
(DFN−8 only) Thermal
exposed pad must be
connected to a sufficient
thermal conduit. Electrically
connect to the most negative
supply (GND) or leave
unconnected, floating open.
* Pins will default LOW when left open.
** Pins will default to high when left open.
Figure 1. 8-Lead Pinout (Top View) and Logic Diagram
Table 2. ATTRIBUTES
Characteristics
Value
Internal Input Pulldown Resistor
75 kW
Internal Input Pullup Resistor
37.5 kW
ESD Protection
Human Body Model
Machine Model
Charged Device Model
> 4 kV
> 200 V
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Pb-Free Pkg
SOIC−8 NB
TSSOP−8
DFN−8
Level 1
Level 3
Level 1
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
Transistor Count
73 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
www.onsemi.com
2
MC10EP11, MC100EP11
Table 3. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
VCC
PECL Mode Power Supply
VEE = 0 V
6
V
VEE
NECL Mode Power Supply
VCC = 0 V
−6
V
VI
PECL Mode Input Voltage
NECL Mode Input Voltage
VEE = 0 V
VCC = 0 V
6
−6
V
Iout
Output Current
Continuous
Surge
50
100
mA
TA
Operating Temperature Range
−40 to +85
°C
Tstg
Storage Temperature Range
−65 to +150
°C
qJA
Thermal Resistance (Junction-to-Ambient)
0 lfpm
500 lfpm
SOIC−8 NB
190
130
°C/W
qJC
Thermal Resistance (Junction-to-Case)
Standard Board
SOIC−8 NB
41 to 44
°C/W
qJA
Thermal Resistance (Junction-to-Ambient)
0 lfpm
500 lfpm
TSSOP−8
185
140
°C/W
qJC
Thermal Resistance (Junction-to-Case)
Standard Board
TSSOP−8
41 to 44
°C/W
qJA
Thermal Resistance (Junction-to-Ambient)
0 lfpm
500 lfpm
DFN−8
129
84
°C/W
qJC
Thermal Resistance (Junction-to-Case)
(Note 1)
DFN−8
35 to 40
°C/W
Tsol
Wave Solder (Pb-Free)
3
250
Within Device Skew
Q0, Q1 (Note 2)
Device-to-Device Skew
10
tJITTER
Random Clock Jitter (RMS) (Figure 2)
VINPP
Input Voltage Swing Sensitivity
(Differential Configuration)
Output Rise/Fall Times
(20% − 80%) @ 1.0 GHz
Q, Q
140
Typ
Max
Min
>3
200
tr
tf
Min
85°C
160
Typ
Max
>3
220
270
15
110
15
0.2
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