MC100EP17DTR2

3.3V/5V ECL Quad Differential Driver/Receiver MC10EP17, MC100EP17 Description The MC10/100EP17 is a 4-bit differential line receiver based on the EP17 device. The > 3.0 GHz maximum frequency provided by the high frequency outputs makes the device ideal for buffering of very high speed oscillators. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01ĂmF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. The design incorporates two stages of gain, internal to the device, making it an excellent choice for use in high bandwidth amplifier applications. Inputs of unused gates can be left open and will not affect the operation of the rest of the device. All VCC and VEE pins must be externally connected to power supply to guarantee proper operation. The 100 Series contains temperature compensation. Features VCC = 3.0 V to 5.5 V with VEE = 0 V • NECL Mode Operating Range: • • • • • TSSOP−20 DT SUFFIX CASE 948E MARKING DIAGRAM* 20 MCyyyEP17 AWLYYWWG 1 yyy A WL YY WW G • 220 ps Typical Propagation Delay • Maximum Frequency > 3.0 GHz Typical • PECL Mode Operating Range: ♦ www.onsemi.com (Note: Microdot may be in either location) VCC = 0 V with VEE = −3.0 V to −5.5 V Open Input Default State Safety Clamp on Inputs Q Output Will Default LOW with Inputs Open or at VEE VBB Output These Devices are Pb-Free, Halogen Free and are RoHS Compliant ♦ *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION Package Shipping TSSOP−20 WB (Pb-Free) 75 Units / Tube MC100EP17DTG TSSOP−20 WB (Pb-Free) 75 Units / Tube Device MC10EP17DTG © Semiconductor Components Industries, LLC, 2016 April, 2021 − Rev. 11 = 10 or 100 = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package 1 Publication Order Number: MC10EP17/D MC10EP17, MC100EP17 VCC Q0 Q0 Q1 Q1 Q2 Q2 Q3 Q3 VEE 20 19 18 17 16 15 14 13 12 11 Table 1. PIN DESCRIPTION PIN FUNCTION D[0:3]*, D[0:3]* ECL Differential Data Inputs Q[0:3], Q[0:3] ECL Differential Data Outputs VBB Reference Voltage Output VCC Positive Supply VEE Negative Supply * Pins will default LOW when left open. 1 2 3 4 5 6 7 8 9 10 VCC D0 D0 D1 D1 D2 D2 D3 D3 VBB Figure 1. 20-Lead Pinout (Top View) and Logic Diagram Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor 75 kW Internal Input Pullup Resistor N/A ESD Protection Human Body Model Machine Model Charged Device Model > 2 kV > 100 V > 2 kV Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb-Free Pkg TSSOP−20 WB Level 3 Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in Transistor Count 259 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. www.onsemi.com 2 MC10EP17, MC100EP17 Table 3. MAXIMUM RATINGS Symbol Rating Unit VCC PECL Mode Power Supply Parameter VEE = 0 V Condition 1 Condition 2 6 V VEE NECL Mode Power Supply VCC = 0 V −6 V VI PECL Mode Input Voltage NECL Mode Input Voltage VEE = 0 V VCC = 0 V 6 −6 V Iout Output Current Continuous Surge 50 100 mA IBB VBB Sink/Source ± 0.5 mA TA Operating Temperature Range −40 to +85 °C Tstg Storage Temperature Range −65 to +150 °C qJA Thermal Resistance (Junction-to-Ambient) 0 lfpm 500 lfpm TSSOP−20 WB 140 100 °C/W qJC Thermal Resistance (Junction-to-Case) Standard Board TSSOP−20 WB 23 to 41 °C/W Tsol Wave Solder (Pb-Free) 265 °C VI v VCC VI w VEE Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Table 4. 10EP DC CHARACTERISTICS, PECL (VCC = 3.3 V, VEE = 0 V (Note 1)) −40°C Symbol Characteristic Min Typ 25°C Max Min Typ 85°C Max Min Typ Max Unit IEE Power Supply Current 42 50 65 44 52 66 46 54 68 mA VOH Output HIGH Voltage (Note 2) 2165 2290 2415 2230 2355 2480 2290 2415 2540 mV VOL Output LOW Voltage (Note 2) 1365 1490 1615 1430 1555 1680 1490 1615 1740 mV VIH Input HIGH Voltage (Single-Ended) 2090 2415 2155 2480 2215 2540 mV VIL Input LOW Voltage (Single-Ended) 365 1690 1430 1755 1490 1815 mV VBB Output Voltage Reference 1790 1990 1855 2055 1915 2115 mV 3.3 2.0 3.3 2.0 3.3 V 150 mA VIHCMR Input HIGH Voltage Common Mode Range (Differential) (Note 3) IIH Input HIGH Current IIL Input LOW Current 1890 2.0 150 0.5 1955 150 0.5 0.5 2015 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. 1. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V. 2. All loading with 50 W to VCC − 2.0 V. 3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. www.onsemi.com 3 MC10EP17, MC100EP17 Table 5. 10EP DC CHARACTERISTICS, PECL (VCC = 5.0 V, VEE = 0 V (Note 1)) Characteristic Power Supply Current Min −40°C Typ Max Min 25°C Typ Max Min 85°C Typ Max 42 50 65 44 52 66 46 54 68 Unit mA VOH Output HIGH Voltage (Note 2) 3865 3990 4115 3930 4055 4180 3990 4115 4240 mV VOL Output LOW Voltage (Note 2) 3065 3190 3315 3130 3255 3380 3190 3315 3440 mV VIH Input HIGH Voltage (Single-Ended) 3790 4115 3855 4180 3915 4240 mV VIL Input LOW Voltage (Single-Ended) 3065 3390 3130 3455 3190 3515 mV VBB Output Voltage Reference 3490 3690 3555 3755 3615 3815 mV 5.0 2.0 5.0 2.0 5.0 V 150 mA Symbol IEE VIHCMR Input HIGH Voltage Common Mode Range (Differential) (Note 3) IIH Input HIGH Current IIL Input LOW Current 3590 2.0 3655 150 3715 150 0.5 0.5 0.5 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. 1. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V. 2. All loading with 50ĂW to VCC − 2.0 V. 3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Table 6. 10EP DC CHARACTERISTICS, NECL (VCC = 0 V; VEE = −5.5 V to −3.0 V (Note 1)) Symbol IEE Characteristic Power Supply Current Min −40°C Typ Max Min 25°C Typ Max Min 85°C Typ Max 42 50 65 44 52 66 46 54 68 Unit mA VOH Output HIGH Voltage (Note 2) −1135 −1010 −885 −1070 −945 −820 −1010 −885 −760 mV VOL Output LOW Voltage (Note 2) −1935 −1810 −1685 −1870 −1745 −1620 −1810 −1685 −1560 mV VIH Input HIGH Voltage (Single-Ended) −1210 −885 −1145 −820 −1085 −760 mV VIL Input LOW Voltage (Single-Ended) −1935 −1610 −1870 −1545 −1810 −1485 mV VBB Output Voltage Reference −1510 −1310 −1445 −1245 −1385 −1185 mV 0.0 V 150 mA VIHCMR Input HIGH Voltage Common Mode Range (Differential) (Note 3) IIH Input HIGH Current IIL Input LOW Current −1410 VEE + 2.0 0.0 VEE + 2.0 150 0.5 −1345 0.0 VEE + 2.0 150 0.5 −1285 0.5 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. 1. Input and output parameters vary 1:1 with VCC. 2. All loading with 50ĂW to VCC − 2.0 V. 3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. www.onsemi.com 4 MC10EP17, MC100EP17 Table 7. 100EP DC CHARACTERISTICS, PECL (VCC = 3.3 V, VEE = 0 V (Note 1)) −40°C 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 47 55 63 50 58 66 54 62 70 mA Output HIGH Voltage (Note 2) 2155 2280 2405 2155 2280 2405 2155 2280 2405 mV VOL Output LOW Voltage (Note 2) 1355 1480 1605 1355 1480 1605 1355 1480 1605 mV VIH Input HIGH Voltage (Single-Ended) 2075 2420 2075 2420 2075 2420 mV VIL Input LOW Voltage (Single-Ended) 1355 1675 1355 1675 1355 1675 mV VBB Output Voltage Reference 1775 1975 1775 1975 1775 1975 mV 3.3 2.0 3.3 2.0 3.3 V 150 mA Symbol Characteristic IEE Power Supply Current VOH VIHCMR Input HIGH Voltage Common Mode Range (Differential) (Note 3) IIH Input HIGH Current IIL Input LOW Current 1875 2.0 1875 150 0.5 1875 150 0.5 0.5 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. 1. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V. 2. All loading with 50 W to VCC − 2.0 V. 3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Table 8. 100EP DC CHARACTERISTICS, PECL (VCC = 5.0 V, VEE = 0 V (Note 1)) −40°C 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 47 55 63 50 58 66 54 62 70 mA Output HIGH Voltage (Note 2) 3855 3980 4105 3855 3980 4105 3855 3980 4105 mV VOL Output LOW Voltage (Note 2) 3055 3180 3305 3055 3180 3305 3055 3180 3305 mV VIH Input HIGH Voltage (Single-Ended) 3775 4120 3775 4120 3775 4120 mV VIL Input LOW Voltage (Single-Ended) 3055 3375 3055 3375 3055 3375 mV VBB Output Voltage Reference 3475 3675 3475 3675 3475 3675 mV 5.0 2.0 5.0 2.0 5.0 V 150 mA Symbol Characteristic IEE Power Supply Current VOH VIHCMR Input HIGH Voltage Common Mode Range (Differential) (Note 3) IIH Input HIGH Current IIL Input LOW Current 3575 2.0 150 0.5 3575 150 0.5 0.5 3575 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. 1. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V. 2. All loading with 50 W to VCC − 2.0 V. 3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. www.onsemi.com 5 MC10EP17, MC100EP17 Table 9. 100EP DC CHARACTERISTICS, NECL (VCC = 0 V; VEE = −5.5 V to −3.0 V (Note 1)) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 47 55 63 50 58 66 54 62 70 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 2) −1145 −1020 −895 −1145 −1020 −895 −1145 −1020 −895 mV VOL Output LOW Voltage (Note 2) −1945 −1820 −1695 −1945 −1820 −1695 −1945 −1820 −1695 mV VIH Input HIGH Voltage (Single-Ended) −1225 −880 −1225 −880 −1225 −880 mV VIL Input LOW Voltage (Single-Ended) −1945 −1625 −1945 −1625 −1945 −1625 mV VBB Output Voltage Reference −1525 −1325 −1525 −1325 −1525 −1325 mV 0.0 V 150 mA VIHCMR Input HIGH Voltage Common Mode Range (Differential) (Note 3) IIH Input HIGH Current IIL Input LOW Current −1425 VEE + 2.0 0.0 −1425 VEE + 2.0 150 0.5 0.0 −1425 VEE + 2.0 150 0.5 0.5 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. 1. Input and output parameters vary 1:1 with VCC. 2. All loading with 50 W to VCC − 2.0 V. 3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Table 10. AC CHARACTERISTICS (VCC = 0 V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 1)) −40°C Symbol Characteristic fmax Maximum Frequency (Figure 2) tPLH, tPHL Propagation Delay to Output Differential 10 Series 100 Series tJITTER VPP tr tf Min Typ 25°C Max Min >3 125 150 CLOCK Random Jitter (RMS) @ v 1.0 GHz @ v 1.5 GHz @ v 2.0 GHz @ v 2.5 GHz @ v 3.0 GHz Typ 85°C Max Min >3 200 220 275 300 0.132 0.143 0.148 0.129 0.129 0.2 0.3 0.3 0.3 0.3 150 180 Typ Max >3 220 250 300 320 0.147 0.159 0.146 0.131 0.142 0.2 0.3 0.3 0.3 0.3 200 200 Unit GHz 260 290 350 360 0.154 0.156 0.169 0.147 0.168 0.3 0.3 0.3 0.3 0.3 ps ps Input Voltage Swing (Differential Configuration) 150 800 1200 150 800 1200 150 800 1200 mV Output Rise/Fall Times Q, (20% − 80%) 100 160 220 100 170 230 120 190 250 ps NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. 1. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V. www.onsemi.com 6 800 8 700 7 600 6 500 5 400 4 300 3 200 2 ÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉ ÉÉ ÉÉ 100 0 0 1000 2000 JITTEROUT ps (RMS) VOUTpp (mV) MC10EP17, MC100EP17 1 (JITTER) 3000 4000 5000 6000 FREQUENCY (MHz) Figure 2. Fmax/Jitter Q Zo = 50 W D Receiver Device Driver Device Q D Zo = 50 W 50 W 50 W VTT VTT = VCC − 2.0 V Figure 3. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1672/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 7 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TSSOP−20 WB CASE 948E ISSUE D DATE 17 FEB 2016 SCALE 2:1 20X 0.15 (0.006) T U 2X L K REF 0.10 (0.004) S L/2 20 M T U S V ÍÍÍÍ ÍÍÍÍ ÍÍÍÍ K K1 S J J1 11 B SECTION N−N −U− PIN 1 IDENT 0.25 (0.010) N 1 10 M 0.15 (0.006) T U S A −V− NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. N F DETAIL E −W− C G D H DETAIL E 0.100 (0.004) −T− SEATING PLANE DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 6.40 6.60 4.30 4.50 --1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.252 0.260 0.169 0.177 --0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ GENERIC MARKING DIAGRAM* SOLDERING FOOTPRINT 7.06 XXXX XXXX ALYWG G 1 0.65 PITCH 16X 0.36 16X 1.26 DOCUMENT NUMBER: 98ASH70169A DESCRIPTION: TSSOP−20 WB A L Y W G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. DIMENSIONS: MILLIMETERS Electronic versions are uncontrolled except when accessed directly from the Document Repository. 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