MC100EPT22MNR4G

MC100EPT22 3.3V Dual LVTTL/LVCMOS to Differential LVPECL Translator Description www.onsemi.com The MC100EPT22 is a dual LVTTL/LVCMOS to differential LVPECL translator. Because LVPECL (Positive ECL) levels are used only +3.3 V and ground are required. The small outline 8−lead package and the single gate of the EPT22 makes it ideal for those applications where space, performance, and low power are at a premium. Because the mature MOSAIC 5 process is used, low cost and high speed can be added to the list of features. 8 8 1 1 SOIC−8 NB TSSOP−8 DFN8 D SUFFIX DT SUFFIX MN SUFFIX CASE 751−07 CASE 948R−02 CASE 506AA Features 420 ps Typical Propagation Delay Maximum Frequency = > 1.1 GHz Typical Operating Range: VCC = 3.0 V to 3.6 V with GND = 0 V PNP LVTTL Inputs for Minimal Loading Q Output Will Default HIGH with Inputs Open The 100 Series Contains Temperature Compensation. These Devices are Pb-Free, Halogen Free and are RoHS Compliant MARKING DIAGRAMS* 8 8 KPT22 ALYW G 1 1 SOIC−8 NB A L Y W M G 3S MG G • • • • • • • KA22 ALYWG G 1 TSSOP−8 4 DFN8 = Assembly Location = Wafer Lot = Year = Work Week = Date Code = Pb-Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION Package Shipping† MC100EPT22DG Device SOIC−8 NB (Pb-Free) 98 Units/Tube MC100EPT22DR2G SOIC−8 NB (Pb-Free) 2500 Tape & Reel MC100EPT22DTG TSSOP−8 (Pb-Free) 100 Tape & Reel MC100EPT22DTR2G TSSOP−8 (Pb-Free) 2500 Tape & Reel MC100EPT22MNR4G DFN8 (Pb-Free) 1000 Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2016 August, 2016 − Rev. 14 1 Publication Order Number: MC100EPT22/D MC100EPT22 Table 1. PIN DESCRIPTION Q0 1 8 VCC Q0 2 7 D0 LVPECL Q1 Q1 LVTTL 3 6 4 5 D1 PIN FUNCTION Q0, Q1, Q0, Q1 LVPECL Differential Outputs D0, D1 LVTTL Inputs VCC Positive Supply GND Ground EP (DFN8 only) Thermal exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply (GND) or leave unconnected, floating open. GND Figure 1. 8−Lead Pinout (Top View) and Logic Diagram Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor N/A Internal Input Pullup Resistor N/A ESD Protection Human Body Model Machine Model Charged Device Model > 4 kV > 200 V > 2 kV Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) SOIC−8 NB TSSOP−8 DFN8 Flammability Rating Pb-Free Pkg Level 1 Level 3 Level 1 Oxygen Index: 28 to 34 Transistor Count UL 94 V−0 @ 0.125 in 164 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. www.onsemi.com 2 MC100EPT22 Table 3. MAXIMUM RATINGS Symbol Parameter Condition 1 Rating Unit 6 V 6 to 0 V 50 100 mA Operating Temperature Range −40 to +85 °C Tstg Storage Temperature Range −65 to +150 °C qJA Thermal Resistance (Junction-to-Ambient) 0 lfpm 500 lfpm SOIC−8 NB SOIC−8 NB 190 130 °C/W qJC Thermal Resistance (Junction-to-Case) Standard Board SOIC−8 NB 41 to 44 °C/W qJA Thermal Resistance (Junction-to-Ambient) 0 lfpm 500 lfpm TSSOP−8 TSSOP−8 185 140 °C/W qJC Thermal Resistance (Junction-to-Case) Standard Board TSSOP−8 41 to 44 °C/W qJA Thermal Resistance (Junction-to-Ambient) 0 lfpm 500 lfpm DFN8 DFN8 129 84 °C/W Tsol Wave Solder (Pb-Free) 265 °C qJC Thermal Resistance (Junction-to-Case) 35 to 40 °C/W VCC Power Supply GND = 0 V VI Input Voltage GND = 0 V Iout Output Current Continuous Surge TA Condition 2 VI ≤ VCC (Note 1) DFN8 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. JEDEC standard multilayer board − 2S2P (2 signal, 2 power) Table 4. TTL INPUT DC CHARACTERISTICS (VCC = 3.3 V, GND = 0 V, TA= −40°C to 85°C) Symbol Characteristic Condition Min Typ Max Unit mA IIH Input HIGH Current VIN = 2.7 V 20 IIHH Input HIGH Current MAX VIN = VCC 100 mA IIL Input LOW Current VIN = 0.5 V −0.6 mA IIN = −18 mA −1.0 V VIK Input Clamp Voltage VIH Input HIGH Voltage VIL Input LOW Voltage 2.0 V 0.8 V NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. Table 5. PECL OUTPUT DC CHARACTERISTICS (VCC = 3.3 V, GND = 0.0 V (Note 1)) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 32 43 55 35 45 60 37 46 62 mA ICC Power Supply Current VOH Output HIGH Voltage (Note 2) 2155 2280 2405 2155 2280 2405 2155 2280 2405 mV VOL Output LOW Voltage (Note 2) 1355 1480 1605 1355 1480 1605 1355 1480 1605 mV NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Output parameters vary 1:1 with VCC. 2. All loading with 50 W to VCC − 2.0 V. www.onsemi.com 3 MC100EPT22 Table 6. AC CHARACTERISTICS (VCC = 3.0 V to 3.6 V, GND = 0.0 V (Note 1)) −40°C Characteristic Symbol Min Typ 25°C Max 85°C Min Typ Max 0.8 1.1 250 420 675 Min Typ Max 0.8 1.1 300 500 700 ps Unit fmax Maximum Frequency (Figure 2) 0.8 1.1 tPLH, tPHL Propagation Delay to Output Differential 250 400 650 tskew Within−Device Skew (Note 2) Device-to-Device Skew (Note 3) 50 200 100 400 50 200 100 425 50 200 100 400 ps tJITTER Random Clock Jitter (Figure 2) 0.2