MC100LVELT20DR2G

MC100LVELT20DR2G

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    SOIC8_150MIL

  • 描述:

    MC100LVELT20DR2G

  • 详情介绍
  • 数据手册
  • 价格&库存
MC100LVELT20DR2G 数据手册
MC100LVELT20 3.3V LVTTL/LVCMOS to Differential LVPECL Translator Description www.onsemi.com The MC100LVELT20 is a 3.3 V TTL/CMOS to differential PECL translator. Because PECL (Positive ECL) levels are used, only + 3.3 V and ground are required. The small outline SOIC−8 package and the single gate of the MC100LVELT20 makes it ideal for those applications where space, performance, and low power are at a premium. The 100 Series contains temperature compensation. 8 1 SOIC−8 NB D SUFFIX CASE 751−07 Features • • • • • • 390 ps Typical Propagation Delay Maximum Input Clock Frequency > 0.8 GHz Typical Operating Range VCC = 3.0 V to 3.6 V with GND = 0 V PNP TTL Input for Minimal Loading Q Output will Default HIGH with Input Open These Devices are Pb-Free, Halogen Free and are RoHS Compliant MARKING DIAGRAM 8 KVT20 ALYW G 1 A L Y W G = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION Device Package Shipping† MC100LVELT20DG SOIC−8 NB (Pb-Free) 98 Units/Tube MC100LVELT20DR2G SOIC-8 NB (Pb-Free) 2500/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2016 July, 2016 − Rev. 1 1 Publication Order Number: MC100LVELT20/D MC100LVELT20 Table 1. PIN DESCRIPTION NC Q Q 1 8 LVTTL 2 3 7 VCC Pin D 6 NC 5 GND Function Q, Q Differential PECL Outputs D LVTTL Input VCC Positive Supply GND Ground NC No Connect LVPECL NC 4 (Top View) Figure 1. 8-Lead Pinout and Logic Diagram Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor N/A Internal Input Pullup Resistor N/A ESD Protection Human Body Model Machine Model Charged Device Model > 1.5 kV > 200 V > 2 kV Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb-Free Pkg SOIC−8 NB Level 1 Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in Transistor Count 150 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Table 3. MAXIMUM RATINGS Symbol Parameter Condition 1 VCC Power Supply GND = 0 V VI Input Voltage GND = 0 V Iout Output Current Continuous Surge Condition 2 VI ≤ VCC Rating Unit 6 V 6 V 50 100 mA TA Operating Temperature Range −40 to +85 °C Tstg Storage Temperature Range −65 to +150 °C qJA Thermal Resistance (Junction-to-Ambient) 0 lfpm 500 lfpm SOIC−8 NB 190 130 °C/W qJC Thermal Resistance (Junction-to-Case) Standard Board SOIC−8 NB 41 to 44 °C/W Tsol Wave Solder (Pb-Free) 265 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. www.onsemi.com 2 MC100LVELT20 Table 4. LVTTL INPUT DC CHARACTERISTICS (VCC = 3.3 V, GND = 0 V, TA = −40°C to +85°C) Symbol Characteristic Min Typ Max Unit IIH Input HIGH Current (Vin = 2.7 V) 20 mA IIHH Input HIGH Current MAX (Vin = 6.0 V) 100 mA IIL Input LOW Current (Vin = 0.5 V) −0.6 mA VIK Input Clamp Voltage (Iin = −18 mA) −1.2 V VIH Input HIGH Voltage VIL Input LOW Voltage 2.0 V 0.8 V NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. Table 5. 100LVELT PECL OUTPUT DC CHARACTERISTICS (VCC = 3.3 V, GND = 0 V (Note 1)) −40°C Symbol Characteristic 25°C 85°C Min Typ Max Min Typ Max Min Typ Max Unit 20 25 30 22 27 32 23 28 33 mA ICC Negative Power Supply Current VOH Output HIGH Voltage (Note 2) 2155 2280 2405 2155 2280 2405 2155 2280 2405 mV VOL Output LOW Voltage (Note 2) 1355 1480 1605 1355 1480 1605 1355 1480 1605 mV NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Output parameters vary 1:1 with VCC. 2. All loading with 50ĂW to VCC − 2.0 V. Table 6. AC CHARACTERISTICS (VCC = 3.0 V to 3.6 V, GND = 0 V (Note 1)) −40°C Symbol Characteristic Min Typ fmax Maximum Input Clock Frequency (Figure 2) 600 800 tPLH, tPHL Propagation Delay to Output Differential 280 350 tSKEW Device-to-Device Skew (Note 2) tJITTER Random Clock Jitter (RMS) (Figure 2) tr tf Output Rise/Fall Times Q, Q (20% − 80%) 25°C Max 430 Min Typ 600 800 300 370 250 70
MC100LVELT20DR2G
物料型号:MC100LVELT20 器件简介:MC100LVELT20是一款3.3V的TTL/CMOS至差分PECL转换器,适用于空间、性能和低功耗要求高的应用场合。

引脚分配:共8个引脚,包括VCC(正电源)、GND(地)、LVTTL输入(D)、差分PECL输出(Q.Q)、NC(无连接)。

参数特性:典型传播延迟为390ps,最大输入时钟频率大于0.8GHz,工作电压范围为3.0至3.6V,具有PNP TTL输入以最小化负载,Q输出在输入开路时默认为高电平。

功能详解:该器件包含温度补偿功能,提供低功耗和高性能的信号转换,适用于高速数字电路。

应用信息:适合高速数据通信和精密测量设备中信号完整性要求高的应用。

封装信息:采用SOIC-8 NB封装,符合RoHS标准,无铅和无卤素。


以上信息均摘自PDF文档,包含完整的产品规格和应用指南。
MC100LVELT20DR2G 价格&库存

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MC100LVELT20DR2G
  •  国内价格 香港价格
  • 106+44.61700106+5.77770
  • 500+42.26050500+5.47250
  • 1000+39.904001000+5.16740
  • 10000+37.5475010000+4.86220

库存:15507

MC100LVELT20DR2G
  •  国内价格 香港价格
  • 1+49.370871+6.38744
  • 10+37.7263010+4.88091
  • 25+34.8210325+4.50503
  • 100+31.62411100+4.09143
  • 250+31.24332250+4.04216

库存:1619

MC100LVELT20DR2G
  •  国内价格 香港价格
  • 2500+27.627952500+3.57442

库存:1619