3.3V/5V ECL 2‐Input
Differential AND/NAND
MC10EP05, MC100EP05
Description
The MC10/100EP05 is a 2-input differential AND/NAND gate. The
device is functionally equivalent to the EL05 and LVEL05 devices.
With AC performance much faster than the LVEL05 device, the EP05
is ideal for applications requiring the fastest AC performance
available.
The 100 Series contains temperature compensation.
Features
• 220 ps Typical Propagation Delay
• Maximum Frequency > 3 GHz Typical
• PECL Mode Operating Range:
♦
8
8
1
1
SOIC−8 NB
D SUFFIX
CASE
751−07
TSSOP−8
DT SUFFIX
CASE
948R−02
MARKING DIAGRAMS*
VCC = 3.0 V to 5.5 V with VEE = 0 V
8
• NECL Mode Operating Range:
•
•
•
•
www.onsemi.com
VCC = 0 V with VEE = −3.0 V to −5.5 V
Open Input Default State
Safety Clamp on Inputs
Q Output Will Default LOW with Inputs Open or at VEE
These Devices are Pb-Free, Halogen Free and are RoHS Compliant
♦
1
HEP05
ALYWG
G
8
8
1
KEP05
ALYWG
G
H
K
A
L
Y
W
G
1
KP05
ALYWG
G
= MC10
= MC100
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb-Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
Package
Shipping†
MC10EP05DG
SOIC−8 NB
(Pb-Free)
98 Units /
Tube
MC10EP05DR2G
SOIC−8 NB
(Pb-Free)
2500 /
Tape & Reel
MC100EP05DG
SOIC−8 NB
(Pb-Free)
98 Units /
Tube
MC100EP05DTG
TSSOP−8
(Pb-Free)
MC100EP05DTR2G TSSOP−8
(Pb-Free)
100 Units /
Tube
2500 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2016
April, 2021 − Rev. 11
1
Publication Order Number:
MC10EP05/D
MC10EP05, MC100EP05
Table 1. PIN DESCRIPTION
D0
D0
1
2
8
7
Pin
VCC
Q
Function
D0*, D1*, D0**, D1**
ECL Data Inputs
Q, Q
ECL Data Outputs
VCC
Positive Supply
VEE
Negative Supply
* Pins will default LOW when left open.
** Pins will default to VCC/2when left open.
D1
3
6
Q
Table 2. TRUTH TABLE
D1
4
5
VEE
D0
D1
D0
D1
Q
Q
L
L
H
H
L
H
L
H
H
H
L
L
H
L
H
L
L
L
L
H
H
H
H
L
Figure 1. 8-Lead Pinout (Top View) and Logic
Diagram
Table 3. ATTRIBUTES
Characteristics
Value
Internal Input Pulldown Resistor
75 kW
Internal Input Pullup Resistor
37.5 kW
ESD Protection
Human Body Model
Machine Model
Charged Device Model
> 4 kV
> 200 V
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Pb-Free Pkg
SOIC−8 NB
TSSOP−8
Level 1
Level 3
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
Transistor Count
137 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
www.onsemi.com
2
MC10EP05, MC100EP05
Table 4. MAXIMUM RATINGS
Symbol
Rating
Unit
VCC
PECL Mode Power Supply
Parameter
VEE = 0 V
Condition 1
Condition 2
6
V
VEE
NECL Mode Power Supply
VCC = 0 V
−6
V
VI
PECL Mode Input Voltage
NECL Mode Input Voltage
VEE = 0 V
VCC = 0 V
6
−6
V
Iout
Output Current
Continuous
Surge
50
100
mA
TA
Operating Temperature Range
−40 to +85
°C
Tstg
Storage Temperature Range
−65 to +150
°C
qJA
Thermal Resistance (Junction-to-Ambient)
0 lfpm
500 lfpm
SOIC−8 NB
190
130
°C/W
qJC
Thermal Resistance (Junction-to-Case)
Standard Board
SOIC−8 NB
41 to 44
°C/W
qJA
Thermal Resistance (Junction-to-Ambient)
0 lfpm
500 lfpm
TSSOP−8
185
140
°C/W
qJC
Thermal Resistance (Junction-to-Case)
Standard Board
TSSOP−8
41 to 44
°C/W
Tsol
Wave Solder (Pb-Free)
3
160
Typ
85°C
Max
Min
>3
210
260
0.2
3
220
270
0.2
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