3.3 V/5 V ECL Quad D
Flip-Flop with Set, Reset,
and Differential Clock
MC10EP131, MC100EP131
Description
The MC10/100EP131 is a Quad Master−slaved D flip−flop with
common set and separate resets. The device is an expansion of the
E131 with differential common clock and individual clock enables.
With AC performance faster than the E131 device, the EP131 is ideal
for applications requiring the fastest AC performance available.
Each flip−flop may be clocked separately by holding Common
Clock (CC) LOW and CC HIGH, then using the differential Clock
Enable inputs for clocking (C0−3, C0−3).
Common clocking is achieved by holding the differential inputs
C0−3 LOW and C0−3 HIGH while using the differential Common
Clock (CC) to clock all four flip−flops. When left floating open, any
differential input will disable operation due to input pulldown resistors
forcing an output default state.
Individual asynchronous resets (R0−3) and an asynchronous set
(SET) are provided.
Data enters the master when both CC and C0−3 are LOW, and
transfers to the slave when either CC or C0−3 (or both) go HIGH.
The 100 Series contains temperature compensation.
Features
•
•
•
•
•
•
•
•
•
•
•
460 ps Typical Propagation Delay
Maximum Frequency > 3 GHz Typical
Differential Individual and Common Clocks
Individual Asynchronous Resets
Asynchronous Set
PECL Mode Operating Range: VCC = 3.0 V to 5.5 V
with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
with VEE = −3.0 V to −5.5 V
Open Input Default State
Safety Clamp on Inputs
Q Output Will Default LOW with Inputs Open or at VEE
Pb−Free Packages are Available
© Semiconductor Components Industries, LLC, 2006
April, 2021 − Rev. 11
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LQFP−32
FA SUFFIX
CASE 561AB
MARKING DIAGRAM*
MCxxx
EP131
AWLYYWWG
xxx
A
WL
YY
WW
G
= 10 or 100
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
Package
Shipping†
MC10EP131FAG
LQFP−32 250 Units / Tray
(Pb−Free)
MC100EP131FAG
LQFP−32 250 Units / Tray
(Pb−Free)
MC100EP131FAR2G LQFP−32
(Pb−Free)
2000 / Tape &
Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
1
Publication Order Number:
MC10EP131/D
MC10EP131, MC100EP131
Q3 Q3 Q2
Q2 Q1 Q1 Q0 Q0
24
21
23
22
20
19
18
17
VCC
25
VCC
C3
26
15
R0
C3
27
14
D0
C3
VEE
28
13
VCC
R3
D3
29
12
C0
R3
30
11
C0
SET
31
10
R1
D2
32
9
VEE
16
32−Lead LQFP Pinout
(Top View)
1
2
3
4
5
6
7
D3
D
S
Q
Q3
Q
Q3
Q
Q2
Q
Q2
Q
Q1
Q
Q1
Q
Q0
Q
Q0
C3
D2
R
D
S
C2
C2
R
R2
8
SET
R2
C2 C2 CC CC C1 C1 D1
Warning: All VCC and VEE pins must be externally connected
to Power Supply to guarantee proper operation.
CC
CC
Figure 1. 32−Lead LQFP Pinout (Top View)
R1
C1
PIN
FUNCTION
D0−3*
ECL Data Inputs
C0−3*, C0−3*
ECL Separate Clock Inputs
CC*, CC*
ECL Common Clock Inputs
R0−3*
ECL Asynchronous Reset
SET*
R
C1
Table 1. PIN DESCRIPTION
D1
Q0−3, Q0−3
ECL Asynchronous Set
ECL Data Outputs
VCC
Positive Supply
VEE
Negative Supply
D
S
R0
R
C0
C0
D0
D
S
VEE
* Pins will default LOW when left open.
Figure 2. Logic Diagram
Table 2. TRUTH TABLE
D
S*
R*
CLK
Q
L
H
X
X
X
L
L
H
L
H
L
L
L
H
H
Z
Z
X
X
X
L
H
H
L
Undef
Z = LOW to HIGH Transition
* Pins will default low when left open.
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2
MC10EP131, MC100EP131
Table 3. ATTRIBUTES
Characteristics
Value
Internal Input Pulldown Resistor
75 kW
Internal Input Pullup Resistor
N/A
ESD Protection
Human Body Model
Machine Model
Charged Device Model
> 2 kV
> 100 V
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Pb−Free Pkg
LQFP−32
Level 2
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
Transistor Count
935 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Table 4. MAXIMUM RATINGS
Symbol
Parameter
Condition 1
Condition 2
Rating
Unit
VCC
PECL Mode Power Supply
VEE = 0 V
6
V
VEE
NECL Mode Power Supply
VCC = 0 V
−6
V
VI
PECL Mode Input Voltage
NECL Mode Input Voltage
VEE = 0 V
VCC = 0 V
6
−6
V
V
Iout
Output Current
Continuous
Surge
50
100
mA
mA
IBB
VBB Sink/Source
±0.5
mA
TA
Operating Temperature Range
−40 to +85
°C
Tstg
Storage Temperature Range
−65 to +150
°C
qJA
Thermal Resistance (Junction−to−Ambient)
0 lfpm
500 lfpm
32 LQFP
32 LQFP
80
55
°C/W
°C/W
qJC
Thermal Resistance (Junction−to−Case)
Standard Board
32 LQFP
12 to 17
°C/W
Tsol
Wave Solder (Pb−Free)
265
°C
VI ≤ VCC
VI ≥ VEE
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
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3
MC10EP131, MC100EP131
Table 5. 10EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 2)
−40°C
Symbol
Characteristic
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
70
95
120
70
95
120
70
95
120
mA
IEE
Power Supply Current
VOH
Output HIGH Voltage (Note 3)
2165
2290
2415
2230
2355
2480
2290
2415
2540
mV
VOL
Output LOW Voltage (Note 3)
1365
1490
1615
1430
1555
1680
1490
1615
1740
mV
VIH
Input HIGH Voltage (Single−Ended)
2090
2415
2155
2480
2215
2540
mV
VIL
Input LOW Voltage (Single−Ended)
1365
1690
1460
1755
1490
1815
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 4)
2.0
3.3
2.0
3.3
2.0
3.3
V
150
mA
IIH
Input HIGH Current
IIL
Input LOW Current
150
0.5
150
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
2. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.
3. All loading with 50 W to VCC − 2.0 V.
4. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 6. 10EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 5)
−40°C
Symbol
Characteristic
Min
Typ
25°C
Max
Min
Typ
85°C
Max
Min
Typ
Max
Unit
IEE
Power Supply Current
70
95
120
70
95
120
70
95
120
mA
VOH
Output HIGH Voltage (Note 6)
3865
3990
4115
3930
4055
4180
3990
4115
4240
mV
VOL
Output LOW Voltage (Note 6)
3065
3190
3315
3130
3255
3380
3190
3315
3440
mV
VIH
Input HIGH Voltage (Single−Ended)
3790
4115
3855
4180
3915
4240
mV
VIL
Input LOW Voltage (Single−Ended)
3065
3390
3130
3455
3190
3515
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 7)
2.0
5.0
2.0
5.0
2.0
5.0
V
150
mA
IIH
Input HIGH Current
IIL
Input LOW Current
150
0.5
150
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
5. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V.
6. All loading with 50 W to VCC − 2.0 V.
7. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
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4
MC10EP131, MC100EP131
Table 7. 10EP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = −5.5 V to −3.0 V (Note 8)
−40°C
Symbol
IEE
Characteristic
Power Supply Current
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
70
95
120
70
95
120
70
95
120
mA
VOH
Output HIGH Voltage (Note 9)
−1135
−1010
−885
−1070
−945
−820
−1010
−885
−760
mV
VOL
Output LOW Voltage (Note 9)
−1935
−1810
−1685
−1870
−1745
−1620
−1810
−1685
−1560
mV
VIH
Input HIGH Voltage (Single−Ended)
−1210
−885
−1145
−820
−1085
−760
mV
VIL
Input LOW Voltage (Single−Ended)
−1935
−1610
−1870
−1545
−1810
−1485
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 10)
0.0
V
150
mA
IIH
Input HIGH Current
IIL
Input LOW Current
VEE+2.0
0.0
VEE+2.0
0.0
150
0.5
VEE+2.0
150
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
8. Input and output parameters vary 1:1 with VCC.
9. All loading with 50 W to VCC − 2.0 V.
10. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 8. 100EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 11)
−40°C
Symbol
Characteristic
Min
Typ
25°C
Max
Min
Typ
85°C
Max
Min
Typ
Max
Unit
IEE
Power Supply Current
70
95
120
75
97
120
80
105
130
mA
VOH
Output HIGH Voltage (Note 12)
2155
2280
2405
2155
2280
2405
2155
2280
2405
mV
VOL
Output LOW Voltage (Note 12)
1355
1480
1605
1355
1480
1605
1355
1480
1605
mV
VIH
Input HIGH Voltage (Single−Ended)
2075
2420
2075
2420
2075
2420
mV
VIL
Input LOW Voltage (Single−Ended)
1355
1675
1355
1675
1355
1675
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 13)
2.0
3.3
2.0
3.3
2.0
3.3
V
150
mA
IIH
Input HIGH Current
IIL
Input LOW Current
150
0.5
150
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
11. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to −2.2 V.
12. All loading with 50 W to VCC − 2.0 V.
13. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
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5
MC10EP131, MC100EP131
Table 9. 100EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 14)
−40°C
Symbol
Characteristic
25°C
85°C
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
70
95
120
75
97
120
80
105
130
mA
IEE
Power Supply Current
VOH
Output HIGH Voltage (Note 15)
3855
3980
4105
3855
3980
4105
3855
3980
4105
mV
VOL
Output LOW Voltage (Note 15)
3055
3180
3305
3055
3180
3305
3055
3180
3305
mV
VIH
Input HIGH Voltage (Single−Ended)
3775
4120
3775
4120
3775
4120
mV
VIL
Input LOW Voltage (Single−Ended)
3055
3375
3055
3375
3055
3375
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 16)
2.0
5.0
2.0
5.0
2.0
5.0
V
150
mA
IIH
Input HIGH Current
IIL
Input LOW Current
150
150
0.5
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
14. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to −0.5 V.
15. All loading with 50 W to VCC − 2.0 V.
16. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 10. 100EP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = −5.5 V to −3.0 V (Note 17)
−40°C
Symbol
Characteristic
Min
25°C
Typ
Max
Min
Typ
85°C
Max
Min
Typ
Max
Unit
IEE
Power Supply Current
70
95
120
75
97
120
80
105
130
mA
VOH
Output HIGH Voltage (Note 18)
−1145
−1020
−895
−1145
−1020
−895
−1145
−1020
−895
mV
VOL
Output LOW Voltage (Note 18)
−1945
−1820
−1695
−1945
−1820
−1695
−1945
−1820
−1695
mV
VIH
Input HIGH Voltage (Single−Ended)
−1225
−880
−1225
−880
−1225
−880
mV
VIL
Input LOW Voltage (Single−Ended)
−1945
−1625
−1945
−1625
−1945
−1625
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 19)
0.0
V
150
mA
IIH
Input HIGH Current
IIL
Input LOW Current
VEE+2.0
0.0
VEE+2.0
150
0.5
0.0
VEE+2.0
150
0.5
0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
17. Input and output parameters vary 1:1 with VCC.
18. All loading with 50 W to VCC − 2.0 V.
19. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
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6
MC10EP131, MC100EP131
Table 11. AC CHARACTERISTICS VCC = 0 V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 20)
−40°C
Symbol
Characteristic
Min
fmax
Maximum Frequency
(See Figure 3. Frequency vs. VOUTpp
and JITTER)
tPLH,
tPHL
Propagation Delay to
Output Differential CC
R0−3
SET
C0−3
Typ
25°C
Max
Min
>3
Typ
85°C
Max
Min
>3
320
320
320
300
450
450
430
430
520
520
520
550
380
400
380
380
460
500
480
460
Typ
Max
>3
580
600
580
580
450
450
450
400
560
560
560
530
Unit
GHz
650
650
700
650
ps
tRR
Set/R0−3 Recovery
290
210
290
210
350
280
ps
tS
tH
Setup Time
Hold Time
120
80
120
80
120
80
ps
550
400
550
400
550
400
tPW
tJITTER
tr
tf
Minimum Pulse Rate
R0−3
SET,
Cycle−to−Cycle Jitter
(See Figure 3. Frequency vs. VOUTpp
and JITTER)
Output Rise/Fall Times
(20% − 80%)
Q, Q
110
0.2